FEB_2093 22.01.24 10:28:42
Info
10:26:01:febtest:INFO: FEB 8-2 selected
10:26:01:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:26:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:26:05:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:26:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:26:05:febtest:INFO: Testing FEB with SN 2093
10:26:06:smx_tester:INFO: Scanning setup
10:26:06:elinks:INFO: Disabling clock on downlink 0
10:26:06:elinks:INFO: Disabling clock on downlink 1
10:26:06:elinks:INFO: Disabling clock on downlink 2
10:26:06:elinks:INFO: Disabling clock on downlink 3
10:26:06:elinks:INFO: Disabling clock on downlink 4
10:26:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:26:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:26:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:26:06:elinks:INFO: Disabling clock on downlink 0
10:26:06:elinks:INFO: Disabling clock on downlink 1
10:26:06:elinks:INFO: Disabling clock on downlink 2
10:26:06:elinks:INFO: Disabling clock on downlink 3
10:26:06:elinks:INFO: Disabling clock on downlink 4
10:26:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:26:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:26:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:26:06:elinks:INFO: Disabling clock on downlink 0
10:26:06:elinks:INFO: Disabling clock on downlink 1
10:26:06:elinks:INFO: Disabling clock on downlink 2
10:26:06:elinks:INFO: Disabling clock on downlink 3
10:26:06:elinks:INFO: Disabling clock on downlink 4
10:26:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:26:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:26:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:26:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:26:07:elinks:INFO: Disabling clock on downlink 0
10:26:07:elinks:INFO: Disabling clock on downlink 1
10:26:07:elinks:INFO: Disabling clock on downlink 2
10:26:07:elinks:INFO: Disabling clock on downlink 3
10:26:07:elinks:INFO: Disabling clock on downlink 4
10:26:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:26:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:26:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:26:07:elinks:INFO: Disabling clock on downlink 0
10:26:07:elinks:INFO: Disabling clock on downlink 1
10:26:07:elinks:INFO: Disabling clock on downlink 2
10:26:07:elinks:INFO: Disabling clock on downlink 3
10:26:07:elinks:INFO: Disabling clock on downlink 4
10:26:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:26:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:26:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:26:07:setup_element:INFO: Scanning clock phase
10:26:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:26:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:26:07:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:26:07:setup_element:INFO: Eye window for uplink 16: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:26:07:setup_element:INFO: Eye window for uplink 17: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:26:07:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:26:07:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:26:07:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:26:07:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:26:07:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:26:07:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:26:07:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:26:07:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:26:07:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:26:07:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:26:07:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:26:07:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:26:07:setup_element:INFO: Eye window for uplink 30: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:26:07:setup_element:INFO: Eye window for uplink 31: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:26:07:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2
10:26:07:setup_element:INFO: Scanning data phases
10:26:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:26:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:26:13:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:26:13:setup_element:INFO: Eye window for uplink 16: XXXX___________________________________X
Data delay found: 21
10:26:13:setup_element:INFO: Eye window for uplink 17: X_________________________________XXXXXX
Data delay found: 17
10:26:13:setup_element:INFO: Eye window for uplink 18: XXX_________________________________XXXX
Data delay found: 19
10:26:13:setup_element:INFO: Eye window for uplink 19: X________________________________XXXXXX_
Data delay found: 16
10:26:13:setup_element:INFO: Eye window for uplink 20: ____________________________________XXXX
Data delay found: 17
10:26:13:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
10:26:13:setup_element:INFO: Eye window for uplink 22: __________________________________XXXX__
Data delay found: 15
10:26:13:setup_element:INFO: Eye window for uplink 23: ________________________________XXXXX___
Data delay found: 14
10:26:13:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
10:26:13:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
10:26:13:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
10:26:13:setup_element:INFO: Eye window for uplink 27: __________XXXXX_________________________
Data delay found: 32
10:26:13:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
10:26:13:setup_element:INFO: Eye window for uplink 29: ______________XXXX______________________
Data delay found: 35
10:26:13:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
10:26:13:setup_element:INFO: Eye window for uplink 31: _____________XXXXXX_____________________
Data delay found: 35
10:26:13:setup_element:INFO: Setting the data phase to 21 for uplink 16
10:26:13:setup_element:INFO: Setting the data phase to 17 for uplink 17
10:26:13:setup_element:INFO: Setting the data phase to 19 for uplink 18
10:26:13:setup_element:INFO: Setting the data phase to 16 for uplink 19
10:26:13:setup_element:INFO: Setting the data phase to 17 for uplink 20
10:26:13:setup_element:INFO: Setting the data phase to 16 for uplink 21
10:26:13:setup_element:INFO: Setting the data phase to 15 for uplink 22
10:26:13:setup_element:INFO: Setting the data phase to 14 for uplink 23
10:26:13:setup_element:INFO: Setting the data phase to 27 for uplink 24
10:26:13:setup_element:INFO: Setting the data phase to 30 for uplink 25
10:26:13:setup_element:INFO: Setting the data phase to 28 for uplink 26
10:26:13:setup_element:INFO: Setting the data phase to 32 for uplink 27
10:26:13:setup_element:INFO: Setting the data phase to 34 for uplink 28
10:26:13:setup_element:INFO: Setting the data phase to 35 for uplink 29
10:26:13:setup_element:INFO: Setting the data phase to 37 for uplink 30
10:26:13:setup_element:INFO: Setting the data phase to 35 for uplink 31
10:26:13:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 16: X________________________________________________________________________XXXXXXX
Uplink 17: X________________________________________________________________________XXXXXXX
Uplink 18: ________________________________________________________________________XXXXXXXX
Uplink 19: ________________________________________________________________________XXXXXXXX
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: _______________________________________________________________________XXXXXXX__
Uplink 25: _______________________________________________________________________XXXXXXX__
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: ________________________________________________________________________XXXXXXX_
Uplink 29: ________________________________________________________________________XXXXXXX_
Uplink 30: X________________________________________________________________________XXXXXXX
Uplink 31: X________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 17:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 19:
Optimal Phase: 16
Window Length: 32
Eye Window: X________________________________XXXXXX_
Uplink 20:
Optimal Phase: 17
Window Length: 36
Eye Window: ____________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 22:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 23:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
]
10:26:13:setup_element:INFO: Beginning SMX ASICs map scan
10:26:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:26:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:26:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:26:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:26:13:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:26:13:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:26:13:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:26:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:26:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:26:14:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:26:14:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:26:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:26:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:26:14:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:26:14:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:26:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:26:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:26:14:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:26:14:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:26:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:26:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:26:16:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 16: X________________________________________________________________________XXXXXXX
Uplink 17: X________________________________________________________________________XXXXXXX
Uplink 18: ________________________________________________________________________XXXXXXXX
Uplink 19: ________________________________________________________________________XXXXXXXX
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: _______________________________________________________________________XXXXXXX__
Uplink 25: _______________________________________________________________________XXXXXXX__
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: ________________________________________________________________________XXXXXXX_
Uplink 29: ________________________________________________________________________XXXXXXX_
Uplink 30: X________________________________________________________________________XXXXXXX
Uplink 31: X________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 17:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 19:
Optimal Phase: 16
Window Length: 32
Eye Window: X________________________________XXXXXX_
Uplink 20:
Optimal Phase: 17
Window Length: 36
Eye Window: ____________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 22:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 23:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
10:26:16:setup_element:INFO: Performing Elink synchronization
10:26:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:26:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:26:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:26:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:26:16:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:26:16:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:26:16:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
10:26:17:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:26:17:febtest:INFO: 23-0 | XA-000-08-002-001-006-254-05 | 40.9 | 1177.4
10:26:17:febtest:INFO: 30-1 | XA-000-08-002-001-007-000-14 | 37.7 | 1183.3
10:26:18:febtest:INFO: 21-2 | XA-000-08-002-001-007-001-14 | 34.6 | 1201.0
10:26:18:febtest:INFO: 28-3 | XA-000-08-002-001-006-240-05 | 56.8 | 1130.0
10:26:18:febtest:INFO: 19-4 | XA-000-08-002-001-006-245-05 | 56.8 | 1118.1
10:26:18:febtest:INFO: 26-5 | XA-000-08-002-001-006-246-05 | 31.4 | 1206.9
10:26:18:febtest:INFO: 17-6 | XA-000-08-002-001-006-237-02 | 6.1 | 1300.3
10:26:19:febtest:INFO: 24-7 | XA-000-08-002-001-006-251-05 | 40.9 | 1177.4
10:26:19:ST3_smx:INFO: Configuring SMX FAST
10:26:21:ST3_smx:INFO: chip: 23-0 50.430383 C 1147.806000 mV
10:26:21:ST3_smx:INFO: Electrons
10:26:21:ST3_smx:INFO: # loops 0
10:26:22:ST3_smx:INFO: # loops 1
10:26:24:ST3_smx:INFO: # loops 2
10:26:26:ST3_smx:INFO: # loops 3
10:26:28:ST3_smx:INFO: # loops 4
10:26:29:ST3_smx:INFO: Total # of broken channels: 0
10:26:29:ST3_smx:INFO: List of broken channels: []
10:26:29:ST3_smx:INFO: Total # of broken channels: 0
10:26:29:ST3_smx:INFO: List of broken channels: []
10:26:30:ST3_smx:INFO: Configuring SMX FAST
10:26:32:ST3_smx:INFO: chip: 30-1 44.073563 C 1177.390875 mV
10:26:32:ST3_smx:INFO: Electrons
10:26:32:ST3_smx:INFO: # loops 0
10:26:34:ST3_smx:INFO: # loops 1
10:26:36:ST3_smx:INFO: # loops 2
10:26:37:ST3_smx:INFO: # loops 3
10:26:39:ST3_smx:INFO: # loops 4
10:26:41:ST3_smx:INFO: Total # of broken channels: 0
10:26:41:ST3_smx:INFO: List of broken channels: []
10:26:41:ST3_smx:INFO: Total # of broken channels: 0
10:26:41:ST3_smx:INFO: List of broken channels: []
10:26:41:ST3_smx:INFO: Configuring SMX FAST
10:26:43:ST3_smx:INFO: chip: 21-2 37.726682 C 1200.969315 mV
10:26:43:ST3_smx:INFO: Electrons
10:26:43:ST3_smx:INFO: # loops 0
10:26:45:ST3_smx:INFO: # loops 1
10:26:47:ST3_smx:INFO: # loops 2
10:26:49:ST3_smx:INFO: # loops 3
10:26:50:ST3_smx:INFO: # loops 4
10:26:52:ST3_smx:INFO: Total # of broken channels: 0
10:26:52:ST3_smx:INFO: List of broken channels: []
10:26:52:ST3_smx:INFO: Total # of broken channels: 0
10:26:52:ST3_smx:INFO: List of broken channels: []
10:26:53:ST3_smx:INFO: Configuring SMX FAST
10:26:55:ST3_smx:INFO: chip: 28-3 53.612520 C 1159.654860 mV
10:26:55:ST3_smx:INFO: Electrons
10:26:55:ST3_smx:INFO: # loops 0
10:26:56:ST3_smx:INFO: # loops 1
10:26:58:ST3_smx:INFO: # loops 2
10:27:00:ST3_smx:INFO: # loops 3
10:27:01:ST3_smx:INFO: # loops 4
10:27:03:ST3_smx:INFO: Total # of broken channels: 0
10:27:03:ST3_smx:INFO: List of broken channels: []
10:27:03:ST3_smx:INFO: Total # of broken channels: 0
10:27:03:ST3_smx:INFO: List of broken channels: []
10:27:03:ST3_smx:INFO: Configuring SMX FAST
10:27:05:ST3_smx:INFO: chip: 19-4 53.612520 C 1153.732915 mV
10:27:05:ST3_smx:INFO: Electrons
10:27:05:ST3_smx:INFO: # loops 0
10:27:07:ST3_smx:INFO: # loops 1
10:27:08:ST3_smx:INFO: # loops 2
10:27:10:ST3_smx:INFO: # loops 3
10:27:11:ST3_smx:INFO: # loops 4
10:27:13:ST3_smx:INFO: Total # of broken channels: 0
10:27:13:ST3_smx:INFO: List of broken channels: []
10:27:13:ST3_smx:INFO: Total # of broken channels: 0
10:27:13:ST3_smx:INFO: List of broken channels: []
10:27:14:ST3_smx:INFO: Configuring SMX FAST
10:27:16:ST3_smx:INFO: chip: 26-5 34.556970 C 1212.728715 mV
10:27:16:ST3_smx:INFO: Electrons
10:27:16:ST3_smx:INFO: # loops 0
10:27:18:ST3_smx:INFO: # loops 1
10:27:19:ST3_smx:INFO: # loops 2
10:27:21:ST3_smx:INFO: # loops 3
10:27:22:ST3_smx:INFO: # loops 4
10:27:24:ST3_smx:INFO: Total # of broken channels: 0
10:27:24:ST3_smx:INFO: List of broken channels: []
10:27:24:ST3_smx:INFO: Total # of broken channels: 0
10:27:24:ST3_smx:INFO: List of broken channels: []
10:27:24:ST3_smx:INFO: Configuring SMX FAST
10:27:26:ST3_smx:INFO: chip: 17-6 21.902970 C 1259.567515 mV
10:27:26:ST3_smx:INFO: Electrons
10:27:26:ST3_smx:INFO: # loops 0
10:27:28:ST3_smx:INFO: # loops 1
10:27:29:ST3_smx:INFO: # loops 2
10:27:31:ST3_smx:INFO: # loops 3
10:27:32:ST3_smx:INFO: # loops 4
10:27:34:ST3_smx:INFO: Total # of broken channels: 0
10:27:34:ST3_smx:INFO: List of broken channels: []
10:27:34:ST3_smx:INFO: Total # of broken channels: 55
10:27:34:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 53, 55, 57, 59, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 119]
10:27:35:ST3_smx:INFO: Configuring SMX FAST
10:27:37:ST3_smx:INFO: chip: 24-7 47.250730 C 1159.654860 mV
10:27:37:ST3_smx:INFO: Electrons
10:27:37:ST3_smx:INFO: # loops 0
10:27:38:ST3_smx:INFO: # loops 1
10:27:40:ST3_smx:INFO: # loops 2
10:27:42:ST3_smx:INFO: # loops 3
10:27:43:ST3_smx:INFO: # loops 4
10:27:45:ST3_smx:INFO: Total # of broken channels: 0
10:27:45:ST3_smx:INFO: List of broken channels: []
10:27:45:ST3_smx:INFO: Total # of broken channels: 56
10:27:45:ST3_smx:INFO: List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 45, 47, 49, 51, 53, 55, 57, 59, 61, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 117, 119, 121, 123]
10:27:46:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:27:46:febtest:INFO: 23-0 | XA-000-08-002-001-006-254-05 | 56.8 | 1153.7
10:27:46:febtest:INFO: 30-1 | XA-000-08-002-001-007-000-14 | 50.4 | 1177.4
10:27:46:febtest:INFO: 21-2 | XA-000-08-002-001-007-001-14 | 40.9 | 1201.0
10:27:46:febtest:INFO: 28-3 | XA-000-08-002-001-006-240-05 | 53.6 | 1159.7
10:27:47:febtest:INFO: 19-4 | XA-000-08-002-001-006-245-05 | 53.6 | 1153.7
10:27:47:febtest:INFO: 26-5 | XA-000-08-002-001-006-246-05 | 34.6 | 1212.7
10:27:47:febtest:INFO: 17-6 | XA-000-08-002-001-006-237-02 | 21.9 | 1259.6
10:27:47:febtest:INFO: 24-7 | XA-000-08-002-001-006-251-05 | 47.3 | 1159.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_22-10_26_05
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4B3010323A2 124 C
FEB_SN : 2093
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.447', '1.9220', '1.846', '2.0700', '7.000', '1.5780', '7.000', '1.5780']
VI_after__Init : ['2.450', '1.9830', '1.850', '0.6147', '7.000', '1.5700', '7.000', '1.5700']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:27:48:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Robert V.;
10:27:48:ST3_Shared:INFO: Listo of operators:Robert V.;
10:27:48:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Robert V.;
10:27:48:ST3_Shared:INFO: Listo of operators:Robert V.;
10:27:48:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Robert V.;
10:27:48:ST3_Shared:INFO: Listo of operators:Robert V.;
10:27:48:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Robert V.;
10:28:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:28:42:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:28:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:28:43:febtest:INFO: Testing FEB with SN 2093
10:28:44:smx_tester:INFO: Scanning setup
10:28:44:elinks:INFO: Disabling clock on downlink 0
10:28:44:elinks:INFO: Disabling clock on downlink 1
10:28:44:elinks:INFO: Disabling clock on downlink 2
10:28:44:elinks:INFO: Disabling clock on downlink 3
10:28:44:elinks:INFO: Disabling clock on downlink 4
10:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:28:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:44:elinks:INFO: Disabling clock on downlink 0
10:28:44:elinks:INFO: Disabling clock on downlink 1
10:28:44:elinks:INFO: Disabling clock on downlink 2
10:28:44:elinks:INFO: Disabling clock on downlink 3
10:28:44:elinks:INFO: Disabling clock on downlink 4
10:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:28:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:44:elinks:INFO: Disabling clock on downlink 0
10:28:44:elinks:INFO: Disabling clock on downlink 1
10:28:44:elinks:INFO: Disabling clock on downlink 2
10:28:44:elinks:INFO: Disabling clock on downlink 3
10:28:44:elinks:INFO: Disabling clock on downlink 4
10:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:28:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:44:elinks:INFO: Disabling clock on downlink 0
10:28:44:elinks:INFO: Disabling clock on downlink 1
10:28:44:elinks:INFO: Disabling clock on downlink 2
10:28:44:elinks:INFO: Disabling clock on downlink 3
10:28:44:elinks:INFO: Disabling clock on downlink 4
10:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:28:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:45:elinks:INFO: Disabling clock on downlink 0
10:28:45:elinks:INFO: Disabling clock on downlink 1
10:28:45:elinks:INFO: Disabling clock on downlink 2
10:28:45:elinks:INFO: Disabling clock on downlink 3
10:28:45:elinks:INFO: Disabling clock on downlink 4
10:28:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:28:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:45:setup_element:INFO: Scanning clock phase
10:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:45:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:28:45:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
10:28:45:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
10:28:45:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:28:45:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:28:45:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:28:45:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:28:45:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:28:45:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:28:45:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:28:45:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:28:45:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:28:45:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:28:45:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:28:45:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:28:45:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________________XXXXXX
Clock Delay: 36
10:28:45:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________________XXXXXX
Clock Delay: 36
10:28:45:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
10:28:45:setup_element:INFO: Scanning data phases
10:28:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:51:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:28:51:setup_element:INFO: Eye window for uplink 16: XXXXX__________________________________X
Data delay found: 21
10:28:51:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX
Data delay found: 17
10:28:51:setup_element:INFO: Eye window for uplink 18: XXXX_________________________________XXX
Data delay found: 20
10:28:51:setup_element:INFO: Eye window for uplink 19: X_________________________________XXXXXX
Data delay found: 17
10:28:51:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX
Data delay found: 18
10:28:51:setup_element:INFO: Eye window for uplink 21: ___________________________________XXXXX
Data delay found: 17
10:28:51:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXX_
Data delay found: 17
10:28:51:setup_element:INFO: Eye window for uplink 23: _________________________________XXXX___
Data delay found: 14
10:28:51:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
10:28:51:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
10:28:51:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
10:28:51:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
10:28:51:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
10:28:51:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
10:28:51:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
10:28:51:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
10:28:51:setup_element:INFO: Setting the data phase to 21 for uplink 16
10:28:51:setup_element:INFO: Setting the data phase to 17 for uplink 17
10:28:51:setup_element:INFO: Setting the data phase to 20 for uplink 18
10:28:51:setup_element:INFO: Setting the data phase to 17 for uplink 19
10:28:51:setup_element:INFO: Setting the data phase to 18 for uplink 20
10:28:51:setup_element:INFO: Setting the data phase to 17 for uplink 21
10:28:51:setup_element:INFO: Setting the data phase to 17 for uplink 22
10:28:51:setup_element:INFO: Setting the data phase to 14 for uplink 23
10:28:51:setup_element:INFO: Setting the data phase to 28 for uplink 24
10:28:51:setup_element:INFO: Setting the data phase to 31 for uplink 25
10:28:51:setup_element:INFO: Setting the data phase to 29 for uplink 26
10:28:51:setup_element:INFO: Setting the data phase to 32 for uplink 27
10:28:51:setup_element:INFO: Setting the data phase to 35 for uplink 28
10:28:51:setup_element:INFO: Setting the data phase to 36 for uplink 29
10:28:51:setup_element:INFO: Setting the data phase to 38 for uplink 30
10:28:51:setup_element:INFO: Setting the data phase to 37 for uplink 31
10:28:51:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 16: ________________________________________________________________________________
Uplink 17: ________________________________________________________________________________
Uplink 18: ________________________________________________________________________XXXXXXXX
Uplink 19: ________________________________________________________________________XXXXXXXX
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: _______________________________________________________________________XXXXXXX__
Uplink 25: _______________________________________________________________________XXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: ________________________________________________________________________XXXXXX__
Uplink 29: ________________________________________________________________________XXXXXX__
Uplink 30: __________________________________________________________________________XXXXXX
Uplink 31: __________________________________________________________________________XXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 17:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 18:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 19:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 20:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 21:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXX_
Uplink 23:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 24:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 30:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 31:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
]
10:28:51:setup_element:INFO: Beginning SMX ASICs map scan
10:28:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:28:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:28:51:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:28:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:28:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:28:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:28:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:28:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:28:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:28:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:28:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:28:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:28:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:28:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:28:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:28:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:28:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:28:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:28:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:28:54:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 16: ________________________________________________________________________________
Uplink 17: ________________________________________________________________________________
Uplink 18: ________________________________________________________________________XXXXXXXX
Uplink 19: ________________________________________________________________________XXXXXXXX
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: _______________________________________________________________________XXXXXXX__
Uplink 25: _______________________________________________________________________XXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: ________________________________________________________________________XXXXXX__
Uplink 29: ________________________________________________________________________XXXXXX__
Uplink 30: __________________________________________________________________________XXXXXX
Uplink 31: __________________________________________________________________________XXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 17:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 18:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 19:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 20:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 21:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXX_
Uplink 23:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 24:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 30:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 31:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
10:28:54:setup_element:INFO: Performing Elink synchronization
10:28:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:28:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:28:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:28:54:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:28:54:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_21 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_2__upli_21
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_19 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_4__upli_19
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_17 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_6__upli_17
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
10:28:55:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:28:55:febtest:INFO: 23-0 | XA-000-08-002-001-006-254-05 | 44.1 | 1177.4
10:28:55:febtest:INFO: 30-1 | XA-000-08-002-001-007-000-14 | 44.1 | 1183.3
10:28:55:febtest:INFO: 21-2 | XA-000-08-002-001-007-001-14 | 34.6 | 1201.0
10:28:56:febtest:INFO: 28-3 | XA-000-08-002-001-006-240-05 | 56.8 | 1130.0
10:28:56:febtest:INFO: 19-4 | XA-000-08-002-001-006-245-05 | 60.0 | 1112.1
10:28:56:febtest:INFO: 26-5 | XA-000-08-002-001-006-246-05 | 37.7 | 1189.2
10:28:56:febtest:INFO: 17-6 | XA-000-08-002-001-006-237-02 | 6.1 | 1300.3
10:28:57:febtest:INFO: 24-7 | XA-000-08-002-001-006-251-05 | 40.9 | 1177.4
10:28:57:ST3_smx:INFO: Configuring SMX FAST
10:28:59:ST3_smx:INFO: chip: 23-0 53.612520 C 1153.732915 mV
10:28:59:ST3_smx:INFO: Electrons
10:28:59:ST3_smx:INFO: # loops 0
10:29:00:ST3_smx:INFO: # loops 1
10:29:02:ST3_smx:INFO: # loops 2
10:29:04:ST3_smx:INFO: # loops 3
10:29:05:ST3_smx:INFO: # loops 4
10:29:07:ST3_smx:INFO: Total # of broken channels: 0
10:29:07:ST3_smx:INFO: List of broken channels: []
10:29:07:ST3_smx:INFO: Total # of broken channels: 0
10:29:07:ST3_smx:INFO: List of broken channels: []
10:29:07:ST3_smx:INFO: Configuring SMX FAST
10:29:09:ST3_smx:INFO: chip: 30-1 47.250730 C 1177.390875 mV
10:29:09:ST3_smx:INFO: Electrons
10:29:09:ST3_smx:INFO: # loops 0
10:29:11:ST3_smx:INFO: # loops 1
10:29:13:ST3_smx:INFO: # loops 2
10:29:14:ST3_smx:INFO: # loops 3
10:29:16:ST3_smx:INFO: # loops 4
10:29:17:ST3_smx:INFO: Total # of broken channels: 0
10:29:17:ST3_smx:INFO: List of broken channels: []
10:29:17:ST3_smx:INFO: Total # of broken channels: 0
10:29:17:ST3_smx:INFO: List of broken channels: []
10:29:18:ST3_smx:INFO: Configuring SMX FAST
10:29:20:ST3_smx:INFO: chip: 21-2 37.726682 C 1200.969315 mV
10:29:20:ST3_smx:INFO: Electrons
10:29:20:ST3_smx:INFO: # loops 0
10:29:22:ST3_smx:INFO: # loops 1
10:29:23:ST3_smx:INFO: # loops 2
10:29:25:ST3_smx:INFO: # loops 3
10:29:26:ST3_smx:INFO: # loops 4
10:29:28:ST3_smx:INFO: Total # of broken channels: 0
10:29:28:ST3_smx:INFO: List of broken channels: []
10:29:28:ST3_smx:INFO: Total # of broken channels: 0
10:29:28:ST3_smx:INFO: List of broken channels: []
10:29:28:ST3_smx:INFO: Configuring SMX FAST
10:29:30:ST3_smx:INFO: chip: 28-3 53.612520 C 1159.654860 mV
10:29:30:ST3_smx:INFO: Electrons
10:29:30:ST3_smx:INFO: # loops 0
10:29:32:ST3_smx:INFO: # loops 1
10:29:33:ST3_smx:INFO: # loops 2
10:29:35:ST3_smx:INFO: # loops 3
10:29:36:ST3_smx:INFO: # loops 4
10:29:38:ST3_smx:INFO: Total # of broken channels: 0
10:29:38:ST3_smx:INFO: List of broken channels: []
10:29:38:ST3_smx:INFO: Total # of broken channels: 0
10:29:38:ST3_smx:INFO: List of broken channels: []
10:29:39:ST3_smx:INFO: Configuring SMX FAST
10:29:41:ST3_smx:INFO: chip: 19-4 53.612520 C 1153.732915 mV
10:29:41:ST3_smx:INFO: Electrons
10:29:41:ST3_smx:INFO: # loops 0
10:29:42:ST3_smx:INFO: # loops 1
10:29:44:ST3_smx:INFO: # loops 2
10:29:45:ST3_smx:INFO: # loops 3
10:29:47:ST3_smx:INFO: # loops 4
10:29:48:ST3_smx:INFO: Total # of broken channels: 0
10:29:48:ST3_smx:INFO: List of broken channels: []
10:29:48:ST3_smx:INFO: Total # of broken channels: 0
10:29:48:ST3_smx:INFO: List of broken channels: []
10:29:49:ST3_smx:INFO: Configuring SMX FAST
10:29:51:ST3_smx:INFO: chip: 26-5 37.726682 C 1212.728715 mV
10:29:51:ST3_smx:INFO: Electrons
10:29:51:ST3_smx:INFO: # loops 0
10:29:53:ST3_smx:INFO: # loops 1
10:29:54:ST3_smx:INFO: # loops 2
10:29:56:ST3_smx:INFO: # loops 3
10:29:57:ST3_smx:INFO: # loops 4
10:29:59:ST3_smx:INFO: Total # of broken channels: 0
10:29:59:ST3_smx:INFO: List of broken channels: []
10:29:59:ST3_smx:INFO: Total # of broken channels: 0
10:29:59:ST3_smx:INFO: List of broken channels: []
10:29:59:ST3_smx:INFO: Configuring SMX FAST
10:30:01:ST3_smx:INFO: chip: 17-6 21.902970 C 1253.730060 mV
10:30:01:ST3_smx:INFO: Electrons
10:30:01:ST3_smx:INFO: # loops 0
10:30:03:ST3_smx:INFO: # loops 1
10:30:04:ST3_smx:INFO: # loops 2
10:30:06:ST3_smx:INFO: # loops 3
10:30:07:ST3_smx:INFO: # loops 4
10:30:09:ST3_smx:INFO: Total # of broken channels: 0
10:30:09:ST3_smx:INFO: List of broken channels: []
10:30:09:ST3_smx:INFO: Total # of broken channels: 0
10:30:09:ST3_smx:INFO: List of broken channels: []
10:30:10:ST3_smx:INFO: Configuring SMX FAST
10:30:12:ST3_smx:INFO: chip: 24-7 50.430383 C 1159.654860 mV
10:30:12:ST3_smx:INFO: Electrons
10:30:12:ST3_smx:INFO: # loops 0
10:30:13:ST3_smx:INFO: # loops 1
10:30:15:ST3_smx:INFO: # loops 2
10:30:16:ST3_smx:INFO: # loops 3
10:30:18:ST3_smx:INFO: # loops 4
10:30:19:ST3_smx:INFO: Total # of broken channels: 0
10:30:19:ST3_smx:INFO: List of broken channels: []
10:30:19:ST3_smx:INFO: Total # of broken channels: 0
10:30:19:ST3_smx:INFO: List of broken channels: []
10:30:20:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:30:20:febtest:INFO: 23-0 | XA-000-08-002-001-006-254-05 | 56.8 | 1153.7
10:30:20:febtest:INFO: 30-1 | XA-000-08-002-001-007-000-14 | 50.4 | 1177.4
10:30:21:febtest:INFO: 21-2 | XA-000-08-002-001-007-001-14 | 40.9 | 1201.0
10:30:21:febtest:INFO: 28-3 | XA-000-08-002-001-006-240-05 | 53.6 | 1159.7
10:30:21:febtest:INFO: 19-4 | XA-000-08-002-001-006-245-05 | 53.6 | 1153.7
10:30:21:febtest:INFO: 26-5 | XA-000-08-002-001-006-246-05 | 37.7 | 1212.7
10:30:22:febtest:INFO: 17-6 | XA-000-08-002-001-006-237-02 | 21.9 | 1259.6
10:30:22:febtest:INFO: 24-7 | XA-000-08-002-001-006-251-05 | 50.4 | 1159.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_22-10_28_42
OPERATOR : Oleksandr S.; Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4B3010323A2 124 C
FEB_SN : 2093
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.447', '1.9290', '1.846', '2.2300', '7.000', '1.5780', '7.000', '1.5780']
VI_after__Init : ['2.450', '1.9830', '1.850', '0.6147', '7.000', '1.5700', '7.000', '1.5700']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:30:32:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2093/TestDate_2024_01_22-10_28_42/