Go Back
FEB_2094 22.01.24 10:32:45
TextEdit.txt
10:32:39:febtest:INFO: FEB 8-2 selected
10:32:39:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:32:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:45:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:32:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:45:febtest:INFO: Testing FEB with SN 2094
10:32:47:smx_tester:INFO: Scanning setup
10:32:47:elinks:INFO: Disabling clock on downlink 0
10:32:47:elinks:INFO: Disabling clock on downlink 1
10:32:47:elinks:INFO: Disabling clock on downlink 2
10:32:47:elinks:INFO: Disabling clock on downlink 3
10:32:47:elinks:INFO: Disabling clock on downlink 4
10:32:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:32:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:47:elinks:INFO: Disabling clock on downlink 0
10:32:47:elinks:INFO: Disabling clock on downlink 1
10:32:47:elinks:INFO: Disabling clock on downlink 2
10:32:47:elinks:INFO: Disabling clock on downlink 3
10:32:47:elinks:INFO: Disabling clock on downlink 4
10:32:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:47:elinks:INFO: Disabling clock on downlink 0
10:32:47:elinks:INFO: Disabling clock on downlink 1
10:32:47:elinks:INFO: Disabling clock on downlink 2
10:32:47:elinks:INFO: Disabling clock on downlink 3
10:32:47:elinks:INFO: Disabling clock on downlink 4
10:32:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:32:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:32:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:47:elinks:INFO: Disabling clock on downlink 0
10:32:47:elinks:INFO: Disabling clock on downlink 1
10:32:47:elinks:INFO: Disabling clock on downlink 2
10:32:47:elinks:INFO: Disabling clock on downlink 3
10:32:47:elinks:INFO: Disabling clock on downlink 4
10:32:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:32:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:47:elinks:INFO: Disabling clock on downlink 0
10:32:47:elinks:INFO: Disabling clock on downlink 1
10:32:47:elinks:INFO: Disabling clock on downlink 2
10:32:47:elinks:INFO: Disabling clock on downlink 3
10:32:47:elinks:INFO: Disabling clock on downlink 4
10:32:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:32:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:47:setup_element:INFO: Scanning clock phase
10:32:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:32:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:32:48:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:32:48:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:32:48:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:32:48:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:48:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:48:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:32:48:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:32:48:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:32:48:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:32:48:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:32:48:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:32:48:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:48:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:32:48:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:32:48:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:32:48:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:32:48:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:32:48:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
10:32:48:setup_element:INFO: Scanning data phases
10:32:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:32:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:32:53:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:32:53:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
10:32:53:setup_element:INFO: Eye window for uplink 17: ________________________________XXXXX___
Data delay found: 14
10:32:53:setup_element:INFO: Eye window for uplink 18: __________________________________XXXXX_
Data delay found: 16
10:32:53:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
10:32:53:setup_element:INFO: Eye window for uplink 20: ____________________________________XXXX
Data delay found: 17
10:32:53:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
10:32:53:setup_element:INFO: Eye window for uplink 22: __________________________________XXXX__
Data delay found: 15
10:32:53:setup_element:INFO: Eye window for uplink 23: _________________________________XXXX___
Data delay found: 14
10:32:53:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
10:32:53:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
10:32:53:setup_element:INFO: Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
10:32:53:setup_element:INFO: Eye window for uplink 27: ________XXXXXX__________________________
Data delay found: 30
10:32:53:setup_element:INFO: Eye window for uplink 28: __________XXXXXX________________________
Data delay found: 32
10:32:53:setup_element:INFO: Eye window for uplink 29: ____________XXXXXX______________________
Data delay found: 34
10:32:53:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
10:32:53:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________
Data delay found: 36
10:32:53:setup_element:INFO: Setting the data phase to 18 for uplink 16
10:32:53:setup_element:INFO: Setting the data phase to 14 for uplink 17
10:32:53:setup_element:INFO: Setting the data phase to 16 for uplink 18
10:32:53:setup_element:INFO: Setting the data phase to 14 for uplink 19
10:32:53:setup_element:INFO: Setting the data phase to 17 for uplink 20
10:32:53:setup_element:INFO: Setting the data phase to 16 for uplink 21
10:32:53:setup_element:INFO: Setting the data phase to 15 for uplink 22
10:32:53:setup_element:INFO: Setting the data phase to 14 for uplink 23
10:32:53:setup_element:INFO: Setting the data phase to 27 for uplink 24
10:32:53:setup_element:INFO: Setting the data phase to 30 for uplink 25
10:32:53:setup_element:INFO: Setting the data phase to 27 for uplink 26
10:32:53:setup_element:INFO: Setting the data phase to 30 for uplink 27
10:32:53:setup_element:INFO: Setting the data phase to 32 for uplink 28
10:32:53:setup_element:INFO: Setting the data phase to 34 for uplink 29
10:32:53:setup_element:INFO: Setting the data phase to 37 for uplink 30
10:32:53:setup_element:INFO: Setting the data phase to 36 for uplink 31
10:32:53:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: _______________________________________________________________________XXXXXXX__
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXX___
Uplink 23: ______________________________________________________________________XXXXXXX___
Uplink 24: _______________________________________________________________________XXXXXXXX_
Uplink 25: _______________________________________________________________________XXXXXXXX_
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: ________________________________________________________________________XXXXXXX_
Uplink 31: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 17:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 18:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 17
Window Length: 36
Eye Window: ____________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 22:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 23:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 27:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 28:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
]
10:32:53:setup_element:INFO: Beginning SMX ASICs map scan
10:32:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:32:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:32:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:32:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:32:53:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:32:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:32:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:32:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:32:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:32:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:32:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:32:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:32:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:32:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:32:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:32:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:32:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:32:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:32:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:32:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:32:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:32:55:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: _______________________________________________________________________XXXXXXX__
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXX___
Uplink 23: ______________________________________________________________________XXXXXXX___
Uplink 24: _______________________________________________________________________XXXXXXXX_
Uplink 25: _______________________________________________________________________XXXXXXXX_
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: ________________________________________________________________________XXXXXXX_
Uplink 31: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 17:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 18:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 17
Window Length: 36
Eye Window: ____________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 22:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 23:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 27:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 28:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
10:32:55:setup_element:INFO: Performing Elink synchronization
10:32:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:32:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:32:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:32:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:32:55:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:32:55:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:32:56:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
10:32:56:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:32:56:febtest:INFO: 23-0 | XA-000-08-002-000-007-197-09 | 31.4 | 1224.5
10:32:57:febtest:INFO: 30-1 | XA-000-08-002-001-008-149-07 | 31.4 | 1218.6
10:32:57:febtest:INFO: 21-2 | XA-000-08-002-000-008-028-05 | 31.4 | 1236.2
10:32:57:febtest:INFO: 28-3 | XA-000-08-002-001-008-146-07 | 18.7 | 1259.6
10:32:57:febtest:INFO: 19-4 | XA-000-08-002-000-007-201-09 | 40.9 | 1183.3
10:32:58:febtest:INFO: 26-5 | XA-000-08-002-001-008-147-07 | 15.6 | 1277.1
10:32:58:febtest:INFO: 17-6 | XA-000-08-002-000-007-158-11 | 21.9 | 1253.7
10:32:58:febtest:INFO: 24-7 | XA-000-08-002-001-008-148-07 | 31.4 | 1206.9
10:32:58:ST3_smx:INFO: Configuring SMX FAST
10:33:00:ST3_smx:INFO: chip: 23-0 37.726682 C 1206.851500 mV
10:33:00:ST3_smx:INFO: Electrons
10:33:00:ST3_smx:INFO: # loops 0
10:33:02:ST3_smx:INFO: # loops 1
10:33:04:ST3_smx:INFO: # loops 2
10:33:05:ST3_smx:INFO: # loops 3
10:33:07:ST3_smx:INFO: # loops 4
10:33:09:ST3_smx:INFO: Total # of broken channels: 0
10:33:09:ST3_smx:INFO: List of broken channels: []
10:33:09:ST3_smx:INFO: Total # of broken channels: 0
10:33:09:ST3_smx:INFO: List of broken channels: []
10:33:09:ST3_smx:INFO: Configuring SMX FAST
10:33:11:ST3_smx:INFO: chip: 30-1 25.062742 C 1247.887635 mV
10:33:11:ST3_smx:INFO: Electrons
10:33:11:ST3_smx:INFO: # loops 0
10:33:13:ST3_smx:INFO: # loops 1
10:33:15:ST3_smx:INFO: # loops 2
10:33:16:ST3_smx:INFO: # loops 3
10:33:18:ST3_smx:INFO: # loops 4
10:33:20:ST3_smx:INFO: Total # of broken channels: 0
10:33:20:ST3_smx:INFO: List of broken channels: []
10:33:20:ST3_smx:INFO: Total # of broken channels: 0
10:33:20:ST3_smx:INFO: List of broken channels: []
10:33:20:ST3_smx:INFO: Configuring SMX FAST
10:33:22:ST3_smx:INFO: chip: 21-2 37.726682 C 1230.330540 mV
10:33:22:ST3_smx:INFO: Electrons
10:33:22:ST3_smx:INFO: # loops 0
10:33:24:ST3_smx:INFO: # loops 1
10:33:26:ST3_smx:INFO: # loops 2
10:33:27:ST3_smx:INFO: # loops 3
10:33:29:ST3_smx:INFO: # loops 4
10:33:31:ST3_smx:INFO: Total # of broken channels: 0
10:33:31:ST3_smx:INFO: List of broken channels: []
10:33:31:ST3_smx:INFO: Total # of broken channels: 9
10:33:31:ST3_smx:INFO: List of broken channels: [4, 6, 8, 12, 14, 16, 18, 20, 22]
10:33:31:ST3_smx:INFO: Configuring SMX FAST
10:33:33:ST3_smx:INFO: chip: 28-3 21.902970 C 1265.400000 mV
10:33:33:ST3_smx:INFO: Electrons
10:33:33:ST3_smx:INFO: # loops 0
10:33:35:ST3_smx:INFO: # loops 1
10:33:37:ST3_smx:INFO: # loops 2
10:33:38:ST3_smx:INFO: # loops 3
10:33:40:ST3_smx:INFO: # loops 4
10:33:42:ST3_smx:INFO: Total # of broken channels: 0
10:33:42:ST3_smx:INFO: List of broken channels: []
10:33:42:ST3_smx:INFO: Total # of broken channels: 0
10:33:42:ST3_smx:INFO: List of broken channels: []
10:33:42:ST3_smx:INFO: Configuring SMX FAST
10:33:44:ST3_smx:INFO: chip: 19-4 50.430383 C 1159.654860 mV
10:33:44:ST3_smx:INFO: Electrons
10:33:44:ST3_smx:INFO: # loops 0
10:33:46:ST3_smx:INFO: # loops 1
10:33:48:ST3_smx:INFO: # loops 2
10:33:49:ST3_smx:INFO: # loops 3
10:33:51:ST3_smx:INFO: # loops 4
10:33:53:ST3_smx:INFO: Total # of broken channels: 0
10:33:53:ST3_smx:INFO: List of broken channels: []
10:33:53:ST3_smx:INFO: Total # of broken channels: 0
10:33:53:ST3_smx:INFO: List of broken channels: []
10:33:53:ST3_smx:INFO: Configuring SMX FAST
10:33:55:ST3_smx:INFO: chip: 26-5 28.225000 C 1247.887635 mV
10:33:55:ST3_smx:INFO: Electrons
10:33:55:ST3_smx:INFO: # loops 0
10:33:57:ST3_smx:INFO: # loops 1
10:33:59:ST3_smx:INFO: # loops 2
10:34:00:ST3_smx:INFO: # loops 3
10:34:02:ST3_smx:INFO: # loops 4
10:34:04:ST3_smx:INFO: Total # of broken channels: 0
10:34:04:ST3_smx:INFO: List of broken channels: []
10:34:04:ST3_smx:INFO: Total # of broken channels: 0
10:34:04:ST3_smx:INFO: List of broken channels: []
10:34:04:ST3_smx:INFO: Configuring SMX FAST
10:34:06:ST3_smx:INFO: chip: 17-6 40.898880 C 1200.969315 mV
10:34:06:ST3_smx:INFO: Electrons
10:34:07:ST3_smx:INFO: # loops 0
10:34:08:ST3_smx:INFO: # loops 1
10:34:10:ST3_smx:INFO: # loops 2
10:34:12:ST3_smx:INFO: # loops 3
10:34:13:ST3_smx:INFO: # loops 4
10:34:15:ST3_smx:INFO: Total # of broken channels: 0
10:34:15:ST3_smx:INFO: List of broken channels: []
10:34:15:ST3_smx:INFO: Total # of broken channels: 0
10:34:15:ST3_smx:INFO: List of broken channels: []
10:34:16:ST3_smx:INFO: Configuring SMX FAST
10:34:18:ST3_smx:INFO: chip: 24-7 25.062742 C 1242.040240 mV
10:34:18:ST3_smx:INFO: Electrons
10:34:18:ST3_smx:INFO: # loops 0
10:34:19:ST3_smx:INFO: # loops 1
10:34:21:ST3_smx:INFO: # loops 2
10:34:23:ST3_smx:INFO: # loops 3
10:34:24:ST3_smx:INFO: # loops 4
10:34:26:ST3_smx:INFO: Total # of broken channels: 0
10:34:26:ST3_smx:INFO: List of broken channels: []
10:34:26:ST3_smx:INFO: Total # of broken channels: 0
10:34:26:ST3_smx:INFO: List of broken channels: []
10:34:27:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:34:27:febtest:INFO: 23-0 | XA-000-08-002-000-007-197-09 | 40.9 | 1212.7
10:34:27:febtest:INFO: 30-1 | XA-000-08-002-001-008-149-07 | 28.2 | 1247.9
10:34:27:febtest:INFO: 21-2 | XA-000-08-002-000-008-028-05 | 37.7 | 1236.2
10:34:27:febtest:INFO: 28-3 | XA-000-08-002-001-008-146-07 | 21.9 | 1265.4
10:34:28:febtest:INFO: 19-4 | XA-000-08-002-000-007-201-09 | 53.6 | 1153.7
10:34:28:febtest:INFO: 26-5 | XA-000-08-002-001-008-147-07 | 28.2 | 1247.9
10:34:28:febtest:INFO: 17-6 | XA-000-08-002-000-007-158-11 | 40.9 | 1201.0
10:34:28:febtest:INFO: 24-7 | XA-000-08-002-001-008-148-07 | 28.2 | 1242.0
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_22-10_32_45
OPERATOR : Oleksandr S.; Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4B3010323A2 124 C
FEB_SN : 2094
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.447', '1.8550', '1.846', '1.9210', '7.000', '1.5830', '7.000', '1.5830']
VI_after__Init : ['2.450', '1.9830', '1.850', '0.6147', '7.000', '1.5700', '7.000', '1.5700']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:34:34:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2094/TestDate_2024_01_22-10_32_45/