
FEB_2097 01.02.24 15:21:24
TextEdit.txt
15:21:04:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71 15:21:19:febtest:INFO: FEB 8-2 selected 15:21:19:smx_tester:INFO: Setting Elink clock mode to 160 MHz 15:21:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 15:21:24:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 15:21:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 15:21:24:febtest:INFO: Testing FEB with SN 2097 15:21:26:smx_tester:INFO: Scanning setup 15:21:26:elinks:INFO: Disabling clock on downlink 0 15:21:26:elinks:INFO: Disabling clock on downlink 1 15:21:26:elinks:INFO: Disabling clock on downlink 2 15:21:26:elinks:INFO: Disabling clock on downlink 3 15:21:26:elinks:INFO: Disabling clock on downlink 4 15:21:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:21:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 15:21:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:21:26:elinks:INFO: Disabling clock on downlink 0 15:21:26:elinks:INFO: Disabling clock on downlink 1 15:21:26:elinks:INFO: Disabling clock on downlink 2 15:21:26:elinks:INFO: Disabling clock on downlink 3 15:21:26:elinks:INFO: Disabling clock on downlink 4 15:21:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:21:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 15:21:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:21:26:elinks:INFO: Disabling clock on downlink 0 15:21:26:elinks:INFO: Disabling clock on downlink 1 15:21:26:elinks:INFO: Disabling clock on downlink 2 15:21:26:elinks:INFO: Disabling clock on downlink 3 15:21:26:elinks:INFO: Disabling clock on downlink 4 15:21:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:21:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 15:21:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 15:21:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 15:21:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:21:27:elinks:INFO: Disabling clock on downlink 0 15:21:27:elinks:INFO: Disabling clock on downlink 1 15:21:27:elinks:INFO: Disabling clock on downlink 2 15:21:27:elinks:INFO: Disabling clock on downlink 3 15:21:27:elinks:INFO: Disabling clock on downlink 4 15:21:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:21:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 15:21:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:21:27:elinks:INFO: Disabling clock on downlink 0 15:21:27:elinks:INFO: Disabling clock on downlink 1 15:21:27:elinks:INFO: Disabling clock on downlink 2 15:21:27:elinks:INFO: Disabling clock on downlink 3 15:21:27:elinks:INFO: Disabling clock on downlink 4 15:21:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:21:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 15:21:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:21:27:setup_element:INFO: Scanning clock phase 15:21:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 15:21:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 15:21:28:setup_element:INFO: Clock phase scan results for group 0, downlink 2 15:21:28:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 15:21:28:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 15:21:28:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 15:21:28:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 15:21:28:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 15:21:28:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 15:21:28:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 15:21:28:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 15:21:28:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 15:21:28:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 15:21:28:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 15:21:28:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 15:21:28:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 15:21:28:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 15:21:28:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 15:21:28:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 15:21:28:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 15:21:28:setup_element:INFO: Scanning data phases 15:21:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 15:21:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 15:21:33:setup_element:INFO: Data phase scan results for group 0, downlink 2 15:21:33:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX Data delay found: 18 15:21:33:setup_element:INFO: Eye window for uplink 17: ________________________________XXXX____ Data delay found: 13 15:21:33:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX Data delay found: 18 15:21:33:setup_element:INFO: Eye window for uplink 19: _________________________________XXXX___ Data delay found: 14 15:21:33:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX Data delay found: 17 15:21:33:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXXX_ Data delay found: 15 15:21:33:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX Data delay found: 18 15:21:33:setup_element:INFO: Eye window for uplink 23: __________________________________XXXXX_ Data delay found: 16 15:21:33:setup_element:INFO: Eye window for uplink 24: ____XXXXX_______________________________ Data delay found: 26 15:21:33:setup_element:INFO: Eye window for uplink 25: _______XXXX_X___________________________ Data delay found: 29 15:21:33:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________ Data delay found: 28 15:21:33:setup_element:INFO: Eye window for uplink 27: _________XXXXXX_________________________ Data delay found: 31 15:21:33:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________ Data delay found: 34 15:21:33:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________ Data delay found: 36 15:21:33:setup_element:INFO: Eye window for uplink 30: ______________XXXXX_____________________ Data delay found: 36 15:21:33:setup_element:INFO: Eye window for uplink 31: ____________XXXXX_______________________ Data delay found: 34 15:21:33:setup_element:INFO: Setting the data phase to 18 for uplink 16 15:21:33:setup_element:INFO: Setting the data phase to 13 for uplink 17 15:21:33:setup_element:INFO: Setting the data phase to 18 for uplink 18 15:21:33:setup_element:INFO: Setting the data phase to 14 for uplink 19 15:21:33:setup_element:INFO: Setting the data phase to 17 for uplink 20 15:21:33:setup_element:INFO: Setting the data phase to 15 for uplink 21 15:21:33:setup_element:INFO: Setting the data phase to 18 for uplink 22 15:21:33:setup_element:INFO: Setting the data phase to 16 for uplink 23 15:21:33:setup_element:INFO: Setting the data phase to 26 for uplink 24 15:21:33:setup_element:INFO: Setting the data phase to 29 for uplink 25 15:21:33:setup_element:INFO: Setting the data phase to 28 for uplink 26 15:21:33:setup_element:INFO: Setting the data phase to 31 for uplink 27 15:21:33:setup_element:INFO: Setting the data phase to 34 for uplink 28 15:21:33:setup_element:INFO: Setting the data phase to 36 for uplink 29 15:21:33:setup_element:INFO: Setting the data phase to 36 for uplink 30 15:21:33:setup_element:INFO: Setting the data phase to 34 for uplink 31 15:21:33:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 16: ______________________________________________________________________XXXXXXXX__ Uplink 17: ______________________________________________________________________XXXXXXXX__ Uplink 18: ______________________________________________________________________XXXXXXXXX_ Uplink 19: ______________________________________________________________________XXXXXXXXX_ Uplink 20: ______________________________________________________________________XXXXXXXX__ Uplink 21: ______________________________________________________________________XXXXXXXX__ Uplink 22: _______________________________________________________________________XXXXXXXX_ Uplink 23: _______________________________________________________________________XXXXXXXX_ Uplink 24: _____________________________________________________________________XXXXXXXX___ Uplink 25: _____________________________________________________________________XXXXXXXX___ Uplink 26: _______________________________________________________________________XXXXXXX__ Uplink 27: _______________________________________________________________________XXXXXXX__ Uplink 28: _______________________________________________________________________XXXXXXXX_ Uplink 29: _______________________________________________________________________XXXXXXXX_ Uplink 30: _______________________________________________________________________XXXXXXXX_ Uplink 31: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 17: Optimal Phase: 13 Window Length: 36 Eye Window: ________________________________XXXX____ Uplink 18: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 19: Optimal Phase: 14 Window Length: 36 Eye Window: _________________________________XXXX___ Uplink 20: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 21: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 22: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 23: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 24: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 25: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXX_X___________________________ Uplink 26: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 27: Optimal Phase: 31 Window Length: 34 Eye Window: _________XXXXXX_________________________ Uplink 28: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 29: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 30: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 31: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ ] 15:21:33:setup_element:INFO: Beginning SMX ASICs map scan 15:21:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 15:21:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 15:21:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 15:21:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 15:21:33:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 15:21:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 15:21:34:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 15:21:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 15:21:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 15:21:34:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 15:21:34:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 15:21:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 15:21:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 15:21:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 15:21:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 15:21:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 15:21:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 15:21:35:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 15:21:35:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 15:21:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 15:21:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 15:21:36:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 16: ______________________________________________________________________XXXXXXXX__ Uplink 17: ______________________________________________________________________XXXXXXXX__ Uplink 18: ______________________________________________________________________XXXXXXXXX_ Uplink 19: ______________________________________________________________________XXXXXXXXX_ Uplink 20: ______________________________________________________________________XXXXXXXX__ Uplink 21: ______________________________________________________________________XXXXXXXX__ Uplink 22: _______________________________________________________________________XXXXXXXX_ Uplink 23: _______________________________________________________________________XXXXXXXX_ Uplink 24: _____________________________________________________________________XXXXXXXX___ Uplink 25: _____________________________________________________________________XXXXXXXX___ Uplink 26: _______________________________________________________________________XXXXXXX__ Uplink 27: _______________________________________________________________________XXXXXXX__ Uplink 28: _______________________________________________________________________XXXXXXXX_ Uplink 29: _______________________________________________________________________XXXXXXXX_ Uplink 30: _______________________________________________________________________XXXXXXXX_ Uplink 31: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 17: Optimal Phase: 13 Window Length: 36 Eye Window: ________________________________XXXX____ Uplink 18: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 19: Optimal Phase: 14 Window Length: 36 Eye Window: _________________________________XXXX___ Uplink 20: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 21: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 22: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 23: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 24: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 25: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXX_X___________________________ Uplink 26: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 27: Optimal Phase: 31 Window Length: 34 Eye Window: _________XXXXXX_________________________ Uplink 28: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 29: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 30: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 31: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ 15:21:36:setup_element:INFO: Performing Elink synchronization 15:21:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 15:21:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 15:21:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 15:21:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 15:21:36:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 15:21:36:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 15:21:36:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] 15:21:38:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 15:21:38:febtest:INFO: 23-0 | XA-000-08-002-000-004-037-06 | 40.9 | 1183.3 15:21:38:febtest:INFO: 30-1 | XA-000-08-002-000-003-244-06 | 47.3 | 1159.7 15:21:39:febtest:INFO: 21-2 | XA-000-08-002-000-004-041-06 | 40.9 | 1189.2 15:21:39:febtest:INFO: 28-3 | XA-000-08-002-000-003-246-06 | 53.6 | 1135.9 15:21:39:febtest:INFO: 19-4 | XA-000-08-002-000-004-038-06 | 40.9 | 1189.2 15:21:39:febtest:INFO: 26-5 | XA-000-08-002-000-003-245-06 | 34.6 | 1218.6 15:21:40:febtest:INFO: 17-6 | XA-000-08-002-000-000-232-15 | 50.4 | 1153.7 15:21:40:febtest:INFO: 24-7 | XA-000-08-002-000-003-242-06 | 50.4 | 1165.6 15:21:40:ST3_smx:INFO: Configuring SMX FAST 15:21:42:ST3_smx:INFO: chip: 23-0 44.073563 C 1177.390875 mV 15:21:42:ST3_smx:INFO: Electrons 15:21:42:ST3_smx:INFO: # loops 0 15:21:44:ST3_smx:INFO: # loops 1 15:21:45:ST3_smx:INFO: # loops 2 15:21:47:ST3_smx:INFO: # loops 3 15:21:49:ST3_smx:INFO: # loops 4 15:21:50:ST3_smx:INFO: Total # of broken channels: 1 15:21:50:ST3_smx:INFO: List of broken channels: [11] 15:21:50:ST3_smx:INFO: Total # of broken channels: 1 15:21:50:ST3_smx:INFO: List of broken channels: [11] 15:21:51:ST3_smx:INFO: Configuring SMX FAST 15:21:53:ST3_smx:INFO: chip: 30-1 56.797143 C 1135.937260 mV 15:21:53:ST3_smx:INFO: Electrons 15:21:53:ST3_smx:INFO: # loops 0 15:21:55:ST3_smx:INFO: # loops 1 15:21:57:ST3_smx:INFO: # loops 2 15:21:58:ST3_smx:INFO: # loops 3 15:22:00:ST3_smx:INFO: # loops 4 15:22:01:ST3_smx:INFO: Total # of broken channels: 0 15:22:01:ST3_smx:INFO: List of broken channels: [] 15:22:01:ST3_smx:INFO: Total # of broken channels: 0 15:22:01:ST3_smx:INFO: List of broken channels: [] 15:22:02:ST3_smx:INFO: Configuring SMX FAST 15:22:04:ST3_smx:INFO: chip: 21-2 40.898880 C 1189.190035 mV 15:22:04:ST3_smx:INFO: Electrons 15:22:04:ST3_smx:INFO: # loops 0 15:22:06:ST3_smx:INFO: # loops 1 15:22:07:ST3_smx:INFO: # loops 2 15:22:09:ST3_smx:INFO: # loops 3 15:22:11:ST3_smx:INFO: # loops 4 15:22:12:ST3_smx:INFO: Total # of broken channels: 0 15:22:12:ST3_smx:INFO: List of broken channels: [] 15:22:12:ST3_smx:INFO: Total # of broken channels: 0 15:22:12:ST3_smx:INFO: List of broken channels: [] 15:22:13:ST3_smx:INFO: Configuring SMX FAST 15:22:15:ST3_smx:INFO: chip: 28-3 47.250730 C 1165.571835 mV 15:22:15:ST3_smx:INFO: Electrons 15:22:15:ST3_smx:INFO: # loops 0 15:22:17:ST3_smx:INFO: # loops 1 15:22:18:ST3_smx:INFO: # loops 2 15:22:20:ST3_smx:INFO: # loops 3 15:22:21:ST3_smx:INFO: # loops 4 15:22:23:ST3_smx:INFO: Total # of broken channels: 0 15:22:23:ST3_smx:INFO: List of broken channels: [] 15:22:23:ST3_smx:INFO: Total # of broken channels: 0 15:22:23:ST3_smx:INFO: List of broken channels: [] 15:22:24:ST3_smx:INFO: Configuring SMX FAST 15:22:26:ST3_smx:INFO: chip: 19-4 44.073563 C 1189.190035 mV 15:22:26:ST3_smx:INFO: Electrons 15:22:26:ST3_smx:INFO: # loops 0 15:22:27:ST3_smx:INFO: # loops 1 15:22:29:ST3_smx:INFO: # loops 2 15:22:31:ST3_smx:INFO: # loops 3 15:22:32:ST3_smx:INFO: # loops 4 15:22:34:ST3_smx:INFO: Total # of broken channels: 0 15:22:34:ST3_smx:INFO: List of broken channels: [] 15:22:34:ST3_smx:INFO: Total # of broken channels: 1 15:22:34:ST3_smx:INFO: List of broken channels: [7] 15:22:35:ST3_smx:INFO: Configuring SMX FAST 15:22:37:ST3_smx:INFO: chip: 26-5 37.726682 C 1212.728715 mV 15:22:37:ST3_smx:INFO: Electrons 15:22:37:ST3_smx:INFO: # loops 0 15:22:39:ST3_smx:INFO: # loops 1 15:22:40:ST3_smx:INFO: # loops 2 15:22:42:ST3_smx:INFO: # loops 3 15:22:44:ST3_smx:INFO: # loops 4 15:22:45:ST3_smx:INFO: Total # of broken channels: 0 15:22:45:ST3_smx:INFO: List of broken channels: [] 15:22:45:ST3_smx:INFO: Total # of broken channels: 0 15:22:45:ST3_smx:INFO: List of broken channels: [] 15:22:46:ST3_smx:INFO: Configuring SMX FAST 15:22:48:ST3_smx:INFO: chip: 17-6 53.612520 C 1153.732915 mV 15:22:48:ST3_smx:INFO: Electrons 15:22:48:ST3_smx:INFO: # loops 0 15:22:50:ST3_smx:INFO: # loops 1 15:22:52:ST3_smx:INFO: # loops 2 15:22:53:ST3_smx:INFO: # loops 3 15:22:55:ST3_smx:INFO: # loops 4 15:22:57:ST3_smx:INFO: Total # of broken channels: 0 15:22:57:ST3_smx:INFO: List of broken channels: [] 15:22:57:ST3_smx:INFO: Total # of broken channels: 0 15:22:57:ST3_smx:INFO: List of broken channels: [] 15:22:57:ST3_smx:INFO: Configuring SMX FAST 15:22:59:ST3_smx:INFO: chip: 24-7 44.073563 C 1183.292940 mV 15:22:59:ST3_smx:INFO: Electrons 15:22:59:ST3_smx:INFO: # loops 0 15:23:01:ST3_smx:INFO: # loops 1 15:23:03:ST3_smx:INFO: # loops 2 15:23:04:ST3_smx:INFO: # loops 3 15:23:06:ST3_smx:INFO: # loops 4 15:23:07:ST3_smx:INFO: Total # of broken channels: 0 15:23:07:ST3_smx:INFO: List of broken channels: [] 15:23:07:ST3_smx:INFO: Total # of broken channels: 0 15:23:07:ST3_smx:INFO: List of broken channels: [] 15:23:08:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 15:23:08:febtest:INFO: 23-0 | XA-000-08-002-000-004-037-06 | 44.1 | 1177.4 15:23:09:febtest:INFO: 30-1 | XA-000-08-002-000-003-244-06 | 56.8 | 1135.9 15:23:09:febtest:INFO: 21-2 | XA-000-08-002-000-004-041-06 | 44.1 | 1189.2 15:23:09:febtest:INFO: 28-3 | XA-000-08-002-000-003-246-06 | 47.3 | 1165.6 15:23:09:febtest:INFO: 19-4 | XA-000-08-002-000-004-038-06 | 44.1 | 1189.2 15:23:10:febtest:INFO: 26-5 | XA-000-08-002-000-003-245-06 | 37.7 | 1212.7 15:23:10:febtest:INFO: 17-6 | XA-000-08-002-000-000-232-15 | 53.6 | 1153.7 15:23:10:febtest:INFO: 24-7 | XA-000-08-002-000-003-242-06 | 44.1 | 1183.3 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 2024_02_01-15_21_24 OPERATOR : Alois Alzheimer SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 2097 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.451', '1.5750', '1.850', '2.2970', '2.450', '0.0001', '1.850', '0.0001'] VI_after__Init : ['0', '0', '0', '0', '0', '0'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 15:23:17:ST3_Shared:INFO: Listo of operators:Robert V.; 15:23:18:ST3_Shared:INFO: Listo of operators:Robert V.; Irakli K.; ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 2024_02_01-15_21_24 OPERATOR : Alois Alzheimer SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 2097 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.451', '1.5750', '1.850', '2.2970', '2.450', '0.0001', '1.850', '0.0001'] VI_after__Init : ['0', '0', '0', '0', '0', '0'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 15:23:26:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2097/TestDate_2024_02_01-15_21_24/