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FEB_2098 12.02.24 13:16:53
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13:16:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:16:53:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
13:16:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:16:53:febtest:INFO: Testing FEB with SN 2098
13:16:56:smx_tester:INFO: Scanning setup
13:16:56:elinks:INFO: Disabling clock on downlink 0
13:16:56:elinks:INFO: Disabling clock on downlink 1
13:16:56:elinks:INFO: Disabling clock on downlink 2
13:16:56:elinks:INFO: Disabling clock on downlink 3
13:16:56:elinks:INFO: Disabling clock on downlink 4
13:16:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:16:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:56:elinks:INFO: Disabling clock on downlink 0
13:16:56:elinks:INFO: Disabling clock on downlink 1
13:16:56:elinks:INFO: Disabling clock on downlink 2
13:16:56:elinks:INFO: Disabling clock on downlink 3
13:16:56:elinks:INFO: Disabling clock on downlink 4
13:16:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:16:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:56:elinks:INFO: Disabling clock on downlink 0
13:16:56:elinks:INFO: Disabling clock on downlink 1
13:16:56:elinks:INFO: Disabling clock on downlink 2
13:16:56:elinks:INFO: Disabling clock on downlink 3
13:16:56:elinks:INFO: Disabling clock on downlink 4
13:16:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:16:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:16:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:16:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:16:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:16:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:16:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:16:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:16:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:56:elinks:INFO: Disabling clock on downlink 0
13:16:56:elinks:INFO: Disabling clock on downlink 1
13:16:56:elinks:INFO: Disabling clock on downlink 2
13:16:56:elinks:INFO: Disabling clock on downlink 3
13:16:56:elinks:INFO: Disabling clock on downlink 4
13:16:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:16:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:57:elinks:INFO: Disabling clock on downlink 0
13:16:57:elinks:INFO: Disabling clock on downlink 1
13:16:57:elinks:INFO: Disabling clock on downlink 2
13:16:57:elinks:INFO: Disabling clock on downlink 3
13:16:57:elinks:INFO: Disabling clock on downlink 4
13:16:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:16:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:57:setup_element:INFO: Scanning clock phase
13:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:16:57:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:16:57:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:16:57:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:16:57:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:16:57:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:16:57:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:16:57:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:16:57:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:16:57:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:16:57:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
13:16:57:setup_element:INFO: Scanning data phases
13:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:17:02:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:17:02:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
13:17:02:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
13:17:02:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
13:17:02:setup_element:INFO: Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
13:17:02:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________
Data delay found: 33
13:17:02:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
13:17:02:setup_element:INFO: Eye window for uplink 30: ________________XXXXX___________________
Data delay found: 38
13:17:02:setup_element:INFO: Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
13:17:02:setup_element:INFO: Setting the data phase to 27 for uplink 24
13:17:02:setup_element:INFO: Setting the data phase to 30 for uplink 25
13:17:02:setup_element:INFO: Setting the data phase to 28 for uplink 26
13:17:02:setup_element:INFO: Setting the data phase to 31 for uplink 27
13:17:02:setup_element:INFO: Setting the data phase to 33 for uplink 28
13:17:02:setup_element:INFO: Setting the data phase to 35 for uplink 29
13:17:02:setup_element:INFO: Setting the data phase to 38 for uplink 30
13:17:02:setup_element:INFO: Setting the data phase to 35 for uplink 31
13:17:02:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXX____
Uplink 27: ____________________________________________________________________XXXXXXXX____
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 30:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
]
13:17:02:setup_element:INFO: Beginning SMX ASICs map scan
13:17:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:17:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:17:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:17:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:17:03:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:17:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:17:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:17:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:17:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:17:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:17:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:17:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:17:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:17:05:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXX____
Uplink 27: ____________________________________________________________________XXXXXXXX____
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 30:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
13:17:05:setup_element:INFO: Performing Elink synchronization
13:17:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:17:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:17:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:17:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:17:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:17:05:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
13:17:05:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
13:17:06:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:17:07:febtest:INFO: 30-1 | XA-000-08-002-002-006-245-04 | 40.9 | 1171.5
13:17:07:febtest:INFO: 28-3 | XA-000-08-002-002-006-223-10 | 44.1 | 1153.7
13:17:07:febtest:INFO: 26-5 | XA-000-08-002-002-006-224-03 | 34.6 | 1183.3
13:17:07:febtest:INFO: 24-7 | XA-000-08-002-002-006-225-03 | 34.6 | 1183.3
13:17:07:ST3_smx:INFO: Configuring SMX FAST
13:17:09:ST3_smx:INFO: chip: 30-1 44.073563 C 1153.732915 mV
13:17:09:ST3_smx:INFO: Electrons
13:17:09:ST3_smx:INFO: # loops 0
13:17:11:ST3_smx:INFO: # loops 1
13:17:13:ST3_smx:INFO: # loops 2
13:17:14:ST3_smx:INFO: # loops 3
13:17:16:ST3_smx:INFO: # loops 4
13:17:18:ST3_smx:INFO: Total # of broken channels: 0
13:17:18:ST3_smx:INFO: List of broken channels: []
13:17:18:ST3_smx:INFO: Total # of broken channels: 0
13:17:18:ST3_smx:INFO: List of broken channels: []
13:17:19:ST3_smx:INFO: Configuring SMX FAST
13:17:21:ST3_smx:INFO: chip: 28-3 40.898880 C 1153.732915 mV
13:17:21:ST3_smx:INFO: Electrons
13:17:21:ST3_smx:INFO: # loops 0
13:17:22:ST3_smx:INFO: # loops 1
13:17:24:ST3_smx:INFO: # loops 2
13:17:26:ST3_smx:INFO: # loops 3
13:17:27:ST3_smx:INFO: # loops 4
13:17:29:ST3_smx:INFO: Total # of broken channels: 0
13:17:29:ST3_smx:INFO: List of broken channels: []
13:17:29:ST3_smx:INFO: Total # of broken channels: 0
13:17:29:ST3_smx:INFO: List of broken channels: []
13:17:30:ST3_smx:INFO: Configuring SMX FAST
13:17:32:ST3_smx:INFO: chip: 26-5 34.556970 C 1183.292940 mV
13:17:32:ST3_smx:INFO: Electrons
13:17:32:ST3_smx:INFO: # loops 0
13:17:34:ST3_smx:INFO: # loops 1
13:17:36:ST3_smx:INFO: # loops 2
13:17:37:ST3_smx:INFO: # loops 3
13:17:39:ST3_smx:INFO: # loops 4
13:17:41:ST3_smx:INFO: Total # of broken channels: 0
13:17:41:ST3_smx:INFO: List of broken channels: []
13:17:41:ST3_smx:INFO: Total # of broken channels: 0
13:17:41:ST3_smx:INFO: List of broken channels: []
13:17:42:ST3_smx:INFO: Configuring SMX FAST
13:17:44:ST3_smx:INFO: chip: 24-7 34.556970 C 1177.390875 mV
13:17:44:ST3_smx:INFO: Electrons
13:17:44:ST3_smx:INFO: # loops 0
13:17:45:ST3_smx:INFO: # loops 1
13:17:47:ST3_smx:INFO: # loops 2
13:17:49:ST3_smx:INFO: # loops 3
13:17:50:ST3_smx:INFO: # loops 4
13:17:52:ST3_smx:INFO: Total # of broken channels: 0
13:17:52:ST3_smx:INFO: List of broken channels: []
13:17:52:ST3_smx:INFO: Total # of broken channels: 0
13:17:52:ST3_smx:INFO: List of broken channels: []
13:17:53:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:17:53:febtest:INFO: 30-1 | XA-000-08-002-002-006-245-04 | 44.1 | 1153.7
13:17:53:febtest:INFO: 28-3 | XA-000-08-002-002-006-223-10 | 40.9 | 1159.7
13:17:54:febtest:INFO: 26-5 | XA-000-08-002-002-006-224-03 | 34.6 | 1183.3
13:17:54:febtest:INFO: 24-7 | XA-000-08-002-002-006-225-03 | 37.7 | 1177.4
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_12-13_16_53
OPERATOR : Kerstin S.; Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T3001163A2 124 B
FEB_SN : 2098
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.0003', '1.850', '0.0000', '2.450', '0.9920', '1.850', '1.2030']
VI_after__Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '2.0190', '1.850', '0.3237']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:17:59:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2098/TestDate_2024_02_12-13_16_53/