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FEB_2099 23.02.24 10:41:05
TextEdit.txt
10:40:58:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
10:40:59:febtest:INFO: FEB type: 8.2
10:40:59:febtest:INFO: FEB SN: 2099
10:40:59:febtest:INFO: FEB 8-2 selected
10:40:59:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:41:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:41:05:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
10:41:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
--- Logging error ---
Traceback (most recent call last):
File "/usr/lib/python3.8/logging/__init__.py", line 1085, in emit
msg = self.format(record)
File "/usr/lib/python3.8/logging/__init__.py", line 929, in format
return fmt.format(record)
File "/usr/lib/python3.8/logging/__init__.py", line 668, in format
record.message = record.getMessage()
File "/usr/lib/python3.8/logging/__init__.py", line 373, in getMessage
msg = msg % self.args
TypeError: not all arguments converted during string formatting
Call stack:
File "febtest.py", line 714, in <module>
sys.exit( app.exec_() )
File "febtest.py", line 395, in DoFEB_SensorTest
if not self.ModuleSelector.exec():
File "/home/cbm/ST3_v2.29.13/lib/ST3_ModuleSelector.py", line 64, in DoModuleQR_Scanning
self.DoParseString( self.ModuleName )
File "/home/cbm/ST3_v2.29.13/lib/ST3_ModuleSelector.py", line 83, in DoParseString
ModScanlog.debug( qr_string , len(qr_string))
Message: 'L5DL500118 M5DL5T0001180A2 62 C\n'
Arguments: (32,)
10:41:09:ST3_ModuleSelector:DEBUG: L5DL500118 M5DL5T0001180A2 62 C
10:41:09:ST3_ModuleSelector:DEBUG:
10:41:09:ST3_ModuleSelector:DEBUG: L5DL500118
10:41:09:ST3_ModuleSelector:DEBUG: M5DL5T0001180A2
10:41:09:ST3_ModuleSelector:DEBUG: 62
10:41:09:ST3_ModuleSelector:DEBUG: C
10:41:09:ST3_ModuleSelector:DEBUG: L5DL500118 M5DL5T0001180A2 62 C
10:41:09:ST3_ModuleSelector:DEBUG:
10:41:09:ST3_ModuleSelector:DEBUG: L5DL500118
10:41:09:ST3_ModuleSelector:DEBUG: M5DL5T0001180A2
10:41:09:ST3_ModuleSelector:DEBUG: 62
10:41:09:ST3_ModuleSelector:DEBUG: C
10:41:34:ST3_ModuleSelector:INFO: L5DL500118 M5DL5T0001180A2 62 C
10:41:34:ST3_ModuleSelector:INFO:
10:41:35:febtest:INFO: Testing FEB with SN 2099
10:41:37:smx_tester:INFO: Scanning setup
10:41:37:elinks:INFO: Disabling clock on downlink 0
10:41:37:elinks:INFO: Disabling clock on downlink 1
10:41:37:elinks:INFO: Disabling clock on downlink 2
10:41:37:elinks:INFO: Disabling clock on downlink 3
10:41:37:elinks:INFO: Disabling clock on downlink 4
10:41:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:41:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:41:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:41:38:elinks:INFO: Disabling clock on downlink 0
10:41:38:elinks:INFO: Disabling clock on downlink 1
10:41:38:elinks:INFO: Disabling clock on downlink 2
10:41:38:elinks:INFO: Disabling clock on downlink 3
10:41:38:elinks:INFO: Disabling clock on downlink 4
10:41:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:41:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:41:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:41:38:elinks:INFO: Disabling clock on downlink 0
10:41:38:elinks:INFO: Disabling clock on downlink 1
10:41:38:elinks:INFO: Disabling clock on downlink 2
10:41:38:elinks:INFO: Disabling clock on downlink 3
10:41:38:elinks:INFO: Disabling clock on downlink 4
10:41:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:41:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:41:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:41:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:41:38:elinks:INFO: Disabling clock on downlink 0
10:41:38:elinks:INFO: Disabling clock on downlink 1
10:41:38:elinks:INFO: Disabling clock on downlink 2
10:41:38:elinks:INFO: Disabling clock on downlink 3
10:41:38:elinks:INFO: Disabling clock on downlink 4
10:41:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:41:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:41:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:41:38:elinks:INFO: Disabling clock on downlink 0
10:41:38:elinks:INFO: Disabling clock on downlink 1
10:41:38:elinks:INFO: Disabling clock on downlink 2
10:41:38:elinks:INFO: Disabling clock on downlink 3
10:41:38:elinks:INFO: Disabling clock on downlink 4
10:41:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:41:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:41:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:41:38:setup_element:INFO: Scanning clock phase
10:41:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:41:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:41:39:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:41:39:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:41:39:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:41:39:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:41:39:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:41:39:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:41:39:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:41:39:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:41:39:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:41:39:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:41:39:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:41:39:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:41:39:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:41:39:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:41:39:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:41:39:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:41:39:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:41:39:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
10:41:39:setup_element:INFO: Scanning data phases
10:41:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:41:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:41:44:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:41:44:setup_element:INFO: Eye window for uplink 16: XX____________________________________XX
Data delay found: 19
10:41:44:setup_element:INFO: Eye window for uplink 17: __________________________________XXXX__
Data delay found: 15
10:41:44:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
10:41:44:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
10:41:44:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX
Data delay found: 17
10:41:44:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
10:41:44:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXX_
Data delay found: 17
10:41:44:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
10:41:44:setup_element:INFO: Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
10:41:44:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
10:41:44:setup_element:INFO: Eye window for uplink 26: ______XXXXX_________________________XXXX
Data delay found: 23
10:41:44:setup_element:INFO: Eye window for uplink 27: __________XXXXX_____________________XXXX
Data delay found: 25
10:41:44:setup_element:INFO: Eye window for uplink 28: _____________XXXX_______________________
Data delay found: 34
10:41:44:setup_element:INFO: Eye window for uplink 29: _______________XXXX_____________________
Data delay found: 36
10:41:44:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
10:41:44:setup_element:INFO: Eye window for uplink 31: ______________XXXX______________________
Data delay found: 35
10:41:44:setup_element:INFO: Setting the data phase to 19 for uplink 16
10:41:44:setup_element:INFO: Setting the data phase to 15 for uplink 17
10:41:44:setup_element:INFO: Setting the data phase to 18 for uplink 18
10:41:44:setup_element:INFO: Setting the data phase to 15 for uplink 19
10:41:44:setup_element:INFO: Setting the data phase to 17 for uplink 20
10:41:44:setup_element:INFO: Setting the data phase to 16 for uplink 21
10:41:44:setup_element:INFO: Setting the data phase to 17 for uplink 22
10:41:44:setup_element:INFO: Setting the data phase to 15 for uplink 23
10:41:44:setup_element:INFO: Setting the data phase to 26 for uplink 24
10:41:44:setup_element:INFO: Setting the data phase to 29 for uplink 25
10:41:44:setup_element:INFO: Setting the data phase to 23 for uplink 26
10:41:44:setup_element:INFO: Setting the data phase to 25 for uplink 27
10:41:44:setup_element:INFO: Setting the data phase to 34 for uplink 28
10:41:44:setup_element:INFO: Setting the data phase to 36 for uplink 29
10:41:44:setup_element:INFO: Setting the data phase to 37 for uplink 30
10:41:44:setup_element:INFO: Setting the data phase to 35 for uplink 31
10:41:44:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXXX
Uplink 17: _______________________________________________________________________XXXXXXXXX
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: _______________________________________________________________________XXXXXXX__
Uplink 23: _______________________________________________________________________XXXXXXX__
Uplink 24: ______________________________________________________________________XXXXXXXXX_
Uplink 25: ______________________________________________________________________XXXXXXXXX_
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: ________________________________________________________________________XXXXXXXX
Uplink 29: ________________________________________________________________________XXXXXXXX
Uplink 30: _________________________________________________________________________XXXXXX_
Uplink 31: _________________________________________________________________________XXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 36
Eye Window: XX____________________________________XX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXX_
Uplink 23:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 23
Window Length: 25
Eye Window: ______XXXXX_________________________XXXX
Uplink 27:
Optimal Phase: 25
Window Length: 21
Eye Window: __________XXXXX_____________________XXXX
Uplink 28:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
Uplink 29:
Optimal Phase: 36
Window Length: 36
Eye Window: _______________XXXX_____________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
]
10:41:44:setup_element:INFO: Beginning SMX ASICs map scan
10:41:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:41:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:41:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:41:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:41:44:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:41:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:41:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:41:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:41:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:41:45:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:41:45:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:41:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:41:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:41:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:41:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:41:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:41:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:41:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:41:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:41:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:41:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:41:47:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXXX
Uplink 17: _______________________________________________________________________XXXXXXXXX
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: _______________________________________________________________________XXXXXXX__
Uplink 23: _______________________________________________________________________XXXXXXX__
Uplink 24: ______________________________________________________________________XXXXXXXXX_
Uplink 25: ______________________________________________________________________XXXXXXXXX_
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: ________________________________________________________________________XXXXXXXX
Uplink 29: ________________________________________________________________________XXXXXXXX
Uplink 30: _________________________________________________________________________XXXXXX_
Uplink 31: _________________________________________________________________________XXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 36
Eye Window: XX____________________________________XX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXX_
Uplink 23:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 23
Window Length: 25
Eye Window: ______XXXXX_________________________XXXX
Uplink 27:
Optimal Phase: 25
Window Length: 21
Eye Window: __________XXXXX_____________________XXXX
Uplink 28:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
Uplink 29:
Optimal Phase: 36
Window Length: 36
Eye Window: _______________XXXX_____________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
10:41:47:setup_element:INFO: Performing Elink synchronization
10:41:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:41:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:41:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:41:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:41:47:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:41:47:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:41:47:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
10:41:49:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:41:49:febtest:INFO: 23-00 | XA-000-08-002-001-007-214-06 | 50.4 | 1171.5
10:41:49:febtest:INFO: 30-01 | XA-000-08-002-001-007-222-06 | 31.4 | 1224.5
10:41:50:febtest:INFO: 21-02 | XA-000-08-002-002-007-014-15 | 44.1 | 1177.4
10:41:50:febtest:INFO: 28-03 | XA-000-08-002-002-007-016-08 | 9.3 | 1306.1
10:41:50:febtest:INFO: 19-04 | XA-000-08-002-002-007-019-08 | 40.9 | 1195.1
10:41:50:febtest:INFO: 26-05 | XA-000-08-002-002-007-017-08 | 37.7 | 1201.0
10:41:51:febtest:INFO: 17-06 | XA-000-08-002-001-007-213-06 | 53.6 | 1147.8
10:41:51:febtest:INFO: 24-07 | XA-000-08-002-002-007-024-08 | 31.4 | 1230.3
10:41:51:ST3_smx:INFO: Configuring SMX FAST
10:41:53:ST3_smx:INFO: chip: 23-0 53.612520 C 1153.732915 mV
10:41:53:ST3_smx:INFO: Electrons
10:41:53:ST3_smx:INFO: # loops 0
10:41:55:ST3_smx:INFO: # loops 1
10:41:57:ST3_smx:INFO: # loops 2
10:41:58:ST3_smx:INFO: # loops 3
10:42:00:ST3_smx:INFO: # loops 4
10:42:02:ST3_smx:INFO: Total # of broken channels: 0
10:42:02:ST3_smx:INFO: List of broken channels: []
10:42:02:ST3_smx:INFO: Total # of broken channels: 1
10:42:02:ST3_smx:INFO: List of broken channels: [0]
10:42:02:ST3_smx:INFO: Configuring SMX FAST
10:42:04:ST3_smx:INFO: chip: 30-1 31.389742 C 1230.330540 mV
10:42:04:ST3_smx:INFO: Electrons
10:42:04:ST3_smx:INFO: # loops 0
10:42:06:ST3_smx:INFO: # loops 1
10:42:07:ST3_smx:INFO: # loops 2
10:42:09:ST3_smx:INFO: # loops 3
10:42:10:ST3_smx:INFO: # loops 4
10:42:12:ST3_smx:INFO: Total # of broken channels: 0
10:42:12:ST3_smx:INFO: List of broken channels: []
10:42:12:ST3_smx:INFO: Total # of broken channels: 0
10:42:12:ST3_smx:INFO: List of broken channels: []
10:42:12:ST3_smx:INFO: Configuring SMX FAST
10:42:14:ST3_smx:INFO: chip: 21-2 47.250730 C 1177.390875 mV
10:42:14:ST3_smx:INFO: Electrons
10:42:14:ST3_smx:INFO: # loops 0
10:42:16:ST3_smx:INFO: # loops 1
10:42:18:ST3_smx:INFO: # loops 2
10:42:19:ST3_smx:INFO: # loops 3
10:42:21:ST3_smx:INFO: # loops 4
10:42:23:ST3_smx:INFO: Total # of broken channels: 0
10:42:23:ST3_smx:INFO: List of broken channels: []
10:42:23:ST3_smx:INFO: Total # of broken channels: 0
10:42:23:ST3_smx:INFO: List of broken channels: []
10:42:23:ST3_smx:INFO: Configuring SMX FAST
10:42:25:ST3_smx:INFO: chip: 28-3 31.389742 C 1247.887635 mV
10:42:25:ST3_smx:INFO: Electrons
10:42:25:ST3_smx:INFO: # loops 0
10:42:27:ST3_smx:INFO: # loops 1
10:42:28:ST3_smx:INFO: # loops 2
10:42:30:ST3_smx:INFO: # loops 3
10:42:31:ST3_smx:INFO: # loops 4
10:42:33:ST3_smx:INFO: Total # of broken channels: 0
10:42:33:ST3_smx:INFO: List of broken channels: []
10:42:33:ST3_smx:INFO: Total # of broken channels: 0
10:42:33:ST3_smx:INFO: List of broken channels: []
10:42:33:ST3_smx:INFO: Configuring SMX FAST
10:42:35:ST3_smx:INFO: chip: 19-4 47.250730 C 1189.190035 mV
10:42:35:ST3_smx:INFO: Electrons
10:42:35:ST3_smx:INFO: # loops 0
10:42:37:ST3_smx:INFO: # loops 1
10:42:39:ST3_smx:INFO: # loops 2
10:42:40:ST3_smx:INFO: # loops 3
10:42:42:ST3_smx:INFO: # loops 4
10:42:44:ST3_smx:INFO: Total # of broken channels: 0
10:42:44:ST3_smx:INFO: List of broken channels: []
10:42:44:ST3_smx:INFO: Total # of broken channels: 0
10:42:44:ST3_smx:INFO: List of broken channels: []
10:42:44:ST3_smx:INFO: Configuring SMX FAST
10:42:46:ST3_smx:INFO: chip: 26-5 34.556970 C 1236.187875 mV
10:42:46:ST3_smx:INFO: Electrons
10:42:46:ST3_smx:INFO: # loops 0
10:42:48:ST3_smx:INFO: # loops 1
10:42:49:ST3_smx:INFO: # loops 2
10:42:51:ST3_smx:INFO: # loops 3
10:42:53:ST3_smx:INFO: # loops 4
10:42:55:ST3_smx:INFO: Total # of broken channels: 0
10:42:55:ST3_smx:INFO: List of broken channels: []
10:42:55:ST3_smx:INFO: Total # of broken channels: 1
10:42:55:ST3_smx:INFO: List of broken channels: [125]
10:42:55:ST3_smx:INFO: Configuring SMX FAST
10:42:57:ST3_smx:INFO: chip: 17-6 53.612520 C 1159.654860 mV
10:42:57:ST3_smx:INFO: Electrons
10:42:57:ST3_smx:INFO: # loops 0
10:42:58:ST3_smx:INFO: # loops 1
10:43:00:ST3_smx:INFO: # loops 2
10:43:02:ST3_smx:INFO: # loops 3
10:43:03:ST3_smx:INFO: # loops 4
10:43:05:ST3_smx:INFO: Total # of broken channels: 0
10:43:05:ST3_smx:INFO: List of broken channels: []
10:43:05:ST3_smx:INFO: Total # of broken channels: 0
10:43:05:ST3_smx:INFO: List of broken channels: []
10:43:05:ST3_smx:INFO: Configuring SMX FAST
10:43:07:ST3_smx:INFO: chip: 24-7 40.898880 C 1212.728715 mV
10:43:07:ST3_smx:INFO: Electrons
10:43:07:ST3_smx:INFO: # loops 0
10:43:09:ST3_smx:INFO: # loops 1
10:43:10:ST3_smx:INFO: # loops 2
10:43:12:ST3_smx:INFO: # loops 3
10:43:14:ST3_smx:INFO: # loops 4
10:43:15:ST3_smx:INFO: Total # of broken channels: 0
10:43:15:ST3_smx:INFO: List of broken channels: []
10:43:15:ST3_smx:INFO: Total # of broken channels: 0
10:43:15:ST3_smx:INFO: List of broken channels: []
10:43:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:43:16:febtest:INFO: 23-00 | XA-000-08-002-001-007-214-06 | 60.0 | 1153.7
10:43:16:febtest:INFO: 30-01 | XA-000-08-002-001-007-222-06 | 34.6 | 1236.2
10:43:17:febtest:INFO: 21-02 | XA-000-08-002-002-007-014-15 | 50.4 | 1177.4
10:43:17:febtest:INFO: 28-03 | XA-000-08-002-002-007-016-08 | 31.4 | 1247.9
10:43:17:febtest:INFO: 19-04 | XA-000-08-002-002-007-019-08 | 47.3 | 1189.2
10:43:17:febtest:INFO: 26-05 | XA-000-08-002-002-007-017-08 | 34.6 | 1236.2
10:43:18:febtest:INFO: 17-06 | XA-000-08-002-001-007-213-06 | 56.8 | 1159.7
10:43:18:febtest:INFO: 24-07 | XA-000-08-002-002-007-024-08 | 40.9 | 1212.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_02_23-10_41_05
OPERATOR : Alois Alzheimer
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5DL500118 M5DL5T0001180A2 62 C
FEB_SN : 2099
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
SENSOR_ID:
MODULE_NAME: L5DL500118 M5DL5T0001180A2 62 C
MODULE_TYPE:
MODULE_LADDER: L5DL500118
MODULE_MODULE: M5DL5T0001180A2
MODULE_SIZE: 62
MODULE_GRADE: C
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8720', '1.850', '0.4206']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9870', '1.850', '0.3190']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']