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FEB_2100 31.01.24 15:11:00
Info
15:10:49:febtest:INFO: FEB 8-2 selected
15:10:49:smx_tester:INFO: Setting Elink clock mode to 160 MHz
15:11:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:11:00:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
15:11:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:11:01:febtest:INFO: Testing FEB with SN 2100
15:11:02:smx_tester:INFO: Scanning setup
15:11:02:elinks:INFO: Disabling clock on downlink 0
15:11:02:elinks:INFO: Disabling clock on downlink 1
15:11:02:elinks:INFO: Disabling clock on downlink 2
15:11:02:elinks:INFO: Disabling clock on downlink 3
15:11:02:elinks:INFO: Disabling clock on downlink 4
15:11:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:11:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:11:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:11:02:elinks:INFO: Disabling clock on downlink 0
15:11:02:elinks:INFO: Disabling clock on downlink 1
15:11:02:elinks:INFO: Disabling clock on downlink 2
15:11:03:elinks:INFO: Disabling clock on downlink 3
15:11:03:elinks:INFO: Disabling clock on downlink 4
15:11:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:11:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:11:03:elinks:INFO: Disabling clock on downlink 0
15:11:03:elinks:INFO: Disabling clock on downlink 1
15:11:03:elinks:INFO: Disabling clock on downlink 2
15:11:03:elinks:INFO: Disabling clock on downlink 3
15:11:03:elinks:INFO: Disabling clock on downlink 4
15:11:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:11:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:11:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:11:03:elinks:INFO: Disabling clock on downlink 0
15:11:03:elinks:INFO: Disabling clock on downlink 1
15:11:03:elinks:INFO: Disabling clock on downlink 2
15:11:03:elinks:INFO: Disabling clock on downlink 3
15:11:03:elinks:INFO: Disabling clock on downlink 4
15:11:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:11:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:11:03:elinks:INFO: Disabling clock on downlink 0
15:11:03:elinks:INFO: Disabling clock on downlink 1
15:11:03:elinks:INFO: Disabling clock on downlink 2
15:11:03:elinks:INFO: Disabling clock on downlink 3
15:11:03:elinks:INFO: Disabling clock on downlink 4
15:11:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:11:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:11:03:setup_element:INFO: Scanning clock phase
15:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:11:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:11:04:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:11:04:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:11:04:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:11:04:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:11:04:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:11:04:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:11:04:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:11:04:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:11:04:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:11:04:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
15:11:04:setup_element:INFO: Scanning data phases
15:11:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:11:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:11:09:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:11:09:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
15:11:09:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
15:11:09:setup_element:INFO: Eye window for uplink 26: ______XXXXXX____________________________
Data delay found: 28
15:11:09:setup_element:INFO: Eye window for uplink 27: ___________XXXX_________________________
Data delay found: 32
15:11:09:setup_element:INFO: Eye window for uplink 28: __________XXXXXX________________________
Data delay found: 32
15:11:09:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
15:11:09:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
15:11:09:setup_element:INFO: Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
15:11:09:setup_element:INFO: Setting the data phase to 28 for uplink 24
15:11:09:setup_element:INFO: Setting the data phase to 31 for uplink 25
15:11:09:setup_element:INFO: Setting the data phase to 28 for uplink 26
15:11:09:setup_element:INFO: Setting the data phase to 32 for uplink 27
15:11:09:setup_element:INFO: Setting the data phase to 32 for uplink 28
15:11:09:setup_element:INFO: Setting the data phase to 34 for uplink 29
15:11:09:setup_element:INFO: Setting the data phase to 36 for uplink 30
15:11:09:setup_element:INFO: Setting the data phase to 35 for uplink 31
15:11:09:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 28:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
]
15:11:09:setup_element:INFO: Beginning SMX ASICs map scan
15:11:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:11:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:11:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:11:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:11:09:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
15:11:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:11:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:11:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:11:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:11:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:11:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:11:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:11:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:11:12:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 28:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
15:11:12:setup_element:INFO: Performing Elink synchronization
15:11:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:11:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:11:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:11:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:11:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:11:12:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
15:11:12:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
15:11:13:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:11:13:febtest:INFO: 30-1 | XA-000-08-002-000-004-056-01 | 44.1 | 1165.6
15:11:13:febtest:INFO: 28-3 | XA-000-08-002-000-004-057-01 | 40.9 | 1183.3
15:11:13:febtest:INFO: 26-5 | XA-000-08-002-000-004-046-06 | 34.6 | 1206.9
15:11:14:febtest:INFO: 24-7 | XA-000-08-002-000-004-047-06 | 21.9 | 1242.0
15:11:14:ST3_smx:INFO: Configuring SMX FAST
15:11:16:ST3_smx:INFO: chip: 30-1 34.556970 C 1200.969315 mV
15:11:16:ST3_smx:INFO: Electrons
15:11:16:ST3_smx:INFO: # loops 0
15:11:17:ST3_smx:INFO: # loops 1
15:11:19:ST3_smx:INFO: # loops 2
15:11:20:ST3_smx:INFO: # loops 3
15:11:22:ST3_smx:INFO: # loops 4
15:11:24:ST3_smx:INFO: Total # of broken channels: 0
15:11:24:ST3_smx:INFO: List of broken channels: []
15:11:24:ST3_smx:INFO: Total # of broken channels: 0
15:11:24:ST3_smx:INFO: List of broken channels: []
15:11:25:ST3_smx:INFO: Configuring SMX FAST
15:11:27:ST3_smx:INFO: chip: 28-3 37.726682 C 1200.969315 mV
15:11:27:ST3_smx:INFO: Electrons
15:11:27:ST3_smx:INFO: # loops 0
15:11:28:ST3_smx:INFO: # loops 1
15:11:30:ST3_smx:INFO: # loops 2
15:11:31:ST3_smx:INFO: # loops 3
15:11:33:ST3_smx:INFO: # loops 4
15:11:35:ST3_smx:INFO: Total # of broken channels: 0
15:11:35:ST3_smx:INFO: List of broken channels: []
15:11:35:ST3_smx:INFO: Total # of broken channels: 0
15:11:35:ST3_smx:INFO: List of broken channels: []
15:11:35:ST3_smx:INFO: Configuring SMX FAST
15:11:37:ST3_smx:INFO: chip: 26-5 37.726682 C 1189.190035 mV
15:11:37:ST3_smx:INFO: Electrons
15:11:37:ST3_smx:INFO: # loops 0
15:11:39:ST3_smx:INFO: # loops 1
15:11:41:ST3_smx:INFO: # loops 2
15:11:42:ST3_smx:INFO: # loops 3
15:11:44:ST3_smx:INFO: # loops 4
15:11:45:ST3_smx:INFO: Total # of broken channels: 0
15:11:45:ST3_smx:INFO: List of broken channels: []
15:11:45:ST3_smx:INFO: Total # of broken channels: 0
15:11:45:ST3_smx:INFO: List of broken channels: []
15:11:46:ST3_smx:INFO: Configuring SMX FAST
15:11:48:ST3_smx:INFO: chip: 24-7 28.225000 C 1218.600960 mV
15:11:48:ST3_smx:INFO: Electrons
15:11:48:ST3_smx:INFO: # loops 0
15:11:50:ST3_smx:INFO: # loops 1
15:11:52:ST3_smx:INFO: # loops 2
15:11:53:ST3_smx:INFO: # loops 3
15:11:55:ST3_smx:INFO: # loops 4
15:11:56:ST3_smx:INFO: Total # of broken channels: 0
15:11:56:ST3_smx:INFO: List of broken channels: []
15:11:56:ST3_smx:INFO: Total # of broken channels: 0
15:11:56:ST3_smx:INFO: List of broken channels: []
15:11:57:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:11:57:febtest:INFO: 30-1 | XA-000-08-002-000-004-056-01 | 34.6 | 1201.0
15:11:58:febtest:INFO: 28-3 | XA-000-08-002-000-004-057-01 | 37.7 | 1201.0
15:11:58:febtest:INFO: 26-5 | XA-000-08-002-000-004-046-06 | 40.9 | 1189.2
15:11:58:febtest:INFO: 24-7 | XA-000-08-002-000-004-047-06 | 28.2 | 1218.6
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_31-15_11_00
OPERATOR : Robert V.; Irakli K.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 2100
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '0.9788', '1.850', '1.2290', '2.450', '0.0002', '1.850', '0.0001']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']15:12:18:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2100/TestDate_2024_01_31-15_11_00/