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FEB_2100 01.02.24 15:05:07
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15:05:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:05:07:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
15:05:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:05:08:febtest:INFO: Testing FEB with SN 2100
15:05:09:smx_tester:INFO: Scanning setup
15:05:09:elinks:INFO: Disabling clock on downlink 0
15:05:09:elinks:INFO: Disabling clock on downlink 1
15:05:09:elinks:INFO: Disabling clock on downlink 2
15:05:10:elinks:INFO: Disabling clock on downlink 3
15:05:10:elinks:INFO: Disabling clock on downlink 4
15:05:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:05:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:05:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:05:10:elinks:INFO: Disabling clock on downlink 0
15:05:10:elinks:INFO: Disabling clock on downlink 1
15:05:10:elinks:INFO: Disabling clock on downlink 2
15:05:10:elinks:INFO: Disabling clock on downlink 3
15:05:10:elinks:INFO: Disabling clock on downlink 4
15:05:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:05:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:05:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:05:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:05:10:elinks:INFO: Disabling clock on downlink 0
15:05:10:elinks:INFO: Disabling clock on downlink 1
15:05:10:elinks:INFO: Disabling clock on downlink 2
15:05:10:elinks:INFO: Disabling clock on downlink 3
15:05:10:elinks:INFO: Disabling clock on downlink 4
15:05:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:05:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:05:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:05:10:elinks:INFO: Disabling clock on downlink 0
15:05:10:elinks:INFO: Disabling clock on downlink 1
15:05:10:elinks:INFO: Disabling clock on downlink 2
15:05:10:elinks:INFO: Disabling clock on downlink 3
15:05:10:elinks:INFO: Disabling clock on downlink 4
15:05:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:05:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:05:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:05:10:elinks:INFO: Disabling clock on downlink 0
15:05:10:elinks:INFO: Disabling clock on downlink 1
15:05:10:elinks:INFO: Disabling clock on downlink 2
15:05:10:elinks:INFO: Disabling clock on downlink 3
15:05:10:elinks:INFO: Disabling clock on downlink 4
15:05:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:05:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:05:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:05:10:setup_element:INFO: Scanning clock phase
15:05:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:05:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:05:11:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:05:11:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
15:05:11:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
15:05:11:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
15:05:11:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
15:05:11:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:05:11:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:05:11:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXX___
Clock Delay: 34
15:05:11:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXX___
Clock Delay: 34
15:05:11:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:05:11:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:05:11:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:05:11:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:05:11:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
15:05:11:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
15:05:11:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
15:05:11:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
15:05:11:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
15:05:11:setup_element:INFO: Scanning data phases
15:05:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:05:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:05:16:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:05:16:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
15:05:16:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
15:05:16:setup_element:INFO: Eye window for uplink 2 : ___________XXXXX________________________
Data delay found: 33
15:05:16:setup_element:INFO: Eye window for uplink 3 : ________XXXXX___________________________
Data delay found: 30
15:05:16:setup_element:INFO: Eye window for uplink 4 : ___XXXXX________________________________
Data delay found: 25
15:05:16:setup_element:INFO: Eye window for uplink 5 : XXXX__________________________________XX
Data delay found: 20
15:05:16:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
15:05:16:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXXX
Data delay found: 17
15:05:16:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXX___________
Data delay found: 6
15:05:16:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
15:05:16:setup_element:INFO: Eye window for uplink 10: _________________________XXXXXX_________
Data delay found: 7
15:05:16:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______
Data delay found: 11
15:05:16:setup_element:INFO: Eye window for uplink 12: _________________________XXXXX__________
Data delay found: 7
15:05:16:setup_element:INFO: Eye window for uplink 13: ____________________________XXXXXX______
Data delay found: 10
15:05:16:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
15:05:16:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXX_____
Data delay found: 11
15:05:16:setup_element:INFO: Setting the data phase to 34 for uplink 0
15:05:16:setup_element:INFO: Setting the data phase to 29 for uplink 1
15:05:16:setup_element:INFO: Setting the data phase to 33 for uplink 2
15:05:16:setup_element:INFO: Setting the data phase to 30 for uplink 3
15:05:16:setup_element:INFO: Setting the data phase to 25 for uplink 4
15:05:16:setup_element:INFO: Setting the data phase to 20 for uplink 5
15:05:16:setup_element:INFO: Setting the data phase to 21 for uplink 6
15:05:16:setup_element:INFO: Setting the data phase to 17 for uplink 7
15:05:16:setup_element:INFO: Setting the data phase to 6 for uplink 8
15:05:16:setup_element:INFO: Setting the data phase to 11 for uplink 9
15:05:16:setup_element:INFO: Setting the data phase to 7 for uplink 10
15:05:16:setup_element:INFO: Setting the data phase to 11 for uplink 11
15:05:16:setup_element:INFO: Setting the data phase to 7 for uplink 12
15:05:16:setup_element:INFO: Setting the data phase to 10 for uplink 13
15:05:16:setup_element:INFO: Setting the data phase to 10 for uplink 14
15:05:16:setup_element:INFO: Setting the data phase to 11 for uplink 15
15:05:16:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: _________________________________________________________________________XXXXXXX
Uplink 3: _________________________________________________________________________XXXXXXX
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: ________________________________________________________________________XXXXX___
Uplink 7: ________________________________________________________________________XXXXX___
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 3:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 4:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 5:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 8:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 11:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 12:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 13:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
]
15:05:16:setup_element:INFO: Beginning SMX ASICs map scan
15:05:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:05:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:05:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:05:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:05:16:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:05:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:05:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:05:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:05:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:05:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:05:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:05:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:05:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:05:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:05:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:05:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:05:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:05:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:05:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:05:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:05:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:05:19:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: _________________________________________________________________________XXXXXXX
Uplink 3: _________________________________________________________________________XXXXXXX
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: ________________________________________________________________________XXXXX___
Uplink 7: ________________________________________________________________________XXXXX___
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 3:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 4:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 5:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 8:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 11:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 12:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 13:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
15:05:19:setup_element:INFO: Performing Elink synchronization
15:05:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:05:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:05:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:05:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:05:19:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:05:19:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:05:19:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
15:05:20:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:05:21:febtest:INFO: 1-0 | XA-000-08-002-000-003-243-06 | 50.4 | 1147.8
15:05:21:febtest:INFO: 8-1 | XA-000-08-002-000-003-235-01 | 34.6 | 1201.0
15:05:21:febtest:INFO: 3-2 | XA-000-08-002-000-004-036-06 | 40.9 | 1177.4
15:05:21:febtest:INFO: 10-3 | XA-000-08-002-000-003-236-01 | 47.3 | 1153.7
15:05:22:febtest:INFO: 5-4 | XA-000-08-002-000-004-039-06 | 28.2 | 1230.3
15:05:22:febtest:INFO: 12-5 | XA-000-08-002-000-003-240-06 | 44.1 | 1171.5
15:05:22:febtest:INFO: 7-6 | XA-000-08-002-000-003-237-01 | 37.7 | 1195.1
15:05:22:febtest:INFO: 14-7 | XA-000-08-002-000-003-239-01 | 44.1 | 1171.5
15:05:22:ST3_smx:INFO: Configuring SMX FAST
15:05:24:ST3_smx:INFO: chip: 1-0 47.250730 C 1165.571835 mV
15:05:24:ST3_smx:INFO: Electrons
15:05:24:ST3_smx:INFO: # loops 0
15:05:26:ST3_smx:INFO: # loops 1
15:05:28:ST3_smx:INFO: # loops 2
15:05:29:ST3_smx:INFO: # loops 3
15:05:31:ST3_smx:INFO: # loops 4
15:05:33:ST3_smx:INFO: Total # of broken channels: 0
15:05:33:ST3_smx:INFO: List of broken channels: []
15:05:33:ST3_smx:INFO: Total # of broken channels: 0
15:05:33:ST3_smx:INFO: List of broken channels: []
15:05:34:ST3_smx:INFO: Configuring SMX FAST
15:05:36:ST3_smx:INFO: chip: 8-1 34.556970 C 1195.082160 mV
15:05:36:ST3_smx:INFO: Electrons
15:05:36:ST3_smx:INFO: # loops 0
15:05:37:ST3_smx:INFO: # loops 1
15:05:39:ST3_smx:INFO: # loops 2
15:05:41:ST3_smx:INFO: # loops 3
15:05:42:ST3_smx:INFO: # loops 4
15:05:44:ST3_smx:INFO: Total # of broken channels: 0
15:05:44:ST3_smx:INFO: List of broken channels: []
15:05:44:ST3_smx:INFO: Total # of broken channels: 0
15:05:44:ST3_smx:INFO: List of broken channels: []
15:05:45:ST3_smx:INFO: Configuring SMX FAST
15:05:47:ST3_smx:INFO: chip: 3-2 47.250730 C 1159.654860 mV
15:05:47:ST3_smx:INFO: Electrons
15:05:47:ST3_smx:INFO: # loops 0
15:05:49:ST3_smx:INFO: # loops 1
15:05:50:ST3_smx:INFO: # loops 2
15:05:52:ST3_smx:INFO: # loops 3
15:05:54:ST3_smx:INFO: # loops 4
15:05:55:ST3_smx:INFO: Total # of broken channels: 0
15:05:55:ST3_smx:INFO: List of broken channels: []
15:05:55:ST3_smx:INFO: Total # of broken channels: 0
15:05:55:ST3_smx:INFO: List of broken channels: []
15:05:56:ST3_smx:INFO: Configuring SMX FAST
15:05:58:ST3_smx:INFO: chip: 10-3 40.898880 C 1171.483840 mV
15:05:58:ST3_smx:INFO: Electrons
15:05:58:ST3_smx:INFO: # loops 0
15:06:00:ST3_smx:INFO: # loops 1
15:06:02:ST3_smx:INFO: # loops 2
15:06:03:ST3_smx:INFO: # loops 3
15:06:05:ST3_smx:INFO: # loops 4
15:06:07:ST3_smx:INFO: Total # of broken channels: 0
15:06:07:ST3_smx:INFO: List of broken channels: []
15:06:07:ST3_smx:INFO: Total # of broken channels: 0
15:06:07:ST3_smx:INFO: List of broken channels: []
15:06:08:ST3_smx:INFO: Configuring SMX FAST
15:06:09:ST3_smx:INFO: chip: 5-4 25.062742 C 1230.330540 mV
15:06:10:ST3_smx:INFO: Electrons
15:06:10:ST3_smx:INFO: # loops 0
15:06:11:ST3_smx:INFO: # loops 1
15:06:13:ST3_smx:INFO: # loops 2
15:06:15:ST3_smx:INFO: # loops 3
15:06:16:ST3_smx:INFO: # loops 4
15:06:18:ST3_smx:INFO: Total # of broken channels: 0
15:06:18:ST3_smx:INFO: List of broken channels: []
15:06:18:ST3_smx:INFO: Total # of broken channels: 0
15:06:18:ST3_smx:INFO: List of broken channels: []
15:06:19:ST3_smx:INFO: Configuring SMX FAST
15:06:21:ST3_smx:INFO: chip: 12-5 47.250730 C 1153.732915 mV
15:06:21:ST3_smx:INFO: Electrons
15:06:21:ST3_smx:INFO: # loops 0
15:06:23:ST3_smx:INFO: # loops 1
15:06:24:ST3_smx:INFO: # loops 2
15:06:26:ST3_smx:INFO: # loops 3
15:06:27:ST3_smx:INFO: # loops 4
15:06:29:ST3_smx:INFO: Total # of broken channels: 0
15:06:29:ST3_smx:INFO: List of broken channels: []
15:06:29:ST3_smx:INFO: Total # of broken channels: 0
15:06:29:ST3_smx:INFO: List of broken channels: []
15:06:30:ST3_smx:INFO: Configuring SMX FAST
15:06:32:ST3_smx:INFO: chip: 7-6 40.898880 C 1183.292940 mV
15:06:32:ST3_smx:INFO: Electrons
15:06:32:ST3_smx:INFO: # loops 0
15:06:34:ST3_smx:INFO: # loops 1
15:06:35:ST3_smx:INFO: # loops 2
15:06:37:ST3_smx:INFO: # loops 3
15:06:38:ST3_smx:INFO: # loops 4
15:06:40:ST3_smx:INFO: Total # of broken channels: 2
15:06:40:ST3_smx:INFO: List of broken channels: [113, 115]
15:06:40:ST3_smx:INFO: Total # of broken channels: 3
15:06:40:ST3_smx:INFO: List of broken channels: [109, 113, 115]
15:06:41:ST3_smx:INFO: Configuring SMX FAST
15:06:43:ST3_smx:INFO: chip: 14-7 34.556970 C 1206.851500 mV
15:06:43:ST3_smx:INFO: Electrons
15:06:43:ST3_smx:INFO: # loops 0
15:06:44:ST3_smx:INFO: # loops 1
15:06:46:ST3_smx:INFO: # loops 2
15:06:48:ST3_smx:INFO: # loops 3
15:06:49:ST3_smx:INFO: # loops 4
15:06:51:ST3_smx:INFO: Total # of broken channels: 0
15:06:51:ST3_smx:INFO: List of broken channels: []
15:06:51:ST3_smx:INFO: Total # of broken channels: 0
15:06:51:ST3_smx:INFO: List of broken channels: []
15:06:52:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:06:52:febtest:INFO: 1-0 | XA-000-08-002-000-003-243-06 | 47.3 | 1165.6
15:06:52:febtest:INFO: 8-1 | XA-000-08-002-000-003-235-01 | 34.6 | 1195.1
15:06:52:febtest:INFO: 3-2 | XA-000-08-002-000-004-036-06 | 44.1 | 1159.7
15:06:53:febtest:INFO: 10-3 | XA-000-08-002-000-003-236-01 | 40.9 | 1171.5
15:06:53:febtest:INFO: 5-4 | XA-000-08-002-000-004-039-06 | 28.2 | 1236.2
15:06:53:febtest:INFO: 12-5 | XA-000-08-002-000-003-240-06 | 47.3 | 1153.7
15:06:53:febtest:INFO: 7-6 | XA-000-08-002-000-003-237-01 | 40.9 | 1183.3
15:06:54:febtest:INFO: 14-7 | XA-000-08-002-000-003-239-01 | 34.6 | 1206.9
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_01-15_05_07
OPERATOR : Oleksandr S.; Robert V.; Irakli K.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 2100
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.0002', '1.850', '0.0000', '2.450', '1.5800', '1.851', '2.4490']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
15:07:05:febtest:INFO: FEB 8-2 selected
15:07:05:smx_tester:INFO: Setting Elink clock mode to 160 MHz
15:07:41:febtest:INFO: FEB 8-2 selected
15:07:41:smx_tester:INFO: Setting Elink clock mode to 160 MHz
15:08:06:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2100/TestDate_2024_02_01-15_05_07/
15:08:06:ST3_Shared:ERROR: No SMX found!!!