FEB_2103    09.02.24 10:56:19

TextEdit.txt
            10:56:19:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:56:19:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
10:56:19:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:56:47:ST3_ModuleSelector:INFO:	L4DL200116 M4DL2B3001163B2 124 B

10:56:47:ST3_ModuleSelector:INFO:	02164

10:56:48:febtest:INFO:	Testing FEB with SN 2103
10:56:50:smx_tester:INFO:	Scanning setup
10:56:50:elinks:INFO:	Disabling clock on downlink 0
10:56:50:elinks:INFO:	Disabling clock on downlink 1
10:56:50:elinks:INFO:	Disabling clock on downlink 2
10:56:50:elinks:INFO:	Disabling clock on downlink 3
10:56:50:elinks:INFO:	Disabling clock on downlink 4
10:56:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:56:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:56:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:56:51:elinks:INFO:	Disabling clock on downlink 0
10:56:51:elinks:INFO:	Disabling clock on downlink 1
10:56:51:elinks:INFO:	Disabling clock on downlink 2
10:56:51:elinks:INFO:	Disabling clock on downlink 3
10:56:51:elinks:INFO:	Disabling clock on downlink 4
10:56:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:56:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
10:56:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
10:56:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:56:51:elinks:INFO:	Disabling clock on downlink 0
10:56:51:elinks:INFO:	Disabling clock on downlink 1
10:56:51:elinks:INFO:	Disabling clock on downlink 2
10:56:51:elinks:INFO:	Disabling clock on downlink 3
10:56:51:elinks:INFO:	Disabling clock on downlink 4
10:56:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:56:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:56:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:56:51:elinks:INFO:	Disabling clock on downlink 0
10:56:51:elinks:INFO:	Disabling clock on downlink 1
10:56:51:elinks:INFO:	Disabling clock on downlink 2
10:56:51:elinks:INFO:	Disabling clock on downlink 3
10:56:51:elinks:INFO:	Disabling clock on downlink 4
10:56:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:56:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:56:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:56:51:elinks:INFO:	Disabling clock on downlink 0
10:56:51:elinks:INFO:	Disabling clock on downlink 1
10:56:51:elinks:INFO:	Disabling clock on downlink 2
10:56:51:elinks:INFO:	Disabling clock on downlink 3
10:56:51:elinks:INFO:	Disabling clock on downlink 4
10:56:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:56:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:56:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:56:51:setup_element:INFO:	Scanning clock phase
10:56:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:56:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:56:52:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
10:56:52:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:56:52:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:56:52:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:56:52:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:56:52:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:56:52:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:56:52:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:56:52:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:56:52:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:56:52:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:56:52:setup_element:INFO:	Eye window for uplink 10: __________________________________________________________________________XXX___
Clock Delay: 35
10:56:52:setup_element:INFO:	Eye window for uplink 11: __________________________________________________________________________XXX___
Clock Delay: 35
10:56:52:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:56:52:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:56:52:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:56:52:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:56:52:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
10:56:52:setup_element:INFO:	Scanning data phases
10:56:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:56:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:56:57:setup_element:INFO:	Data phase scan results for group 0, downlink 1
10:56:57:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
10:56:57:setup_element:INFO:	Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
10:56:57:setup_element:INFO:	Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
10:56:57:setup_element:INFO:	Eye window for uplink 3 : ______XXXXX_____________________________
Data delay found: 28
10:56:57:setup_element:INFO:	Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
10:56:57:setup_element:INFO:	Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
10:56:57:setup_element:INFO:	Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
10:56:57:setup_element:INFO:	Eye window for uplink 7 : X_________________________________XXXXX_
Data delay found: 17
10:56:57:setup_element:INFO:	Eye window for uplink 8 : _________________________XXXXX__________
Data delay found: 7
10:56:57:setup_element:INFO:	Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
10:56:57:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
10:56:57:setup_element:INFO:	Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
10:56:57:setup_element:INFO:	Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
10:56:57:setup_element:INFO:	Eye window for uplink 13: _______________________________XXXXX____
Data delay found: 13
10:56:57:setup_element:INFO:	Eye window for uplink 14: ______________________________XXX_______
Data delay found: 11
10:56:57:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXX_____
Data delay found: 12
10:56:57:setup_element:INFO:	Setting the data phase to 34 for uplink 0
10:56:57:setup_element:INFO:	Setting the data phase to 30 for uplink 1
10:56:57:setup_element:INFO:	Setting the data phase to 31 for uplink 2
10:56:57:setup_element:INFO:	Setting the data phase to 28 for uplink 3
10:56:57:setup_element:INFO:	Setting the data phase to 28 for uplink 4
10:56:57:setup_element:INFO:	Setting the data phase to 24 for uplink 5
10:56:57:setup_element:INFO:	Setting the data phase to 20 for uplink 6
10:56:57:setup_element:INFO:	Setting the data phase to 17 for uplink 7
10:56:57:setup_element:INFO:	Setting the data phase to 7 for uplink 8
10:56:57:setup_element:INFO:	Setting the data phase to 12 for uplink 9
10:56:57:setup_element:INFO:	Setting the data phase to 8 for uplink 10
10:56:57:setup_element:INFO:	Setting the data phase to 12 for uplink 11
10:56:57:setup_element:INFO:	Setting the data phase to 10 for uplink 12
10:56:57:setup_element:INFO:	Setting the data phase to 13 for uplink 13
10:56:57:setup_element:INFO:	Setting the data phase to 11 for uplink 14
10:56:57:setup_element:INFO:	Setting the data phase to 12 for uplink 15
10:56:57:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXX_
      Uplink  1: ________________________________________________________________________XXXXXXX_
      Uplink  2: ________________________________________________________________________XXXXXXX_
      Uplink  3: ________________________________________________________________________XXXXXXX_
      Uplink  4: ______________________________________________________________________XXXXXXXX__
      Uplink  5: ______________________________________________________________________XXXXXXXX__
      Uplink  6: ________________________________________________________________________XXXXXX__
      Uplink  7: ________________________________________________________________________XXXXXX__
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: __________________________________________________________________________XXX___
      Uplink 11: __________________________________________________________________________XXX___
      Uplink 12: ______________________________________________________________________XXXXXXXX__
      Uplink 13: ______________________________________________________________________XXXXXXXX__
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 4:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 6:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 13:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 14:
      Optimal Phase: 11
      Window Length: 37
      Eye Window: ______________________________XXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
]
10:56:57:setup_element:INFO:	Beginning SMX ASICs map scan
10:56:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:56:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:56:57:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:56:57:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:56:57:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:56:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:56:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:56:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:56:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:56:58:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:56:58:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:56:58:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:56:58:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:56:58:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:56:58:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:56:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:56:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:56:58:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:56:59:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:56:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:56:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:57:00:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXX_
      Uplink  1: ________________________________________________________________________XXXXXXX_
      Uplink  2: ________________________________________________________________________XXXXXXX_
      Uplink  3: ________________________________________________________________________XXXXXXX_
      Uplink  4: ______________________________________________________________________XXXXXXXX__
      Uplink  5: ______________________________________________________________________XXXXXXXX__
      Uplink  6: ________________________________________________________________________XXXXXX__
      Uplink  7: ________________________________________________________________________XXXXXX__
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: __________________________________________________________________________XXX___
      Uplink 11: __________________________________________________________________________XXX___
      Uplink 12: ______________________________________________________________________XXXXXXXX__
      Uplink 13: ______________________________________________________________________XXXXXXXX__
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 4:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 6:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 13:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 14:
      Optimal Phase: 11
      Window Length: 37
      Eye Window: ______________________________XXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____

10:57:00:setup_element:INFO:	Performing Elink synchronization
10:57:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:57:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:57:00:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:57:00:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:57:00:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
10:57:00:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:57:00:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
10:57:01:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:57:02:febtest:INFO:	1-0 | XA-000-08-002-000-004-201-07 |  28.2 | 1201.0
10:57:02:febtest:INFO:	8-1 | XA-000-08-002-000-004-130-02 |  31.4 | 1189.2
10:57:02:febtest:INFO:	3-2 | XA-000-08-002-000-004-136-02 |  31.4 | 1201.0
10:57:02:febtest:INFO:	10-3 | XA-000-08-002-000-004-151-05 |  25.1 | 1212.7
10:57:02:febtest:INFO:	5-4 | XA-000-08-002-000-004-137-02 |  25.1 | 1224.5
10:57:03:febtest:INFO:	12-5 | XA-000-08-002-000-004-146-05 |  34.6 | 1195.1
10:57:03:febtest:INFO:	7-6 | XA-000-08-002-000-004-138-02 |  21.9 | 1224.5
10:57:03:febtest:INFO:	14-7 | XA-000-08-002-000-004-154-05 |  34.6 | 1189.2
10:57:04:ST3_smx:INFO:	Configuring SMX FAST
10:57:06:ST3_smx:INFO:	chip: 1-0 	 25.062742 C 	 1218.600960 mV
10:57:06:ST3_smx:INFO:		Electrons
10:57:06:ST3_smx:INFO:	# loops 0
10:57:08:ST3_smx:INFO:	# loops 1
10:57:09:ST3_smx:INFO:	# loops 2
10:57:11:ST3_smx:INFO:	# loops 3
10:57:13:ST3_smx:INFO:	# loops 4
10:57:14:ST3_smx:INFO:	Total # of broken channels: 0
10:57:14:ST3_smx:INFO:	List of broken channels: []
10:57:14:ST3_smx:INFO:	Total # of broken channels: 0
10:57:14:ST3_smx:INFO:	List of broken channels: []
10:57:15:ST3_smx:INFO:	Configuring SMX FAST
10:57:17:ST3_smx:INFO:	chip: 8-1 	 37.726682 C 	 1171.483840 mV
10:57:17:ST3_smx:INFO:		Electrons
10:57:17:ST3_smx:INFO:	# loops 0
10:57:18:ST3_smx:INFO:	# loops 1
10:57:20:ST3_smx:INFO:	# loops 2
10:57:22:ST3_smx:INFO:	# loops 3
10:57:23:ST3_smx:INFO:	# loops 4
10:57:25:ST3_smx:INFO:	Total # of broken channels: 0
10:57:25:ST3_smx:INFO:	List of broken channels: []
10:57:25:ST3_smx:INFO:	Total # of broken channels: 0
10:57:25:ST3_smx:INFO:	List of broken channels: []
10:57:25:ST3_smx:INFO:	Configuring SMX FAST
10:57:27:ST3_smx:INFO:	chip: 3-2 	 28.225000 C 	 1212.728715 mV
10:57:27:ST3_smx:INFO:		Electrons
10:57:27:ST3_smx:INFO:	# loops 0
10:57:29:ST3_smx:INFO:	# loops 1
10:57:31:ST3_smx:INFO:	# loops 2
10:57:32:ST3_smx:INFO:	# loops 3
10:57:34:ST3_smx:INFO:	# loops 4
10:57:36:ST3_smx:INFO:	Total # of broken channels: 0
10:57:36:ST3_smx:INFO:	List of broken channels: []
10:57:36:ST3_smx:INFO:	Total # of broken channels: 1
10:57:36:ST3_smx:INFO:	List of broken channels: [1]
10:57:36:ST3_smx:INFO:	Configuring SMX FAST
10:57:38:ST3_smx:INFO:	chip: 10-3 	 25.062742 C 	 1218.600960 mV
10:57:38:ST3_smx:INFO:		Electrons
10:57:38:ST3_smx:INFO:	# loops 0
10:57:40:ST3_smx:INFO:	# loops 1
10:57:41:ST3_smx:INFO:	# loops 2
10:57:43:ST3_smx:INFO:	# loops 3
10:57:45:ST3_smx:INFO:	# loops 4
10:57:46:ST3_smx:INFO:	Total # of broken channels: 0
10:57:46:ST3_smx:INFO:	List of broken channels: []
10:57:46:ST3_smx:INFO:	Total # of broken channels: 0
10:57:46:ST3_smx:INFO:	List of broken channels: []
10:57:47:ST3_smx:INFO:	Configuring SMX FAST
10:57:49:ST3_smx:INFO:	chip: 5-4 	 37.726682 C 	 1189.190035 mV
10:57:49:ST3_smx:INFO:		Electrons
10:57:49:ST3_smx:INFO:	# loops 0
10:57:50:ST3_smx:INFO:	# loops 1
10:57:52:ST3_smx:INFO:	# loops 2
10:57:54:ST3_smx:INFO:	# loops 3
10:57:56:ST3_smx:INFO:	# loops 4
10:57:57:ST3_smx:INFO:	Total # of broken channels: 0
10:57:57:ST3_smx:INFO:	List of broken channels: []
10:57:57:ST3_smx:INFO:	Total # of broken channels: 0
10:57:57:ST3_smx:INFO:	List of broken channels: []
10:57:58:ST3_smx:INFO:	Configuring SMX FAST
10:58:00:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1200.969315 mV
10:58:00:ST3_smx:INFO:		Electrons
10:58:00:ST3_smx:INFO:	# loops 0
10:58:01:ST3_smx:INFO:	# loops 1
10:58:03:ST3_smx:INFO:	# loops 2
10:58:05:ST3_smx:INFO:	# loops 3
10:58:06:ST3_smx:INFO:	# loops 4
10:58:08:ST3_smx:INFO:	Total # of broken channels: 0
10:58:08:ST3_smx:INFO:	List of broken channels: []
10:58:08:ST3_smx:INFO:	Total # of broken channels: 1
10:58:08:ST3_smx:INFO:	List of broken channels: [62]
10:58:08:ST3_smx:INFO:	Configuring SMX FAST
10:58:10:ST3_smx:INFO:	chip: 7-6 	 34.556970 C 	 1195.082160 mV
10:58:10:ST3_smx:INFO:		Electrons
10:58:10:ST3_smx:INFO:	# loops 0
10:58:12:ST3_smx:INFO:	# loops 1
10:58:13:ST3_smx:INFO:	# loops 2
10:58:15:ST3_smx:INFO:	# loops 3
10:58:17:ST3_smx:INFO:	# loops 4
10:58:18:ST3_smx:INFO:	Total # of broken channels: 0
10:58:18:ST3_smx:INFO:	List of broken channels: []
10:58:18:ST3_smx:INFO:	Total # of broken channels: 0
10:58:18:ST3_smx:INFO:	List of broken channels: []
10:58:19:ST3_smx:INFO:	Configuring SMX FAST
10:58:21:ST3_smx:INFO:	chip: 14-7 	 31.389742 C 	 1212.728715 mV
10:58:21:ST3_smx:INFO:		Electrons
10:58:21:ST3_smx:INFO:	# loops 0
10:58:22:ST3_smx:INFO:	# loops 1
10:58:24:ST3_smx:INFO:	# loops 2
10:58:26:ST3_smx:INFO:	# loops 3
10:58:27:ST3_smx:INFO:	# loops 4
10:58:29:ST3_smx:INFO:	Total # of broken channels: 0
10:58:29:ST3_smx:INFO:	List of broken channels: []
10:58:29:ST3_smx:INFO:	Total # of broken channels: 1
10:58:29:ST3_smx:INFO:	List of broken channels: [78]
10:58:30:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:58:30:febtest:INFO:	1-0 | XA-000-08-002-000-004-201-07 |  28.2 | 1218.6
10:58:30:febtest:INFO:	8-1 | XA-000-08-002-000-004-130-02 |  40.9 | 1171.5
10:58:31:febtest:INFO:	3-2 | XA-000-08-002-000-004-136-02 |  28.2 | 1212.7
10:58:31:febtest:INFO:	10-3 | XA-000-08-002-000-004-151-05 |  25.1 | 1218.6
10:58:31:febtest:INFO:	5-4 | XA-000-08-002-000-004-137-02 |  37.7 | 1189.2
10:58:31:febtest:INFO:	12-5 | XA-000-08-002-000-004-146-05 |  34.6 | 1201.0
10:58:32:febtest:INFO:	7-6 | XA-000-08-002-000-004-138-02 |  34.6 | 1195.1
10:58:32:febtest:INFO:	14-7 | XA-000-08-002-000-004-154-05 |  31.4 | 1212.7
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_09-10_56_19
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2B3001163B2 124 B

FEB_SN : 2103
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	02164

MODULE_NAME:	L4DL200116 M4DL2B3001163B2 124 B

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
---------------------------------------
VI_before_Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.8170', '1.850', '0.5676']
VI_after__Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9530', '1.850', '0.3526']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:58:43:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2103/TestDate_2024_02_09-10_56_19/