09:08:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:08:58:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:08:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:09:23:ST3_ModuleSelector:INFO:	L4DL200116 M4DL2T1001161A2 42 A

09:09:23:ST3_ModuleSelector:INFO:	21322

09:09:23:febtest:INFO:	Testing FEB with SN 1088
09:09:26:smx_tester:INFO:	Scanning setup
09:09:26:elinks:INFO:	Disabling clock on downlink 0
09:09:26:elinks:INFO:	Disabling clock on downlink 1
09:09:26:elinks:INFO:	Disabling clock on downlink 2
09:09:26:elinks:INFO:	Disabling clock on downlink 3
09:09:26:elinks:INFO:	Disabling clock on downlink 4
09:09:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:09:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:09:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:09:26:elinks:INFO:	Disabling clock on downlink 0
09:09:26:elinks:INFO:	Disabling clock on downlink 1
09:09:26:elinks:INFO:	Disabling clock on downlink 2
09:09:26:elinks:INFO:	Disabling clock on downlink 3
09:09:26:elinks:INFO:	Disabling clock on downlink 4
09:09:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:09:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:09:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:09:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:09:26:elinks:INFO:	Disabling clock on downlink 0
09:09:26:elinks:INFO:	Disabling clock on downlink 1
09:09:26:elinks:INFO:	Disabling clock on downlink 2
09:09:26:elinks:INFO:	Disabling clock on downlink 3
09:09:26:elinks:INFO:	Disabling clock on downlink 4
09:09:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:09:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:09:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:09:26:elinks:INFO:	Disabling clock on downlink 0
09:09:26:elinks:INFO:	Disabling clock on downlink 1
09:09:26:elinks:INFO:	Disabling clock on downlink 2
09:09:26:elinks:INFO:	Disabling clock on downlink 3
09:09:26:elinks:INFO:	Disabling clock on downlink 4
09:09:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:09:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:09:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:09:26:elinks:INFO:	Disabling clock on downlink 0
09:09:26:elinks:INFO:	Disabling clock on downlink 1
09:09:26:elinks:INFO:	Disabling clock on downlink 2
09:09:26:elinks:INFO:	Disabling clock on downlink 3
09:09:26:elinks:INFO:	Disabling clock on downlink 4
09:09:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:09:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:09:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:09:27:setup_element:INFO:	Scanning clock phase
09:09:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:09:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:09:27:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:09:27:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:09:27:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:09:27:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:09:27:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:09:27:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:09:27:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:09:27:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXXX__
Clock Delay: 35
09:09:27:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXXX__
Clock Delay: 35
09:09:27:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:09:27:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
09:09:27:setup_element:INFO:	Scanning data phases
09:09:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:09:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:09:33:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:09:33:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:09:33:setup_element:INFO:	Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
09:09:33:setup_element:INFO:	Eye window for uplink 2 : ________XXXX____________________________
Data delay found: 29
09:09:33:setup_element:INFO:	Eye window for uplink 3 : _____XXXXX______________________________
Data delay found: 27
09:09:33:setup_element:INFO:	Eye window for uplink 4 : _____XXXX_______________________________
Data delay found: 26
09:09:33:setup_element:INFO:	Eye window for uplink 5 : XXXXX___________________________________
Data delay found: 22
09:09:33:setup_element:INFO:	Eye window for uplink 6 : XXXXX___________________________________
Data delay found: 22
09:09:33:setup_element:INFO:	Eye window for uplink 7 : XX__________________________________XXXX
Data delay found: 18
09:09:33:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXX__________
Data delay found: 7
09:09:33:setup_element:INFO:	Eye window for uplink 9 : _______________________________XXXX_____
Data delay found: 12
09:09:33:setup_element:INFO:	Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
09:09:33:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXX_____
Data delay found: 12
09:09:33:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
09:09:33:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
09:09:33:setup_element:INFO:	Eye window for uplink 14: _____________________________XXX________
Data delay found: 10
09:09:33:setup_element:INFO:	Eye window for uplink 15: _____________________________XXXXX______
Data delay found: 11
09:09:33:setup_element:INFO:	Setting the data phase to 34 for uplink 0
09:09:33:setup_element:INFO:	Setting the data phase to 30 for uplink 1
09:09:33:setup_element:INFO:	Setting the data phase to 29 for uplink 2
09:09:33:setup_element:INFO:	Setting the data phase to 27 for uplink 3
09:09:33:setup_element:INFO:	Setting the data phase to 26 for uplink 4
09:09:33:setup_element:INFO:	Setting the data phase to 22 for uplink 5
09:09:33:setup_element:INFO:	Setting the data phase to 22 for uplink 6
09:09:33:setup_element:INFO:	Setting the data phase to 18 for uplink 7
09:09:33:setup_element:INFO:	Setting the data phase to 7 for uplink 8
09:09:33:setup_element:INFO:	Setting the data phase to 12 for uplink 9
09:09:33:setup_element:INFO:	Setting the data phase to 9 for uplink 10
09:09:33:setup_element:INFO:	Setting the data phase to 12 for uplink 11
09:09:33:setup_element:INFO:	Setting the data phase to 9 for uplink 12
09:09:33:setup_element:INFO:	Setting the data phase to 12 for uplink 13
09:09:33:setup_element:INFO:	Setting the data phase to 10 for uplink 14
09:09:33:setup_element:INFO:	Setting the data phase to 11 for uplink 15
09:09:33:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: _________________________________________________________________________XXXXX__
      Uplink  7: _________________________________________________________________________XXXXX__
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXXX__
      Uplink 11: ______________________________________________________________________XXXXXXXX__
      Uplink 12: ______________________________________________________________________XXXXXXXX__
      Uplink 13: ______________________________________________________________________XXXXXXXX__
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 3:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 5:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 6:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 7:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 8:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 10:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 37
      Eye Window: _____________________________XXX________
    Uplink 15:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
]
09:09:33:setup_element:INFO:	Beginning SMX ASICs map scan
09:09:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:09:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:09:33:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:09:33:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:09:33:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:09:33:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:09:33:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:09:33:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:09:33:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:09:33:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:09:33:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:09:33:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:09:33:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:09:33:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:09:34:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:09:34:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:09:34:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:09:34:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:09:34:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:09:34:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:09:34:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:09:35:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: _________________________________________________________________________XXXXX__
      Uplink  7: _________________________________________________________________________XXXXX__
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXXX__
      Uplink 11: ______________________________________________________________________XXXXXXXX__
      Uplink 12: ______________________________________________________________________XXXXXXXX__
      Uplink 13: ______________________________________________________________________XXXXXXXX__
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 3:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 5:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 6:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 7:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 8:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 10:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 37
      Eye Window: _____________________________XXX________
    Uplink 15:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______

09:09:35:setup_element:INFO:	Performing Elink synchronization
09:09:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:09:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:09:35:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:09:35:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:09:35:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:09:35:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:09:36:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
09:09:37:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:09:37:febtest:INFO:	1-0 | XA-000-08-002-000-003-045-14 |  25.1 | 1224.5
09:09:37:febtest:INFO:	8-1 | XA-000-08-002-000-003-050-09 |  28.2 | 1206.9
09:09:37:febtest:INFO:	3-2 | XA-000-08-002-000-003-035-14 |  31.4 | 1206.9
09:09:38:febtest:INFO:	10-3 | XA-000-08-002-000-003-049-09 |  21.9 | 1236.2
09:09:38:febtest:INFO:	5-4 | XA-000-08-002-000-003-032-14 |  40.9 | 1171.5
09:09:38:febtest:INFO:	12-5 | XA-000-08-002-000-003-043-14 |   9.3 | 1282.9
09:09:38:febtest:INFO:	7-6 | XA-000-08-002-000-003-053-09 |  44.1 | 1159.7
09:09:38:febtest:INFO:	14-7 | XA-000-08-002-000-003-042-14 |  21.9 | 1218.6
09:09:39:ST3_smx:INFO:	Configuring SMX FAST
09:09:41:ST3_smx:INFO:	chip: 1-0 	 28.225000 C 	 1212.728715 mV
09:09:41:ST3_smx:INFO:		Electrons
09:09:41:ST3_smx:INFO:	# loops 0
09:09:43:ST3_smx:INFO:	# loops 1
09:09:45:ST3_smx:INFO:	# loops 2
09:09:46:ST3_smx:INFO:	# loops 3
09:09:48:ST3_smx:INFO:	# loops 4
09:09:50:ST3_smx:INFO:	Total # of broken channels: 0
09:09:50:ST3_smx:INFO:	List of broken channels: []
09:09:50:ST3_smx:INFO:	Total # of broken channels: 0
09:09:50:ST3_smx:INFO:	List of broken channels: []
09:09:50:ST3_smx:INFO:	Configuring SMX FAST
09:09:52:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1224.468235 mV
09:09:52:ST3_smx:INFO:		Electrons
09:09:52:ST3_smx:INFO:	# loops 0
09:09:54:ST3_smx:INFO:	# loops 1
09:09:56:ST3_smx:INFO:	# loops 2
09:09:57:ST3_smx:INFO:	# loops 3
09:09:59:ST3_smx:INFO:	# loops 4
09:10:01:ST3_smx:INFO:	Total # of broken channels: 0
09:10:01:ST3_smx:INFO:	List of broken channels: []
09:10:01:ST3_smx:INFO:	Total # of broken channels: 0
09:10:01:ST3_smx:INFO:	List of broken channels: []
09:10:01:ST3_smx:INFO:	Configuring SMX FAST
09:10:03:ST3_smx:INFO:	chip: 3-2 	 40.898880 C 	 1183.292940 mV
09:10:03:ST3_smx:INFO:		Electrons
09:10:03:ST3_smx:INFO:	# loops 0
09:10:05:ST3_smx:INFO:	# loops 1
09:10:06:ST3_smx:INFO:	# loops 2
09:10:08:ST3_smx:INFO:	# loops 3
09:10:10:ST3_smx:INFO:	# loops 4
09:10:11:ST3_smx:INFO:	Total # of broken channels: 0
09:10:11:ST3_smx:INFO:	List of broken channels: []
09:10:11:ST3_smx:INFO:	Total # of broken channels: 6
09:10:11:ST3_smx:INFO:	List of broken channels: [55, 71, 77, 87, 97, 101]
09:10:12:ST3_smx:INFO:	Configuring SMX FAST
09:10:14:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1224.468235 mV
09:10:14:ST3_smx:INFO:		Electrons
09:10:14:ST3_smx:INFO:	# loops 0
09:10:15:ST3_smx:INFO:	# loops 1
09:10:17:ST3_smx:INFO:	# loops 2
09:10:18:ST3_smx:INFO:	# loops 3
09:10:20:ST3_smx:INFO:	# loops 4
09:10:22:ST3_smx:INFO:	Total # of broken channels: 0
09:10:22:ST3_smx:INFO:	List of broken channels: []
09:10:22:ST3_smx:INFO:	Total # of broken channels: 1
09:10:22:ST3_smx:INFO:	List of broken channels: [23]
09:10:22:ST3_smx:INFO:	Configuring SMX FAST
09:10:24:ST3_smx:INFO:	chip: 5-4 	 37.726682 C 	 1189.190035 mV
09:10:24:ST3_smx:INFO:		Electrons
09:10:24:ST3_smx:INFO:	# loops 0
09:10:26:ST3_smx:INFO:	# loops 1
09:10:27:ST3_smx:INFO:	# loops 2
09:10:29:ST3_smx:INFO:	# loops 3
09:10:30:ST3_smx:INFO:	# loops 4
09:10:32:ST3_smx:INFO:	Total # of broken channels: 0
09:10:32:ST3_smx:INFO:	List of broken channels: []
09:10:32:ST3_smx:INFO:	Total # of broken channels: 0
09:10:32:ST3_smx:INFO:	List of broken channels: []
09:10:32:ST3_smx:INFO:	Configuring SMX FAST
09:10:34:ST3_smx:INFO:	chip: 12-5 	 18.745682 C 	 1247.887635 mV
09:10:34:ST3_smx:INFO:		Electrons
09:10:34:ST3_smx:INFO:	# loops 0
09:10:36:ST3_smx:INFO:	# loops 1
09:10:38:ST3_smx:INFO:	# loops 2
09:10:39:ST3_smx:INFO:	# loops 3
09:10:41:ST3_smx:INFO:	# loops 4
09:10:42:ST3_smx:INFO:	Total # of broken channels: 0
09:10:42:ST3_smx:INFO:	List of broken channels: []
09:10:42:ST3_smx:INFO:	Total # of broken channels: 0
09:10:42:ST3_smx:INFO:	List of broken channels: []
09:10:43:ST3_smx:INFO:	Configuring SMX FAST
09:10:44:ST3_smx:INFO:	chip: 7-6 	 44.073563 C 	 1171.483840 mV
09:10:44:ST3_smx:INFO:		Electrons
09:10:44:ST3_smx:INFO:	# loops 0
09:10:46:ST3_smx:INFO:	# loops 1
09:10:48:ST3_smx:INFO:	# loops 2
09:10:49:ST3_smx:INFO:	# loops 3
09:10:51:ST3_smx:INFO:	# loops 4
09:10:52:ST3_smx:INFO:	Total # of broken channels: 0
09:10:52:ST3_smx:INFO:	List of broken channels: []
09:10:52:ST3_smx:INFO:	Total # of broken channels: 0
09:10:52:ST3_smx:INFO:	List of broken channels: []
09:10:53:ST3_smx:INFO:	Configuring SMX FAST
09:10:55:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1195.082160 mV
09:10:55:ST3_smx:INFO:		Electrons
09:10:55:ST3_smx:INFO:	# loops 0
09:10:56:ST3_smx:INFO:	# loops 1
09:10:58:ST3_smx:INFO:	# loops 2
09:11:00:ST3_smx:INFO:	# loops 3
09:11:01:ST3_smx:INFO:	# loops 4
09:11:03:ST3_smx:INFO:	Total # of broken channels: 0
09:11:03:ST3_smx:INFO:	List of broken channels: []
09:11:03:ST3_smx:INFO:	Total # of broken channels: 0
09:11:03:ST3_smx:INFO:	List of broken channels: []
09:11:04:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:11:04:febtest:INFO:	1-0 | XA-000-08-002-000-003-045-14 |  31.4 | 1212.7
09:11:04:febtest:INFO:	8-1 | XA-000-08-002-000-003-050-09 |  28.2 | 1224.5
09:11:04:febtest:INFO:	3-2 | XA-000-08-002-000-003-035-14 |  40.9 | 1183.3
09:11:05:febtest:INFO:	10-3 | XA-000-08-002-000-003-049-09 |  28.2 | 1224.5
09:11:05:febtest:INFO:	5-4 | XA-000-08-002-000-003-032-14 |  37.7 | 1189.2
09:11:05:febtest:INFO:	12-5 | XA-000-08-002-000-003-043-14 |  18.7 | 1253.7
09:11:05:febtest:INFO:	7-6 | XA-000-08-002-000-003-053-09 |  47.3 | 1171.5
09:11:06:febtest:INFO:	14-7 | XA-000-08-002-000-003-042-14 |  34.6 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_05-09_08_58
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T1001161A2 42 A

FEB_SN : 1088
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	21322

MODULE_NAME:	L4DL200116 M4DL2T1001161A2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L4DL200116
MODULE_MODULE:	M4DL2T1001161A2
MODULE_SIZE:	42
MODULE_GRADE:	A
---------------------------------------
VI_before_Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.8100', '1.850', '0.5943']
VI_after__Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.9800', '1.850', '0.3204']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:11:16:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:11:16:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:11:16:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:11:17:ST3_ModuleSelector:INFO:	L4DL200116 M4DL2T1001161A2 42 A

09:11:17:ST3_ModuleSelector:INFO:	21322

09:11:18:febtest:INFO:	Testing FEB with SN 1088
09:11:20:smx_tester:INFO:	Scanning setup
09:11:20:elinks:INFO:	Disabling clock on downlink 0
09:11:20:elinks:INFO:	Disabling clock on downlink 1
09:11:20:elinks:INFO:	Disabling clock on downlink 2
09:11:20:elinks:INFO:	Disabling clock on downlink 3
09:11:20:elinks:INFO:	Disabling clock on downlink 4
09:11:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:11:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:20:elinks:INFO:	Disabling clock on downlink 0
09:11:20:elinks:INFO:	Disabling clock on downlink 1
09:11:20:elinks:INFO:	Disabling clock on downlink 2
09:11:21:elinks:INFO:	Disabling clock on downlink 3
09:11:21:elinks:INFO:	Disabling clock on downlink 4
09:11:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:11:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:11:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:21:elinks:INFO:	Disabling clock on downlink 0
09:11:21:elinks:INFO:	Disabling clock on downlink 1
09:11:21:elinks:INFO:	Disabling clock on downlink 2
09:11:21:elinks:INFO:	Disabling clock on downlink 3
09:11:21:elinks:INFO:	Disabling clock on downlink 4
09:11:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:11:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:21:elinks:INFO:	Disabling clock on downlink 0
09:11:21:elinks:INFO:	Disabling clock on downlink 1
09:11:21:elinks:INFO:	Disabling clock on downlink 2
09:11:21:elinks:INFO:	Disabling clock on downlink 3
09:11:21:elinks:INFO:	Disabling clock on downlink 4
09:11:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:11:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:21:elinks:INFO:	Disabling clock on downlink 0
09:11:21:elinks:INFO:	Disabling clock on downlink 1
09:11:21:elinks:INFO:	Disabling clock on downlink 2
09:11:21:elinks:INFO:	Disabling clock on downlink 3
09:11:21:elinks:INFO:	Disabling clock on downlink 4
09:11:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:11:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:21:setup_element:INFO:	Scanning clock phase
09:11:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:21:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:11:21:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:11:21:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:11:21:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________________
Clock Delay: 40
09:11:21:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________________
Clock Delay: 40
09:11:21:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:11:21:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:11:21:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:11:22:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:11:22:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:11:22:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:11:22:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:11:22:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:11:22:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________X_________
Clock Delay: 30
09:11:22:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________X_________
Clock Delay: 30
09:11:22:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:11:22:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:11:22:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
09:11:22:setup_element:INFO:	Scanning data phases
09:11:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:27:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:11:27:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:11:27:setup_element:INFO:	Eye window for uplink 1 : ________XXXX____________________________
Data delay found: 29
09:11:27:setup_element:INFO:	Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
09:11:27:setup_element:INFO:	Eye window for uplink 3 : ____XXXXXX______________________________
Data delay found: 26
09:11:27:setup_element:INFO:	Eye window for uplink 4 : ____XXXXX_______________________________
Data delay found: 26
09:11:27:setup_element:INFO:	Eye window for uplink 5 : XXXXX__________________________________X
Data delay found: 21
09:11:27:setup_element:INFO:	Eye window for uplink 6 : XXXXX___________________________________
Data delay found: 22
09:11:27:setup_element:INFO:	Eye window for uplink 7 : XX_________________________________XXXXX
Data delay found: 18
09:11:27:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXX__________
Data delay found: 7
09:11:27:setup_element:INFO:	Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
09:11:27:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXXX________
Data delay found: 8
09:11:27:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXX_____
Data delay found: 12
09:11:27:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXX_________
Data delay found: 8
09:11:27:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXX______
Data delay found: 11
09:11:27:setup_element:INFO:	Eye window for uplink 14: ___________________________XXXXXX_______
Data delay found: 9
09:11:27:setup_element:INFO:	Eye window for uplink 15: _____________________________XXXXX______
Data delay found: 11
09:11:27:setup_element:INFO:	Setting the data phase to 34 for uplink 0
09:11:27:setup_element:INFO:	Setting the data phase to 29 for uplink 1
09:11:27:setup_element:INFO:	Setting the data phase to 29 for uplink 2
09:11:27:setup_element:INFO:	Setting the data phase to 26 for uplink 3
09:11:27:setup_element:INFO:	Setting the data phase to 26 for uplink 4
09:11:27:setup_element:INFO:	Setting the data phase to 21 for uplink 5
09:11:27:setup_element:INFO:	Setting the data phase to 22 for uplink 6
09:11:27:setup_element:INFO:	Setting the data phase to 18 for uplink 7
09:11:27:setup_element:INFO:	Setting the data phase to 7 for uplink 8
09:11:27:setup_element:INFO:	Setting the data phase to 12 for uplink 9
09:11:27:setup_element:INFO:	Setting the data phase to 8 for uplink 10
09:11:27:setup_element:INFO:	Setting the data phase to 12 for uplink 11
09:11:27:setup_element:INFO:	Setting the data phase to 8 for uplink 12
09:11:27:setup_element:INFO:	Setting the data phase to 11 for uplink 13
09:11:27:setup_element:INFO:	Setting the data phase to 9 for uplink 14
09:11:27:setup_element:INFO:	Setting the data phase to 11 for uplink 15
09:11:27:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 69
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: ________________________________________________________________________________
      Uplink  3: ________________________________________________________________________________
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: _________________________________________________________________________XXXXXX_
      Uplink  7: _________________________________________________________________________XXXXXX_
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: _____________________________________________________________________XXXXXXXXX__
      Uplink 11: _____________________________________________________________________XXXXXXXXX__
      Uplink 12: ______________________________________________________________________X_________
      Uplink 13: ______________________________________________________________________X_________
      Uplink 14: ______________________________________________________________________XXXXXXXXX_
      Uplink 15: ______________________________________________________________________XXXXXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 6:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 7:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 8:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 10:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 12:
      Optimal Phase: 8
      Window Length: 36
      Eye Window: ___________________________XXXX_________
    Uplink 13:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 14:
      Optimal Phase: 9
      Window Length: 34
      Eye Window: ___________________________XXXXXX_______
    Uplink 15:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
]
09:11:27:setup_element:INFO:	Beginning SMX ASICs map scan
09:11:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:27:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:11:27:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:11:27:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:11:27:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:11:27:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:11:28:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:11:28:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:11:28:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:11:28:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:11:28:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:11:28:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:11:28:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:11:28:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:11:28:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:11:28:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:11:28:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:11:28:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:11:29:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:11:29:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:11:30:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 69
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: ________________________________________________________________________________
      Uplink  3: ________________________________________________________________________________
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: _________________________________________________________________________XXXXXX_
      Uplink  7: _________________________________________________________________________XXXXXX_
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: _____________________________________________________________________XXXXXXXXX__
      Uplink 11: _____________________________________________________________________XXXXXXXXX__
      Uplink 12: ______________________________________________________________________X_________
      Uplink 13: ______________________________________________________________________X_________
      Uplink 14: ______________________________________________________________________XXXXXXXXX_
      Uplink 15: ______________________________________________________________________XXXXXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 6:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 7:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 8:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 9:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 10:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 12:
      Optimal Phase: 8
      Window Length: 36
      Eye Window: ___________________________XXXX_________
    Uplink 13:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 14:
      Optimal Phase: 9
      Window Length: 34
      Eye Window: ___________________________XXXXXX_______
    Uplink 15:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______

09:11:30:setup_element:INFO:	Performing Elink synchronization
09:11:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:30:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:11:30:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:11:30:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:11:30:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:11:30:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_14
09:11:32:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:11:32:febtest:INFO:	1-0 | XA-000-08-002-000-003-045-14 |  28.2 | 1230.3
09:11:32:febtest:INFO:	8-1 | XA-000-08-002-000-003-050-09 |  28.2 | 1212.7
09:11:32:febtest:INFO:	3-2 | XA-000-08-002-000-003-035-14 |  34.6 | 1206.9
09:11:33:febtest:INFO:	10-3 | XA-000-08-002-000-003-049-09 |  25.1 | 1247.9
09:11:33:febtest:INFO:	5-4 | XA-000-08-002-000-003-032-14 |  40.9 | 1177.4
09:11:33:febtest:INFO:	12-5 | XA-000-08-002-000-003-043-14 |   9.3 | 1277.1
09:11:33:febtest:INFO:	7-6 | XA-000-08-002-000-003-053-09 |  44.1 | 1165.6
09:11:33:febtest:INFO:	14-7 | XA-000-08-002-000-003-042-14 |  25.1 | 1218.6
09:11:34:ST3_smx:INFO:	Configuring SMX FAST
09:11:36:ST3_smx:INFO:	chip: 1-0 	 31.389742 C 	 1212.728715 mV
09:11:36:ST3_smx:INFO:		Electrons
09:11:36:ST3_smx:INFO:	# loops 0
09:11:38:ST3_smx:INFO:	# loops 1
09:11:39:ST3_smx:INFO:	# loops 2
09:11:41:ST3_smx:INFO:	# loops 3
09:11:43:ST3_smx:INFO:	# loops 4
09:11:44:ST3_smx:INFO:	Total # of broken channels: 0
09:11:44:ST3_smx:INFO:	List of broken channels: []
09:11:44:ST3_smx:INFO:	Total # of broken channels: 0
09:11:44:ST3_smx:INFO:	List of broken channels: []
09:11:45:ST3_smx:INFO:	Configuring SMX FAST
09:11:46:ST3_smx:INFO:	chip: 8-1 	 28.225000 C 	 1224.468235 mV
09:11:46:ST3_smx:INFO:		Electrons
09:11:46:ST3_smx:INFO:	# loops 0
09:11:48:ST3_smx:INFO:	# loops 1
09:11:50:ST3_smx:INFO:	# loops 2
09:11:51:ST3_smx:INFO:	# loops 3
09:11:53:ST3_smx:INFO:	# loops 4
09:11:55:ST3_smx:INFO:	Total # of broken channels: 0
09:11:55:ST3_smx:INFO:	List of broken channels: []
09:11:55:ST3_smx:INFO:	Total # of broken channels: 0
09:11:55:ST3_smx:INFO:	List of broken channels: []
09:11:55:ST3_smx:INFO:	Configuring SMX FAST
09:11:57:ST3_smx:INFO:	chip: 3-2 	 44.073563 C 	 1177.390875 mV
09:11:57:ST3_smx:INFO:		Electrons
09:11:57:ST3_smx:INFO:	# loops 0
09:11:58:ST3_smx:INFO:	# loops 1
09:12:00:ST3_smx:INFO:	# loops 2
09:12:02:ST3_smx:INFO:	# loops 3
09:12:03:ST3_smx:INFO:	# loops 4
09:12:05:ST3_smx:INFO:	Total # of broken channels: 0
09:12:05:ST3_smx:INFO:	List of broken channels: []
09:12:05:ST3_smx:INFO:	Total # of broken channels: 0
09:12:05:ST3_smx:INFO:	List of broken channels: []
09:12:05:ST3_smx:INFO:	Configuring SMX FAST
09:12:07:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1218.600960 mV
09:12:07:ST3_smx:INFO:		Electrons
09:12:07:ST3_smx:INFO:	# loops 0
09:12:09:ST3_smx:INFO:	# loops 1
09:12:10:ST3_smx:INFO:	# loops 2
09:12:12:ST3_smx:INFO:	# loops 3
09:12:13:ST3_smx:INFO:	# loops 4
09:12:15:ST3_smx:INFO:	Total # of broken channels: 0
09:12:15:ST3_smx:INFO:	List of broken channels: []
09:12:15:ST3_smx:INFO:	Total # of broken channels: 0
09:12:15:ST3_smx:INFO:	List of broken channels: []
09:12:15:ST3_smx:INFO:	Configuring SMX FAST
09:12:17:ST3_smx:INFO:	chip: 5-4 	 40.898880 C 	 1189.190035 mV
09:12:17:ST3_smx:INFO:		Electrons
09:12:17:ST3_smx:INFO:	# loops 0
09:12:19:ST3_smx:INFO:	# loops 1
09:12:21:ST3_smx:INFO:	# loops 2
09:12:22:ST3_smx:INFO:	# loops 3
09:12:24:ST3_smx:INFO:	# loops 4
09:12:25:ST3_smx:INFO:	Total # of broken channels: 0
09:12:25:ST3_smx:INFO:	List of broken channels: []
09:12:25:ST3_smx:INFO:	Total # of broken channels: 0
09:12:25:ST3_smx:INFO:	List of broken channels: []
09:12:26:ST3_smx:INFO:	Configuring SMX FAST
09:12:28:ST3_smx:INFO:	chip: 12-5 	 21.902970 C 	 1247.887635 mV
09:12:28:ST3_smx:INFO:		Electrons
09:12:28:ST3_smx:INFO:	# loops 0
09:12:30:ST3_smx:INFO:	# loops 1
09:12:32:ST3_smx:INFO:	# loops 2
09:12:33:ST3_smx:INFO:	# loops 3
09:12:35:ST3_smx:INFO:	# loops 4
09:12:37:ST3_smx:INFO:	Total # of broken channels: 0
09:12:37:ST3_smx:INFO:	List of broken channels: []
09:12:37:ST3_smx:INFO:	Total # of broken channels: 0
09:12:37:ST3_smx:INFO:	List of broken channels: []
09:12:37:ST3_smx:INFO:	Configuring SMX FAST
09:12:39:ST3_smx:INFO:	chip: 7-6 	 47.250730 C 	 1171.483840 mV
09:12:39:ST3_smx:INFO:		Electrons
09:12:39:ST3_smx:INFO:	# loops 0
09:12:41:ST3_smx:INFO:	# loops 1
09:12:42:ST3_smx:INFO:	# loops 2
09:12:44:ST3_smx:INFO:	# loops 3
09:12:46:ST3_smx:INFO:	# loops 4
09:12:48:ST3_smx:INFO:	Total # of broken channels: 0
09:12:48:ST3_smx:INFO:	List of broken channels: []
09:12:48:ST3_smx:INFO:	Total # of broken channels: 0
09:12:48:ST3_smx:INFO:	List of broken channels: []
09:12:48:ST3_smx:INFO:	Configuring SMX FAST
09:12:50:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1195.082160 mV
09:12:50:ST3_smx:INFO:		Electrons
09:12:50:ST3_smx:INFO:	# loops 0
09:12:52:ST3_smx:INFO:	# loops 1
09:12:53:ST3_smx:INFO:	# loops 2
09:12:55:ST3_smx:INFO:	# loops 3
09:12:57:ST3_smx:INFO:	# loops 4
09:12:58:ST3_smx:INFO:	Total # of broken channels: 0
09:12:58:ST3_smx:INFO:	List of broken channels: []
09:12:58:ST3_smx:INFO:	Total # of broken channels: 0
09:12:58:ST3_smx:INFO:	List of broken channels: []
09:12:59:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:13:00:febtest:INFO:	1-0 | XA-000-08-002-000-003-045-14 |  34.6 | 1212.7
09:13:00:febtest:INFO:	8-1 | XA-000-08-002-000-003-050-09 |  28.2 | 1224.5
09:13:00:febtest:INFO:	3-2 | XA-000-08-002-000-003-035-14 |  44.1 | 1183.3
09:13:00:febtest:INFO:	10-3 | XA-000-08-002-000-003-049-09 |  31.4 | 1224.5
09:13:00:febtest:INFO:	5-4 | XA-000-08-002-000-003-032-14 |  40.9 | 1189.2
09:13:01:febtest:INFO:	12-5 | XA-000-08-002-000-003-043-14 |  21.9 | 1253.7
09:13:01:febtest:INFO:	7-6 | XA-000-08-002-000-003-053-09 |  47.3 | 1171.5
09:13:01:febtest:INFO:	14-7 | XA-000-08-002-000-003-042-14 |  37.7 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_05-09_11_16
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T1001161A2 42 A

FEB_SN : 1088
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	21322

MODULE_NAME:	L4DL200116 M4DL2T1001161A2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L4DL200116
MODULE_MODULE:	M4DL2T1001161A2
MODULE_SIZE:	42
MODULE_GRADE:	A
---------------------------------------
VI_before_Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.8150', '1.850', '0.5719']
VI_after__Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9900', '1.850', '0.3206']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:14:10:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1088/TestDate_2024_02_05-09_11_16/
09:15:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:15:58:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
09:15:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:15:58:febtest:INFO:	Testing FEB with SN 1046
09:16:01:smx_tester:INFO:	Scanning setup
09:16:01:elinks:INFO:	Disabling clock on downlink 0
09:16:01:elinks:INFO:	Disabling clock on downlink 1
09:16:01:elinks:INFO:	Disabling clock on downlink 2
09:16:01:elinks:INFO:	Disabling clock on downlink 3
09:16:01:elinks:INFO:	Disabling clock on downlink 4
09:16:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:16:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:16:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:16:01:elinks:INFO:	Disabling clock on downlink 0
09:16:01:elinks:INFO:	Disabling clock on downlink 1
09:16:01:elinks:INFO:	Disabling clock on downlink 2
09:16:01:elinks:INFO:	Disabling clock on downlink 3
09:16:01:elinks:INFO:	Disabling clock on downlink 4
09:16:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:16:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:16:01:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:16:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:16:01:elinks:INFO:	Disabling clock on downlink 0
09:16:01:elinks:INFO:	Disabling clock on downlink 1
09:16:01:elinks:INFO:	Disabling clock on downlink 2
09:16:01:elinks:INFO:	Disabling clock on downlink 3
09:16:01:elinks:INFO:	Disabling clock on downlink 4
09:16:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:16:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:16:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:16:01:elinks:INFO:	Disabling clock on downlink 0
09:16:01:elinks:INFO:	Disabling clock on downlink 1
09:16:01:elinks:INFO:	Disabling clock on downlink 2
09:16:01:elinks:INFO:	Disabling clock on downlink 3
09:16:01:elinks:INFO:	Disabling clock on downlink 4
09:16:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:16:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:16:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:16:01:elinks:INFO:	Disabling clock on downlink 0
09:16:02:elinks:INFO:	Disabling clock on downlink 1
09:16:02:elinks:INFO:	Disabling clock on downlink 2
09:16:02:elinks:INFO:	Disabling clock on downlink 3
09:16:02:elinks:INFO:	Disabling clock on downlink 4
09:16:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:16:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:16:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:16:02:setup_element:INFO:	Scanning clock phase
09:16:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:16:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:16:02:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:16:02:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:16:02:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:16:02:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:16:02:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:16:02:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:16:02:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:16:02:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:16:02:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:16:02:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:16:02:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:16:02:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:16:02:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:16:02:setup_element:INFO:	Eye window for uplink 14: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:16:02:setup_element:INFO:	Eye window for uplink 15: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:16:02:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
09:16:02:setup_element:INFO:	Scanning data phases
09:16:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:16:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:16:08:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:16:08:setup_element:INFO:	Eye window for uplink 0 : ___________XXXXX________________________
Data delay found: 33
09:16:08:setup_element:INFO:	Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
09:16:08:setup_element:INFO:	Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
09:16:08:setup_element:INFO:	Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
09:16:08:setup_element:INFO:	Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
09:16:08:setup_element:INFO:	Eye window for uplink 7 : X_________________________________XXXXX_
Data delay found: 17
09:16:08:setup_element:INFO:	Eye window for uplink 8 : ________________________XXXX____________
Data delay found: 5
09:16:08:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
09:16:08:setup_element:INFO:	Eye window for uplink 10: _________________________XXXXXX_________
Data delay found: 7
09:16:08:setup_element:INFO:	Eye window for uplink 11: ______________________________XXXX______
Data delay found: 11
09:16:08:setup_element:INFO:	Eye window for uplink 12: ____________________________XXXX________
Data delay found: 9
09:16:08:setup_element:INFO:	Eye window for uplink 13: _____________________________XXXXXX_____
Data delay found: 11
09:16:08:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
09:16:08:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXXX____
Data delay found: 13
09:16:08:setup_element:INFO:	Setting the data phase to 33 for uplink 0
09:16:08:setup_element:INFO:	Setting the data phase to 29 for uplink 1
09:16:08:setup_element:INFO:	Setting the data phase to 27 for uplink 4
09:16:08:setup_element:INFO:	Setting the data phase to 23 for uplink 5
09:16:08:setup_element:INFO:	Setting the data phase to 20 for uplink 6
09:16:08:setup_element:INFO:	Setting the data phase to 17 for uplink 7
09:16:08:setup_element:INFO:	Setting the data phase to 5 for uplink 8
09:16:08:setup_element:INFO:	Setting the data phase to 11 for uplink 9
09:16:08:setup_element:INFO:	Setting the data phase to 7 for uplink 10
09:16:08:setup_element:INFO:	Setting the data phase to 11 for uplink 11
09:16:08:setup_element:INFO:	Setting the data phase to 9 for uplink 12
09:16:08:setup_element:INFO:	Setting the data phase to 11 for uplink 13
09:16:08:setup_element:INFO:	Setting the data phase to 10 for uplink 14
09:16:08:setup_element:INFO:	Setting the data phase to 13 for uplink 15
09:16:08:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 71
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXX__
      Uplink  1: _______________________________________________________________________XXXXXXX__
      Uplink  4: ______________________________________________________________________XXXXXXX___
      Uplink  5: ______________________________________________________________________XXXXXXX___
      Uplink  6: _______________________________________________________________________XXXXXXX__
      Uplink  7: _______________________________________________________________________XXXXXXX__
      Uplink  8: _____________________________________________________________________XXXXXXXX___
      Uplink  9: _____________________________________________________________________XXXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: ________________________________________________________________________XXXXXX__
      Uplink 15: ________________________________________________________________________XXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 6:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 5
      Window Length: 36
      Eye Window: ________________________XXXX____________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 10:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 11:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 12:
      Optimal Phase: 9
      Window Length: 36
      Eye Window: ____________________________XXXX________
    Uplink 13:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 15:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
]
09:16:08:setup_element:INFO:	Beginning SMX ASICs map scan
09:16:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:16:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:16:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:16:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:16:08:uplink:INFO:	Setting uplinks mask [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:16:08:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:16:08:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:16:08:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:16:08:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:16:08:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:16:08:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:16:08:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:16:09:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:16:09:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:16:09:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:16:09:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:16:09:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:16:09:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:16:09:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:16:10:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 71
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXX__
      Uplink  1: _______________________________________________________________________XXXXXXX__
      Uplink  4: ______________________________________________________________________XXXXXXX___
      Uplink  5: ______________________________________________________________________XXXXXXX___
      Uplink  6: _______________________________________________________________________XXXXXXX__
      Uplink  7: _______________________________________________________________________XXXXXXX__
      Uplink  8: _____________________________________________________________________XXXXXXXX___
      Uplink  9: _____________________________________________________________________XXXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: ________________________________________________________________________XXXXXX__
      Uplink 15: ________________________________________________________________________XXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 6:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 5
      Window Length: 36
      Eye Window: ________________________XXXX____________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 10:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 11:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 12:
      Optimal Phase: 9
      Window Length: 36
      Eye Window: ____________________________XXXX________
    Uplink 13:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 15:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____

09:16:10:setup_element:INFO:	Performing Elink synchronization
09:16:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:16:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:16:10:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:16:10:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:16:10:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:16:10:uplink:INFO:	Enabling uplinks [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:16:11:ST3_emu:INFO:	Number of chips: 7
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_14
09:16:12:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:16:12:febtest:INFO:	1-0 | XA-000-08-002-000-004-049-01 |  40.9 | 1165.6
09:16:12:febtest:INFO:	8-1 | XA-000-08-002-000-004-149-05 |  40.9 | 1165.6
09:16:13:febtest:INFO:	10-3 | XA-000-08-002-000-004-134-02 |  18.7 | 1247.9
09:16:13:febtest:INFO:	5-4 | XA-000-08-002-000-004-127-04 |  47.3 | 1183.3
09:16:13:febtest:INFO:	12-5 | XA-000-08-002-000-004-141-02 |  25.1 | 1236.2
09:16:13:febtest:INFO:	7-6 | XA-000-08-002-000-004-050-01 |  37.7 | 1189.2
09:16:13:febtest:INFO:	14-7 | XA-000-08-002-000-004-123-04 |  37.7 | 1183.3
09:16:13:ST3_smx:INFO:	Configuring SMX FAST
09:16:15:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1171.483840 mV
09:16:15:ST3_smx:INFO:		Electrons
09:16:15:ST3_smx:INFO:	# loops 0
09:16:17:ST3_smx:INFO:	# loops 1
09:16:19:ST3_smx:INFO:	# loops 2
09:16:20:ST3_smx:INFO:	# loops 3
09:16:22:ST3_smx:INFO:	# loops 4
09:16:24:ST3_smx:INFO:	Total # of broken channels: 10
09:16:24:ST3_smx:INFO:	List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 23, 27]
09:16:24:ST3_smx:INFO:	Total # of broken channels: 63
09:16:24:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125]
09:16:25:ST3_smx:INFO:	Configuring SMX FAST
09:16:27:ST3_smx:INFO:	chip: 8-1 	 37.726682 C 	 1183.292940 mV
09:16:27:ST3_smx:INFO:		Electrons
09:16:27:ST3_smx:INFO:	# loops 0
09:16:29:ST3_smx:INFO:	# loops 1
09:16:30:ST3_smx:INFO:	# loops 2
09:16:32:ST3_smx:INFO:	# loops 3
09:16:33:ST3_smx:INFO:	# loops 4
09:16:35:ST3_smx:INFO:	Total # of broken channels: 29
09:16:35:ST3_smx:INFO:	List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 27, 29, 35, 87, 89, 93, 95, 97, 99, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121]
09:16:35:ST3_smx:INFO:	Total # of broken channels: 62
09:16:35:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125]
09:16:36:ST3_smx:INFO:	Configuring SMX FAST
09:16:38:ST3_smx:INFO:	chip: 10-3 	 28.225000 C 	 1218.600960 mV
09:16:38:ST3_smx:INFO:		Electrons
09:16:38:ST3_smx:INFO:	# loops 0
09:16:40:ST3_smx:INFO:	# loops 1
09:16:42:ST3_smx:INFO:	# loops 2
09:16:43:ST3_smx:INFO:	# loops 3
09:16:45:ST3_smx:INFO:	# loops 4
09:16:47:ST3_smx:INFO:	Total # of broken channels: 5
09:16:47:ST3_smx:INFO:	List of broken channels: [7, 9, 11, 23, 27]
09:16:47:ST3_smx:INFO:	Total # of broken channels: 62
09:16:47:ST3_smx:INFO:	List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
09:16:48:ST3_smx:INFO:	Configuring SMX FAST
09:16:50:ST3_smx:INFO:	chip: 5-4 	 56.797143 C 	 1153.732915 mV
09:16:50:ST3_smx:INFO:		Electrons
09:16:50:ST3_smx:INFO:	# loops 0
09:16:51:ST3_smx:INFO:	# loops 1
09:16:53:ST3_smx:INFO:	# loops 2
09:16:55:ST3_smx:INFO:	# loops 3
09:16:56:ST3_smx:INFO:	# loops 4
09:16:58:ST3_smx:INFO:	Total # of broken channels: 62
09:16:58:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125]
09:16:58:ST3_smx:INFO:	Total # of broken channels: 23
09:16:58:ST3_smx:INFO:	List of broken channels: [13, 19, 23, 25, 33, 35, 39, 41, 43, 45, 51, 63, 65, 67, 71, 85, 91, 95, 97, 101, 107, 113, 117]
09:16:59:ST3_smx:INFO:	Configuring SMX FAST
09:17:01:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1206.851500 mV
09:17:01:ST3_smx:INFO:		Electrons
09:17:01:ST3_smx:INFO:	# loops 0
09:17:02:ST3_smx:INFO:	# loops 1
09:17:04:ST3_smx:INFO:	# loops 2
09:17:06:ST3_smx:INFO:	# loops 3
09:17:07:ST3_smx:INFO:	# loops 4
09:17:09:ST3_smx:INFO:	Total # of broken channels: 0
09:17:09:ST3_smx:INFO:	List of broken channels: []
09:17:09:ST3_smx:INFO:	Total # of broken channels: 0
09:17:09:ST3_smx:INFO:	List of broken channels: []
09:17:10:ST3_smx:INFO:	Configuring SMX FAST
09:17:12:ST3_smx:INFO:	chip: 7-6 	 40.898880 C 	 1177.390875 mV
09:17:12:ST3_smx:INFO:		Electrons
09:17:12:ST3_smx:INFO:	# loops 0
09:17:13:ST3_smx:INFO:	# loops 1
09:17:15:ST3_smx:INFO:	# loops 2
09:17:17:ST3_smx:INFO:	# loops 3
09:17:18:ST3_smx:INFO:	# loops 4
09:17:20:ST3_smx:INFO:	Total # of broken channels: 59
09:17:20:ST3_smx:INFO:	List of broken channels: [7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 125]
09:17:20:ST3_smx:INFO:	Total # of broken channels: 81
09:17:20:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 84, 85, 86, 87, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 119, 120, 121, 122, 123, 125, 127]
09:17:21:ST3_smx:INFO:	Configuring SMX FAST
09:17:23:ST3_smx:INFO:	chip: 14-7 	 31.389742 C 	 1212.728715 mV
09:17:23:ST3_smx:INFO:		Electrons
09:17:23:ST3_smx:INFO:	# loops 0
09:17:25:ST3_smx:INFO:	# loops 1
09:17:26:ST3_smx:INFO:	# loops 2
09:17:28:ST3_smx:INFO:	# loops 3
09:17:29:ST3_smx:INFO:	# loops 4
09:17:31:ST3_smx:INFO:	Total # of broken channels: 3
09:17:31:ST3_smx:INFO:	List of broken channels: [5, 7, 9]
09:17:31:ST3_smx:INFO:	Total # of broken channels: 61
09:17:31:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121]
09:17:32:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:17:32:febtest:INFO:	1-0 | XA-000-08-002-000-004-049-01 |  40.9 | 1171.5
09:17:32:febtest:INFO:	8-1 | XA-000-08-002-000-004-149-05 |  37.7 | 1183.3
09:17:33:febtest:INFO:	10-3 | XA-000-08-002-000-004-134-02 |  28.2 | 1218.6
09:17:33:febtest:INFO:	5-4 | XA-000-08-002-000-004-127-04 |  60.0 | 1153.7
09:17:33:febtest:INFO:	12-5 | XA-000-08-002-000-004-141-02 |  34.6 | 1201.0
09:17:33:febtest:INFO:	7-6 | XA-000-08-002-000-004-050-01 |  40.9 | 1177.4
09:17:33:febtest:INFO:	14-7 | XA-000-08-002-000-004-123-04 |  31.4 | 1212.7
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_05-09_15_58
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T1001161A2 42 A

FEB_SN : 1046
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.0003', '1.850', '0.0000', '2.450', '1.8920', '1.850', '2.2190']
VI_after__Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9900', '1.850', '0.3206']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:17:38:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:17:38:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
09:17:38:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:17:39:febtest:INFO:	Testing FEB with SN 1046
09:17:41:smx_tester:INFO:	Scanning setup
09:17:41:elinks:INFO:	Disabling clock on downlink 0
09:17:41:elinks:INFO:	Disabling clock on downlink 1
09:17:41:elinks:INFO:	Disabling clock on downlink 2
09:17:41:elinks:INFO:	Disabling clock on downlink 3
09:17:41:elinks:INFO:	Disabling clock on downlink 4
09:17:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:17:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:17:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:17:41:elinks:INFO:	Disabling clock on downlink 0
09:17:41:elinks:INFO:	Disabling clock on downlink 1
09:17:41:elinks:INFO:	Disabling clock on downlink 2
09:17:41:elinks:INFO:	Disabling clock on downlink 3
09:17:41:elinks:INFO:	Disabling clock on downlink 4
09:17:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:17:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:17:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:17:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:17:41:elinks:INFO:	Disabling clock on downlink 0
09:17:41:elinks:INFO:	Disabling clock on downlink 1
09:17:41:elinks:INFO:	Disabling clock on downlink 2
09:17:41:elinks:INFO:	Disabling clock on downlink 3
09:17:41:elinks:INFO:	Disabling clock on downlink 4
09:17:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:17:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:17:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:17:42:elinks:INFO:	Disabling clock on downlink 0
09:17:42:elinks:INFO:	Disabling clock on downlink 1
09:17:42:elinks:INFO:	Disabling clock on downlink 2
09:17:42:elinks:INFO:	Disabling clock on downlink 3
09:17:42:elinks:INFO:	Disabling clock on downlink 4
09:17:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:17:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:17:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:17:42:elinks:INFO:	Disabling clock on downlink 0
09:17:42:elinks:INFO:	Disabling clock on downlink 1
09:17:42:elinks:INFO:	Disabling clock on downlink 2
09:17:42:elinks:INFO:	Disabling clock on downlink 3
09:17:42:elinks:INFO:	Disabling clock on downlink 4
09:17:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:17:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:17:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:17:42:setup_element:INFO:	Scanning clock phase
09:17:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:17:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:17:42:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:17:42:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:17:42:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:17:42:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:17:42:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:17:42:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:17:42:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:17:42:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:17:42:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:17:42:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:17:42:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:17:42:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:17:42:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:17:42:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:17:42:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:17:42:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 1
09:17:42:setup_element:INFO:	Scanning data phases
09:17:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:17:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:17:47:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:17:47:setup_element:INFO:	Eye window for uplink 0 : ____________XXXX________________________
Data delay found: 33
09:17:47:setup_element:INFO:	Eye window for uplink 1 : _______XXXXXX___________________________
Data delay found: 29
09:17:47:setup_element:INFO:	Eye window for uplink 4 : _____XXXXXX_____________________________
Data delay found: 27
09:17:47:setup_element:INFO:	Eye window for uplink 5 : __XXXX__________________________________
Data delay found: 23
09:17:47:setup_element:INFO:	Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
09:17:47:setup_element:INFO:	Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
09:17:47:setup_element:INFO:	Eye window for uplink 8 : _________________________XXXX_________XX
Data delay found: 12
09:17:47:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXXX___XX
Data delay found: 14
09:17:47:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
09:17:47:setup_element:INFO:	Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
09:17:47:setup_element:INFO:	Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
09:17:47:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
09:17:47:setup_element:INFO:	Eye window for uplink 14: ______________________________XXXX______
Data delay found: 11
09:17:47:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXXX____
Data delay found: 13
09:17:47:setup_element:INFO:	Setting the data phase to 33 for uplink 0
09:17:47:setup_element:INFO:	Setting the data phase to 29 for uplink 1
09:17:47:setup_element:INFO:	Setting the data phase to 27 for uplink 4
09:17:47:setup_element:INFO:	Setting the data phase to 23 for uplink 5
09:17:47:setup_element:INFO:	Setting the data phase to 21 for uplink 6
09:17:47:setup_element:INFO:	Setting the data phase to 17 for uplink 7
09:17:47:setup_element:INFO:	Setting the data phase to 12 for uplink 8
09:17:47:setup_element:INFO:	Setting the data phase to 14 for uplink 9
09:17:47:setup_element:INFO:	Setting the data phase to 8 for uplink 10
09:17:47:setup_element:INFO:	Setting the data phase to 12 for uplink 11
09:17:47:setup_element:INFO:	Setting the data phase to 10 for uplink 12
09:17:47:setup_element:INFO:	Setting the data phase to 12 for uplink 13
09:17:47:setup_element:INFO:	Setting the data phase to 11 for uplink 14
09:17:47:setup_element:INFO:	Setting the data phase to 13 for uplink 15
09:17:47:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXX__
      Uplink  1: _______________________________________________________________________XXXXXXX__
      Uplink  4: ______________________________________________________________________XXXXXXX___
      Uplink  5: ______________________________________________________________________XXXXXXX___
      Uplink  6: _______________________________________________________________________XXXXXX___
      Uplink  7: _______________________________________________________________________XXXXXX___
      Uplink  8: ____________________________________________________________________XXXXXXXXX___
      Uplink  9: ____________________________________________________________________XXXXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: _____________________________________________________________________XXXXXXXX___
      Uplink 13: _____________________________________________________________________XXXXXXXX___
      Uplink 14: _______________________________________________________________________XXXXXX___
      Uplink 15: _______________________________________________________________________XXXXXX___
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 33
      Window Length: 36
      Eye Window: ____________XXXX________________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 8:
      Optimal Phase: 12
      Window Length: 25
      Eye Window: _________________________XXXX_________XX
    Uplink 9:
      Optimal Phase: 14
      Window Length: 29
      Eye Window: _____________________________XXXXXX___XX
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 15:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
]
09:17:47:setup_element:INFO:	Beginning SMX ASICs map scan
09:17:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:17:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:17:47:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:17:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:17:47:uplink:INFO:	Setting uplinks mask [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:17:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:17:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:17:47:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:17:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:17:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:17:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:17:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:17:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:17:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:17:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:17:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:17:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:17:48:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:17:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:17:50:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXX__
      Uplink  1: _______________________________________________________________________XXXXXXX__
      Uplink  4: ______________________________________________________________________XXXXXXX___
      Uplink  5: ______________________________________________________________________XXXXXXX___
      Uplink  6: _______________________________________________________________________XXXXXX___
      Uplink  7: _______________________________________________________________________XXXXXX___
      Uplink  8: ____________________________________________________________________XXXXXXXXX___
      Uplink  9: ____________________________________________________________________XXXXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: _____________________________________________________________________XXXXXXXX___
      Uplink 13: _____________________________________________________________________XXXXXXXX___
      Uplink 14: _______________________________________________________________________XXXXXX___
      Uplink 15: _______________________________________________________________________XXXXXX___
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 33
      Window Length: 36
      Eye Window: ____________XXXX________________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 8:
      Optimal Phase: 12
      Window Length: 25
      Eye Window: _________________________XXXX_________XX
    Uplink 9:
      Optimal Phase: 14
      Window Length: 29
      Eye Window: _____________________________XXXXXX___XX
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 12:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 15:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____

09:17:50:setup_element:INFO:	Performing Elink synchronization
09:17:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:17:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:17:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:17:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:17:50:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:17:50:uplink:INFO:	Enabling uplinks [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:17:50:ST3_emu:INFO:	Number of chips: 7
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_14
09:17:51:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:17:51:febtest:INFO:	1-0 | XA-000-08-002-000-004-049-01 |  37.7 | 1189.2
09:17:52:febtest:INFO:	8-1 | XA-000-08-002-000-004-149-05 |  40.9 | 1171.5
09:17:52:febtest:INFO:	10-3 | XA-000-08-002-000-004-134-02 |  21.9 | 1247.9
09:17:52:febtest:INFO:	5-4 | XA-000-08-002-000-004-127-04 |  50.4 | 1177.4
09:17:52:febtest:INFO:	12-5 | XA-000-08-002-000-004-141-02 |  28.2 | 1224.5
09:17:53:febtest:INFO:	7-6 | XA-000-08-002-000-004-050-01 |  40.9 | 1183.3
09:17:53:febtest:INFO:	14-7 | XA-000-08-002-000-004-123-04 |  37.7 | 1183.3
09:17:53:ST3_smx:INFO:	Configuring SMX FAST
09:17:55:ST3_smx:INFO:	chip: 1-0 	 44.073563 C 	 1171.483840 mV
09:17:55:ST3_smx:INFO:		Electrons
09:17:55:ST3_smx:INFO:	# loops 0
09:17:57:ST3_smx:INFO:	# loops 1
09:17:58:ST3_smx:INFO:	# loops 2
09:18:00:ST3_smx:INFO:	# loops 3
09:18:02:ST3_smx:INFO:	# loops 4
09:18:03:ST3_smx:INFO:	Total # of broken channels: 0
09:18:03:ST3_smx:INFO:	List of broken channels: []
09:18:03:ST3_smx:INFO:	Total # of broken channels: 0
09:18:03:ST3_smx:INFO:	List of broken channels: []
09:18:04:ST3_smx:INFO:	Configuring SMX FAST
09:18:06:ST3_smx:INFO:	chip: 8-1 	 37.726682 C 	 1183.292940 mV
09:18:06:ST3_smx:INFO:		Electrons
09:18:06:ST3_smx:INFO:	# loops 0
09:18:08:ST3_smx:INFO:	# loops 1
09:18:09:ST3_smx:INFO:	# loops 2
09:18:11:ST3_smx:INFO:	# loops 3
09:18:13:ST3_smx:INFO:	# loops 4
09:18:14:ST3_smx:INFO:	Total # of broken channels: 0
09:18:14:ST3_smx:INFO:	List of broken channels: []
09:18:14:ST3_smx:INFO:	Total # of broken channels: 18
09:18:14:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 31, 33, 35, 39, 41]
09:18:15:ST3_smx:INFO:	Configuring SMX FAST
09:18:17:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1218.600960 mV
09:18:17:ST3_smx:INFO:		Electrons
09:18:17:ST3_smx:INFO:	# loops 0
09:18:19:ST3_smx:INFO:	# loops 1
09:18:21:ST3_smx:INFO:	# loops 2
09:18:22:ST3_smx:INFO:	# loops 3
09:18:24:ST3_smx:INFO:	# loops 4
09:18:26:ST3_smx:INFO:	Total # of broken channels: 0
09:18:26:ST3_smx:INFO:	List of broken channels: []
09:18:26:ST3_smx:INFO:	Total # of broken channels: 61
09:18:26:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
09:18:27:ST3_smx:INFO:	Configuring SMX FAST
09:18:29:ST3_smx:INFO:	chip: 5-4 	 59.984250 C 	 1153.732915 mV
09:18:29:ST3_smx:INFO:		Electrons
09:18:29:ST3_smx:INFO:	# loops 0
09:18:30:ST3_smx:INFO:	# loops 1
09:18:32:ST3_smx:INFO:	# loops 2
09:18:34:ST3_smx:INFO:	# loops 3
09:18:35:ST3_smx:INFO:	# loops 4
09:18:37:ST3_smx:INFO:	Total # of broken channels: 0
09:18:37:ST3_smx:INFO:	List of broken channels: []
09:18:37:ST3_smx:INFO:	Total # of broken channels: 0
09:18:37:ST3_smx:INFO:	List of broken channels: []
09:18:38:ST3_smx:INFO:	Configuring SMX FAST
09:18:40:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1200.969315 mV
09:18:40:ST3_smx:INFO:		Electrons
09:18:40:ST3_smx:INFO:	# loops 0
09:18:42:ST3_smx:INFO:	# loops 1
09:18:43:ST3_smx:INFO:	# loops 2
09:18:45:ST3_smx:INFO:	# loops 3
09:18:46:ST3_smx:INFO:	# loops 4
09:18:48:ST3_smx:INFO:	Total # of broken channels: 0
09:18:48:ST3_smx:INFO:	List of broken channels: []
09:18:48:ST3_smx:INFO:	Total # of broken channels: 0
09:18:48:ST3_smx:INFO:	List of broken channels: []
09:18:49:ST3_smx:INFO:	Configuring SMX FAST
09:18:51:ST3_smx:INFO:	chip: 7-6 	 44.073563 C 	 1177.390875 mV
09:18:51:ST3_smx:INFO:		Electrons
09:18:51:ST3_smx:INFO:	# loops 0
09:18:53:ST3_smx:INFO:	# loops 1
09:18:54:ST3_smx:INFO:	# loops 2
09:18:56:ST3_smx:INFO:	# loops 3
09:18:58:ST3_smx:INFO:	# loops 4
09:18:59:ST3_smx:INFO:	Total # of broken channels: 1
09:18:59:ST3_smx:INFO:	List of broken channels: [125]
09:18:59:ST3_smx:INFO:	Total # of broken channels: 11
09:18:59:ST3_smx:INFO:	List of broken channels: [21, 102, 106, 108, 110, 112, 114, 116, 118, 120, 125]
09:19:00:ST3_smx:INFO:	Configuring SMX FAST
09:19:02:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1212.728715 mV
09:19:02:ST3_smx:INFO:		Electrons
09:19:02:ST3_smx:INFO:	# loops 0
09:19:04:ST3_smx:INFO:	# loops 1
09:19:06:ST3_smx:INFO:	# loops 2
09:19:07:ST3_smx:INFO:	# loops 3
09:19:09:ST3_smx:INFO:	# loops 4
09:19:10:ST3_smx:INFO:	Total # of broken channels: 0
09:19:10:ST3_smx:INFO:	List of broken channels: []
09:19:11:ST3_smx:INFO:	Total # of broken channels: 36
09:19:11:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 33, 35, 39, 43, 49, 81, 83, 85, 89, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117]
09:19:11:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:19:12:febtest:INFO:	1-0 | XA-000-08-002-000-004-049-01 |  44.1 | 1171.5
09:19:12:febtest:INFO:	8-1 | XA-000-08-002-000-004-149-05 |  37.7 | 1183.3
09:19:12:febtest:INFO:	10-3 | XA-000-08-002-000-004-134-02 |  31.4 | 1218.6
09:19:12:febtest:INFO:	5-4 | XA-000-08-002-000-004-127-04 |  60.0 | 1147.8
09:19:12:febtest:INFO:	12-5 | XA-000-08-002-000-004-141-02 |  34.6 | 1201.0
09:19:13:febtest:INFO:	7-6 | XA-000-08-002-000-004-050-01 |  44.1 | 1177.4
09:19:13:febtest:INFO:	14-7 | XA-000-08-002-000-004-123-04 |  34.6 | 1212.7
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_05-09_17_38
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T1001161A2 42 A

FEB_SN : 1046
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.0002', '1.850', '0.0000', '2.450', '1.8700', '1.850', '2.2440']
VI_after__Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9900', '1.850', '0.3206']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
12:14:54:febtest:INFO:	FEB 8-2 selected
12:14:54:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
12:15:02:ST3_Shared:INFO:	Listo of operators:Alois Alzheimer
12:15:03:ST3_Shared:INFO:	Listo of operators:Robert V.; 
12:15:06:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:15:06:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
12:15:06:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:15:06:febtest:INFO:	Testing FEB with SN 2103
12:15:09:smx_tester:INFO:	Scanning setup
12:15:09:elinks:INFO:	Disabling clock on downlink 0
12:15:09:elinks:INFO:	Disabling clock on downlink 1
12:15:09:elinks:INFO:	Disabling clock on downlink 2
12:15:09:elinks:INFO:	Disabling clock on downlink 3
12:15:09:elinks:INFO:	Disabling clock on downlink 4
12:15:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:15:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:15:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:15:09:elinks:INFO:	Disabling clock on downlink 0
12:15:09:elinks:INFO:	Disabling clock on downlink 1
12:15:09:elinks:INFO:	Disabling clock on downlink 2
12:15:09:elinks:INFO:	Disabling clock on downlink 3
12:15:09:elinks:INFO:	Disabling clock on downlink 4
12:15:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:15:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:15:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:15:09:elinks:INFO:	Disabling clock on downlink 0
12:15:09:elinks:INFO:	Disabling clock on downlink 1
12:15:09:elinks:INFO:	Disabling clock on downlink 2
12:15:09:elinks:INFO:	Disabling clock on downlink 3
12:15:09:elinks:INFO:	Disabling clock on downlink 4
12:15:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:15:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:15:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:15:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:15:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:15:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:15:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:15:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:15:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:15:09:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:15:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:15:09:elinks:INFO:	Disabling clock on downlink 0
12:15:09:elinks:INFO:	Disabling clock on downlink 1
12:15:09:elinks:INFO:	Disabling clock on downlink 2
12:15:09:elinks:INFO:	Disabling clock on downlink 3
12:15:09:elinks:INFO:	Disabling clock on downlink 4
12:15:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:15:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:15:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:15:09:elinks:INFO:	Disabling clock on downlink 0
12:15:09:elinks:INFO:	Disabling clock on downlink 1
12:15:09:elinks:INFO:	Disabling clock on downlink 2
12:15:09:elinks:INFO:	Disabling clock on downlink 3
12:15:09:elinks:INFO:	Disabling clock on downlink 4
12:15:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:15:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:15:10:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:15:10:setup_element:INFO:	Scanning clock phase
12:15:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:15:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:15:10:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:15:10:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:15:10:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:15:10:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:15:10:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:15:10:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:15:10:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:15:10:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:15:10:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:15:10:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
12:15:10:setup_element:INFO:	Scanning data phases
12:15:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:15:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:15:15:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:15:15:setup_element:INFO:	Eye window for uplink 24: _____XXXX_______________________________
Data delay found: 26
12:15:15:setup_element:INFO:	Eye window for uplink 25: ________XXXX____________________________
Data delay found: 29
12:15:15:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
12:15:15:setup_element:INFO:	Eye window for uplink 27: ____________XXXXX_______________________
Data delay found: 34
12:15:15:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
12:15:15:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
12:15:15:setup_element:INFO:	Eye window for uplink 30: _______________XXXXX____________________
Data delay found: 37
12:15:15:setup_element:INFO:	Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
12:15:15:setup_element:INFO:	Setting the data phase to 26 for uplink 24
12:15:15:setup_element:INFO:	Setting the data phase to 29 for uplink 25
12:15:15:setup_element:INFO:	Setting the data phase to 30 for uplink 26
12:15:15:setup_element:INFO:	Setting the data phase to 34 for uplink 27
12:15:15:setup_element:INFO:	Setting the data phase to 35 for uplink 28
12:15:15:setup_element:INFO:	Setting the data phase to 36 for uplink 29
12:15:15:setup_element:INFO:	Setting the data phase to 37 for uplink 30
12:15:15:setup_element:INFO:	Setting the data phase to 35 for uplink 31
12:15:15:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 71
    Eye Windows:
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: ______________________________________________________________________XXXXXXXX__
      Uplink 27: ______________________________________________________________________XXXXXXXX__
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: ________________________________________________________________________XXXXXX__
      Uplink 31: ________________________________________________________________________XXXXXX__
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 29:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 35
      Eye Window: _______________XXXXX____________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
]
12:15:15:setup_element:INFO:	Beginning SMX ASICs map scan
12:15:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:15:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:15:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:15:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:15:15:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
12:15:16:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:15:16:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:15:16:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:15:16:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:15:16:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:15:16:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:15:17:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:15:17:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:15:18:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 71
    Eye Windows:
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: ______________________________________________________________________XXXXXXXX__
      Uplink 27: ______________________________________________________________________XXXXXXXX__
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: ________________________________________________________________________XXXXXX__
      Uplink 31: ________________________________________________________________________XXXXXX__
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 29:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 35
      Eye Window: _______________XXXXX____________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________

12:15:18:setup_element:INFO:	Performing Elink synchronization
12:15:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:15:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:15:18:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:15:18:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:15:18:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:15:18:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
12:15:18:ST3_emu:INFO:	Number of chips: 4
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
12:15:19:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:15:19:febtest:INFO:	30-1 | XA-000-08-002-002-008-037-05 |  40.9 | 1135.9
12:15:20:febtest:INFO:	28-3 | XA-000-08-002-000-000-143-04 |  37.7 | 1147.8
12:15:20:febtest:INFO:	26-5 | XA-000-08-002-002-008-035-05 |  18.7 | 1206.9
12:15:20:febtest:INFO:	24-7 | XA-000-08-002-000-000-140-04 |  34.6 | 1159.7
12:15:20:ST3_smx:INFO:	Configuring SMX FAST
12:15:22:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1147.806000 mV
12:15:22:ST3_smx:INFO:		Electrons
12:15:22:ST3_smx:INFO:	# loops 0
12:15:24:ST3_smx:INFO:	# loops 1
12:15:26:ST3_smx:INFO:	# loops 2
12:15:27:ST3_smx:INFO:	# loops 3
12:15:29:ST3_smx:INFO:	# loops 4
12:15:30:ST3_smx:INFO:	Total # of broken channels: 0
12:15:30:ST3_smx:INFO:	List of broken channels: []
12:15:30:ST3_smx:INFO:	Total # of broken channels: 0
12:15:30:ST3_smx:INFO:	List of broken channels: []
12:15:31:ST3_smx:INFO:	Configuring SMX FAST
12:15:33:ST3_smx:INFO:	chip: 28-3 	 34.556970 C 	 1153.732915 mV
12:15:33:ST3_smx:INFO:		Electrons
12:15:33:ST3_smx:INFO:	# loops 0
12:15:35:ST3_smx:INFO:	# loops 1
12:15:37:ST3_smx:INFO:	# loops 2
12:15:38:ST3_smx:INFO:	# loops 3
12:15:40:ST3_smx:INFO:	# loops 4
12:15:42:ST3_smx:INFO:	Total # of broken channels: 0
12:15:42:ST3_smx:INFO:	List of broken channels: []
12:15:42:ST3_smx:INFO:	Total # of broken channels: 0
12:15:42:ST3_smx:INFO:	List of broken channels: []
12:15:43:ST3_smx:INFO:	Configuring SMX FAST
12:15:44:ST3_smx:INFO:	chip: 26-5 	 18.745682 C 	 1200.969315 mV
12:15:45:ST3_smx:INFO:		Electrons
12:15:45:ST3_smx:INFO:	# loops 0
12:15:46:ST3_smx:INFO:	# loops 1
12:15:48:ST3_smx:INFO:	# loops 2
12:15:49:ST3_smx:INFO:	# loops 3
12:15:51:ST3_smx:INFO:	# loops 4
12:15:53:ST3_smx:INFO:	Total # of broken channels: 0
12:15:53:ST3_smx:INFO:	List of broken channels: []
12:15:53:ST3_smx:INFO:	Total # of broken channels: 0
12:15:53:ST3_smx:INFO:	List of broken channels: []
12:15:54:ST3_smx:INFO:	Configuring SMX FAST
12:15:56:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1147.806000 mV
12:15:56:ST3_smx:INFO:		Electrons
12:15:56:ST3_smx:INFO:	# loops 0
12:15:57:ST3_smx:INFO:	# loops 1
12:15:59:ST3_smx:INFO:	# loops 2
12:16:00:ST3_smx:INFO:	# loops 3
12:16:02:ST3_smx:INFO:	# loops 4
12:16:04:ST3_smx:INFO:	Total # of broken channels: 0
12:16:04:ST3_smx:INFO:	List of broken channels: []
12:16:04:ST3_smx:INFO:	Total # of broken channels: 0
12:16:04:ST3_smx:INFO:	List of broken channels: []
12:16:05:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:16:05:febtest:INFO:	30-1 | XA-000-08-002-002-008-037-05 |  34.6 | 1147.8
12:16:05:febtest:INFO:	28-3 | XA-000-08-002-000-000-143-04 |  37.7 | 1153.7
12:16:05:febtest:INFO:	26-5 | XA-000-08-002-002-008-035-05 |  21.9 | 1206.9
12:16:06:febtest:INFO:	24-7 | XA-000-08-002-000-000-140-04 |  40.9 | 1147.8
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_05-12_15_06
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T1001161A2 42 A

FEB_SN : 2103
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '0.7575', '1.850', '1.0620', '2.450', '0.0002', '1.850', '0.0001']
VI_after__Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9900', '1.850', '0.3206']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
12:19:08:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2103/TestDate_2024_02_05-12_15_06/