
FEB_2106 14.03.24 09:31:32
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09:31:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:31:32:ST3_Shared:INFO: FEB-Microcable 09:31:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:31:32:febtest:INFO: Testing FEB with SN 2106 09:31:35:smx_tester:INFO: Scanning setup 09:31:35:elinks:INFO: Disabling clock on downlink 0 09:31:35:elinks:INFO: Disabling clock on downlink 1 09:31:35:elinks:INFO: Disabling clock on downlink 2 09:31:35:elinks:INFO: Disabling clock on downlink 3 09:31:35:elinks:INFO: Disabling clock on downlink 4 09:31:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:31:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:31:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:31:35:elinks:INFO: Disabling clock on downlink 0 09:31:35:elinks:INFO: Disabling clock on downlink 1 09:31:35:elinks:INFO: Disabling clock on downlink 2 09:31:35:elinks:INFO: Disabling clock on downlink 3 09:31:35:elinks:INFO: Disabling clock on downlink 4 09:31:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:31:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:31:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:31:35:elinks:INFO: Disabling clock on downlink 0 09:31:35:elinks:INFO: Disabling clock on downlink 1 09:31:35:elinks:INFO: Disabling clock on downlink 2 09:31:35:elinks:INFO: Disabling clock on downlink 3 09:31:35:elinks:INFO: Disabling clock on downlink 4 09:31:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:31:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:31:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:31:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:31:35:elinks:INFO: Disabling clock on downlink 0 09:31:35:elinks:INFO: Disabling clock on downlink 1 09:31:35:elinks:INFO: Disabling clock on downlink 2 09:31:35:elinks:INFO: Disabling clock on downlink 3 09:31:35:elinks:INFO: Disabling clock on downlink 4 09:31:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:31:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:31:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:31:36:elinks:INFO: Disabling clock on downlink 0 09:31:36:elinks:INFO: Disabling clock on downlink 1 09:31:36:elinks:INFO: Disabling clock on downlink 2 09:31:36:elinks:INFO: Disabling clock on downlink 3 09:31:36:elinks:INFO: Disabling clock on downlink 4 09:31:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:31:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:31:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:31:36:setup_element:INFO: Scanning clock phase 09:31:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:31:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:31:36:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:31:36:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:31:36:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:31:36:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:31:36:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:31:36:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________ Clock Delay: 40 09:31:36:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________ Clock Delay: 40 09:31:36:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 09:31:36:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 09:31:36:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:31:36:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:31:36:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:31:36:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:31:36:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:31:36:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:31:36:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:31:36:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:31:36:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 09:31:36:setup_element:INFO: Scanning data phases 09:31:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:31:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:31:42:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:31:42:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX Data delay found: 18 09:31:42:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_ Data delay found: 16 09:31:42:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX Data delay found: 19 09:31:42:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXXX Data delay found: 17 09:31:42:setup_element:INFO: Eye window for uplink 20: ____________________________________XXXX Data delay found: 17 09:31:42:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_ Data delay found: 16 09:31:42:setup_element:INFO: Eye window for uplink 22: XX_________________________________XXXXX Data delay found: 18 09:31:42:setup_element:INFO: Eye window for uplink 23: XXXXX_____________________________XXXXXX Data delay found: 19 09:31:42:setup_element:INFO: Eye window for uplink 24: _________XXXXXX_________________________ Data delay found: 31 09:31:42:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________ Data delay found: 33 09:31:42:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________ Data delay found: 32 09:31:42:setup_element:INFO: Eye window for uplink 27: ______________XXXXX_____________________ Data delay found: 36 09:31:42:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________ Data delay found: 35 09:31:42:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________ Data delay found: 37 09:31:42:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXX__________________ Data delay found: 38 09:31:42:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________ Data delay found: 38 09:31:42:setup_element:INFO: Setting the data phase to 18 for uplink 16 09:31:42:setup_element:INFO: Setting the data phase to 16 for uplink 17 09:31:42:setup_element:INFO: Setting the data phase to 19 for uplink 18 09:31:42:setup_element:INFO: Setting the data phase to 17 for uplink 19 09:31:42:setup_element:INFO: Setting the data phase to 17 for uplink 20 09:31:42:setup_element:INFO: Setting the data phase to 16 for uplink 21 09:31:42:setup_element:INFO: Setting the data phase to 18 for uplink 22 09:31:42:setup_element:INFO: Setting the data phase to 19 for uplink 23 09:31:42:setup_element:INFO: Setting the data phase to 31 for uplink 24 09:31:42:setup_element:INFO: Setting the data phase to 33 for uplink 25 09:31:42:setup_element:INFO: Setting the data phase to 32 for uplink 26 09:31:42:setup_element:INFO: Setting the data phase to 36 for uplink 27 09:31:42:setup_element:INFO: Setting the data phase to 35 for uplink 28 09:31:42:setup_element:INFO: Setting the data phase to 37 for uplink 29 09:31:42:setup_element:INFO: Setting the data phase to 38 for uplink 30 09:31:42:setup_element:INFO: Setting the data phase to 38 for uplink 31 09:31:42:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 16: _____________________________________________________________________XXXXXXX____ Uplink 17: _____________________________________________________________________XXXXXXX____ Uplink 18: ____________________________________________________________________XXXXXXXX____ Uplink 19: ____________________________________________________________________XXXXXXXX____ Uplink 20: ________________________________________________________________________________ Uplink 21: ________________________________________________________________________________ Uplink 22: ____________________________________________________________________XXXXXXXXX___ Uplink 23: ____________________________________________________________________XXXXXXXXX___ Uplink 24: _____________________________________________________________________XXXXXXXX___ Uplink 25: _____________________________________________________________________XXXXXXXX___ Uplink 26: _____________________________________________________________________XXXXXXX____ Uplink 27: _____________________________________________________________________XXXXXXX____ Uplink 28: _____________________________________________________________________XXXXXXX____ Uplink 29: _____________________________________________________________________XXXXXXX____ Uplink 30: ______________________________________________________________________XXXXXXXX__ Uplink 31: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 17: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 18: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 19: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 20: Optimal Phase: 17 Window Length: 36 Eye Window: ____________________________________XXXX Uplink 21: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 22: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 23: Optimal Phase: 19 Window Length: 29 Eye Window: XXXXX_____________________________XXXXXX Uplink 24: Optimal Phase: 31 Window Length: 34 Eye Window: _________XXXXXX_________________________ Uplink 25: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 26: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 27: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 28: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 29: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 30: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ Uplink 31: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ ] 09:31:42:setup_element:INFO: Beginning SMX ASICs map scan 09:31:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:31:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:31:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:31:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:31:42:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:31:42:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 09:31:42:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 09:31:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:31:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:31:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 09:31:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 09:31:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:31:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:31:43:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 09:31:43:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 09:31:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:31:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:31:43:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 09:31:43:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 09:31:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:31:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:31:44:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 16: _____________________________________________________________________XXXXXXX____ Uplink 17: _____________________________________________________________________XXXXXXX____ Uplink 18: ____________________________________________________________________XXXXXXXX____ Uplink 19: ____________________________________________________________________XXXXXXXX____ Uplink 20: ________________________________________________________________________________ Uplink 21: ________________________________________________________________________________ Uplink 22: ____________________________________________________________________XXXXXXXXX___ Uplink 23: ____________________________________________________________________XXXXXXXXX___ Uplink 24: _____________________________________________________________________XXXXXXXX___ Uplink 25: _____________________________________________________________________XXXXXXXX___ Uplink 26: _____________________________________________________________________XXXXXXX____ Uplink 27: _____________________________________________________________________XXXXXXX____ Uplink 28: _____________________________________________________________________XXXXXXX____ Uplink 29: _____________________________________________________________________XXXXXXX____ Uplink 30: ______________________________________________________________________XXXXXXXX__ Uplink 31: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 17: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 18: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 19: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 20: Optimal Phase: 17 Window Length: 36 Eye Window: ____________________________________XXXX Uplink 21: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 22: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 23: Optimal Phase: 19 Window Length: 29 Eye Window: XXXXX_____________________________XXXXXX Uplink 24: Optimal Phase: 31 Window Length: 34 Eye Window: _________XXXXXX_________________________ Uplink 25: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 26: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 27: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 28: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 29: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 30: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ Uplink 31: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ 09:31:44:setup_element:INFO: Performing Elink synchronization 09:31:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:31:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:31:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:31:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:31:44:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:31:44:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:31:45:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] FEB type: B FEB_A: 0 FEB_B: 1 09:31:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:31:46:febtest:INFO: 23-00 | XA-000-08-002-000-008-238-03 | 44.1 | 1159.7 09:31:46:febtest:INFO: 30-01 | XA-000-08-002-001-006-062-10 | 34.6 | 1183.3 09:31:46:febtest:INFO: 21-02 | XA-000-08-002-000-008-240-04 | 47.3 | 1147.8 09:31:47:febtest:INFO: 28-03 | XA-000-08-002-001-006-061-10 | 40.9 | 1165.6 09:31:47:febtest:INFO: 19-04 | XA-000-08-002-000-008-243-04 | 40.9 | 1171.5 09:31:47:febtest:INFO: 26-05 | XA-000-08-002-000-008-255-04 | 34.6 | 1195.1 09:31:47:febtest:INFO: 17-06 | XA-000-08-002-000-008-248-04 | 47.3 | 1159.7 09:31:48:febtest:INFO: 24-07 | XA-000-08-002-001-006-004-03 | 47.3 | 1147.8 09:31:48:ST3_smx:INFO: Configuring SMX FAST 09:31:50:ST3_smx:INFO: chip: 23-0 44.073563 C 1159.654860 mV 09:31:50:ST3_smx:INFO: Electrons 09:31:50:ST3_smx:INFO: # loops 0 09:31:51:ST3_smx:INFO: # loops 1 09:31:53:ST3_smx:INFO: # loops 2 09:31:55:ST3_smx:INFO: Total # of broken channels: 0 09:31:55:ST3_smx:INFO: List of broken channels: [] 09:31:55:ST3_smx:INFO: Total # of broken channels: 0 09:31:55:ST3_smx:INFO: List of broken channels: [] 09:31:56:ST3_smx:INFO: Configuring SMX FAST 09:31:58:ST3_smx:INFO: chip: 30-1 40.898880 C 1153.732915 mV 09:31:58:ST3_smx:INFO: Electrons 09:31:58:ST3_smx:INFO: # loops 0 09:31:59:ST3_smx:INFO: # loops 1 09:32:01:ST3_smx:INFO: # loops 2 09:32:03:ST3_smx:INFO: Total # of broken channels: 0 09:32:03:ST3_smx:INFO: List of broken channels: [] 09:32:03:ST3_smx:INFO: Total # of broken channels: 0 09:32:03:ST3_smx:INFO: List of broken channels: [] 09:32:04:ST3_smx:INFO: Configuring SMX FAST 09:32:06:ST3_smx:INFO: chip: 21-2 47.250730 C 1153.732915 mV 09:32:06:ST3_smx:INFO: Electrons 09:32:06:ST3_smx:INFO: # loops 0 09:32:08:ST3_smx:INFO: # loops 1 09:32:09:ST3_smx:INFO: # loops 2 09:32:11:ST3_smx:INFO: Total # of broken channels: 0 09:32:11:ST3_smx:INFO: List of broken channels: [] 09:32:11:ST3_smx:INFO: Total # of broken channels: 0 09:32:11:ST3_smx:INFO: List of broken channels: [] 09:32:12:ST3_smx:INFO: Configuring SMX FAST 09:32:14:ST3_smx:INFO: chip: 28-3 37.726682 C 1177.390875 mV 09:32:14:ST3_smx:INFO: Electrons 09:32:14:ST3_smx:INFO: # loops 0 09:32:16:ST3_smx:INFO: # loops 1 09:32:17:ST3_smx:INFO: # loops 2 09:32:19:ST3_smx:INFO: Total # of broken channels: 0 09:32:19:ST3_smx:INFO: List of broken channels: [] 09:32:19:ST3_smx:INFO: Total # of broken channels: 0 09:32:19:ST3_smx:INFO: List of broken channels: [] 09:32:20:ST3_smx:INFO: Configuring SMX FAST 09:32:22:ST3_smx:INFO: chip: 19-4 44.073563 C 1165.571835 mV 09:32:22:ST3_smx:INFO: Electrons 09:32:22:ST3_smx:INFO: # loops 0 09:32:24:ST3_smx:INFO: # loops 1 09:32:25:ST3_smx:INFO: # loops 2 09:32:27:ST3_smx:INFO: Total # of broken channels: 0 09:32:27:ST3_smx:INFO: List of broken channels: [] 09:32:27:ST3_smx:INFO: Total # of broken channels: 0 09:32:27:ST3_smx:INFO: List of broken channels: [] 09:32:28:ST3_smx:INFO: Configuring SMX FAST 09:32:30:ST3_smx:INFO: chip: 26-5 40.898880 C 1165.571835 mV 09:32:30:ST3_smx:INFO: Electrons 09:32:30:ST3_smx:INFO: # loops 0 09:32:32:ST3_smx:INFO: # loops 1 09:32:33:ST3_smx:INFO: # loops 2 09:32:35:ST3_smx:INFO: Total # of broken channels: 0 09:32:35:ST3_smx:INFO: List of broken channels: [] 09:32:35:ST3_smx:INFO: Total # of broken channels: 0 09:32:35:ST3_smx:INFO: List of broken channels: [] 09:32:36:ST3_smx:INFO: Configuring SMX FAST 09:32:38:ST3_smx:INFO: chip: 17-6 47.250730 C 1159.654860 mV 09:32:38:ST3_smx:INFO: Electrons 09:32:38:ST3_smx:INFO: # loops 0 09:32:40:ST3_smx:INFO: # loops 1 09:32:42:ST3_smx:INFO: # loops 2 09:32:43:ST3_smx:INFO: Total # of broken channels: 0 09:32:43:ST3_smx:INFO: List of broken channels: [] 09:32:43:ST3_smx:INFO: Total # of broken channels: 0 09:32:43:ST3_smx:INFO: List of broken channels: [] 09:32:44:ST3_smx:INFO: Configuring SMX FAST 09:32:46:ST3_smx:INFO: chip: 24-7 40.898880 C 1171.483840 mV 09:32:46:ST3_smx:INFO: Electrons 09:32:46:ST3_smx:INFO: # loops 0 09:32:48:ST3_smx:INFO: # loops 1 09:32:50:ST3_smx:INFO: # loops 2 09:32:51:ST3_smx:INFO: Total # of broken channels: 0 09:32:51:ST3_smx:INFO: List of broken channels: [] 09:32:51:ST3_smx:INFO: Total # of broken channels: 0 09:32:51:ST3_smx:INFO: List of broken channels: [] 09:32:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:32:52:febtest:INFO: 23-00 | XA-000-08-002-000-008-238-03 | 44.1 | 1159.7 09:32:53:febtest:INFO: 30-01 | XA-000-08-002-001-006-062-10 | 44.1 | 1153.7 09:32:53:febtest:INFO: 21-02 | XA-000-08-002-000-008-240-04 | 47.3 | 1159.7 09:32:53:febtest:INFO: 28-03 | XA-000-08-002-001-006-061-10 | 37.7 | 1177.4 09:32:53:febtest:INFO: 19-04 | XA-000-08-002-000-008-243-04 | 47.3 | 1165.6 09:32:53:febtest:INFO: 26-05 | XA-000-08-002-000-008-255-04 | 40.9 | 1165.6 09:32:54:febtest:INFO: 17-06 | XA-000-08-002-000-008-248-04 | 47.3 | 1159.7 09:32:54:febtest:INFO: 24-07 | XA-000-08-002-001-006-004-03 | 40.9 | 1171.5 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_03_14-09_31_32 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L5DL100116 M5DL1T0001160A2 42 A FEB_SN : 2106 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 0 FEB_B : 1 --------------------------------------- --------------------------------------- VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5090', '1.852', '1.7780'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9860', '1.850', '0.4360'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9830', '1.850', '0.3162']