
FEB_2109 14.03.24 09:36:53
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09:36:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:36:53:ST3_Shared:INFO: FEB-Microcable 09:36:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:36:53:febtest:INFO: Testing FEB with SN 2109 09:36:56:smx_tester:INFO: Scanning setup 09:36:56:elinks:INFO: Disabling clock on downlink 0 09:36:56:elinks:INFO: Disabling clock on downlink 1 09:36:56:elinks:INFO: Disabling clock on downlink 2 09:36:56:elinks:INFO: Disabling clock on downlink 3 09:36:56:elinks:INFO: Disabling clock on downlink 4 09:36:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:36:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:36:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:36:56:elinks:INFO: Disabling clock on downlink 0 09:36:56:elinks:INFO: Disabling clock on downlink 1 09:36:56:elinks:INFO: Disabling clock on downlink 2 09:36:56:elinks:INFO: Disabling clock on downlink 3 09:36:56:elinks:INFO: Disabling clock on downlink 4 09:36:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:36:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:36:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:36:56:elinks:INFO: Disabling clock on downlink 0 09:36:56:elinks:INFO: Disabling clock on downlink 1 09:36:56:elinks:INFO: Disabling clock on downlink 2 09:36:56:elinks:INFO: Disabling clock on downlink 3 09:36:56:elinks:INFO: Disabling clock on downlink 4 09:36:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:36:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:36:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:36:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:36:56:elinks:INFO: Disabling clock on downlink 0 09:36:56:elinks:INFO: Disabling clock on downlink 1 09:36:56:elinks:INFO: Disabling clock on downlink 2 09:36:56:elinks:INFO: Disabling clock on downlink 3 09:36:56:elinks:INFO: Disabling clock on downlink 4 09:36:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:36:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:36:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:36:56:elinks:INFO: Disabling clock on downlink 0 09:36:56:elinks:INFO: Disabling clock on downlink 1 09:36:56:elinks:INFO: Disabling clock on downlink 2 09:36:56:elinks:INFO: Disabling clock on downlink 3 09:36:56:elinks:INFO: Disabling clock on downlink 4 09:36:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:36:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:36:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:36:56:setup_element:INFO: Scanning clock phase 09:36:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:36:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:36:57:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:36:57:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 09:36:57:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 09:36:57:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:36:57:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:36:57:setup_element:INFO: Eye window for uplink 20: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 09:36:57:setup_element:INFO: Eye window for uplink 21: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 09:36:57:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:36:57:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:36:57:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 09:36:57:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 09:36:57:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:36:57:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 09:36:57:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:36:57:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:36:57:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:36:57:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:36:57:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2 09:36:57:setup_element:INFO: Scanning data phases 09:36:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:36:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:37:02:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:37:02:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX Data delay found: 20 09:37:02:setup_element:INFO: Eye window for uplink 17: X___________________________________XXXX Data delay found: 18 09:37:02:setup_element:INFO: Eye window for uplink 18: XX_________________________________XXXXX Data delay found: 18 09:37:02:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXXX_ Data delay found: 15 09:37:02:setup_element:INFO: Eye window for uplink 20: __________________________________XXXXXX Data delay found: 16 09:37:02:setup_element:INFO: Eye window for uplink 21: __________________________________XXXX__ Data delay found: 15 09:37:02:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX Data delay found: 18 09:37:02:setup_element:INFO: Eye window for uplink 23: XXXXX_____________________________XXXXXX Data delay found: 19 09:37:02:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________ Data delay found: 29 09:37:02:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________ Data delay found: 31 09:37:02:setup_element:INFO: Eye window for uplink 26: _________XXXXX__________________________ Data delay found: 31 09:37:02:setup_element:INFO: Eye window for uplink 27: ____________XXXXXX______________________ Data delay found: 34 09:37:02:setup_element:INFO: Eye window for uplink 28: _____________XXXXXX_____________________ Data delay found: 35 09:37:02:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________ Data delay found: 37 09:37:02:setup_element:INFO: Eye window for uplink 30: ________________XXXXX___________________ Data delay found: 38 09:37:02:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________ Data delay found: 38 09:37:02:setup_element:INFO: Setting the data phase to 20 for uplink 16 09:37:02:setup_element:INFO: Setting the data phase to 18 for uplink 17 09:37:02:setup_element:INFO: Setting the data phase to 18 for uplink 18 09:37:02:setup_element:INFO: Setting the data phase to 15 for uplink 19 09:37:02:setup_element:INFO: Setting the data phase to 16 for uplink 20 09:37:02:setup_element:INFO: Setting the data phase to 15 for uplink 21 09:37:02:setup_element:INFO: Setting the data phase to 18 for uplink 22 09:37:02:setup_element:INFO: Setting the data phase to 19 for uplink 23 09:37:02:setup_element:INFO: Setting the data phase to 29 for uplink 24 09:37:02:setup_element:INFO: Setting the data phase to 31 for uplink 25 09:37:02:setup_element:INFO: Setting the data phase to 31 for uplink 26 09:37:02:setup_element:INFO: Setting the data phase to 34 for uplink 27 09:37:02:setup_element:INFO: Setting the data phase to 35 for uplink 28 09:37:02:setup_element:INFO: Setting the data phase to 37 for uplink 29 09:37:02:setup_element:INFO: Setting the data phase to 38 for uplink 30 09:37:02:setup_element:INFO: Setting the data phase to 38 for uplink 31 09:37:02:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 31 Window Length: 70 Eye Windows: Uplink 16: ____________________________________________________________________XXXXXXXXX___ Uplink 17: ____________________________________________________________________XXXXXXXXX___ Uplink 18: _____________________________________________________________________XXXXXXX____ Uplink 19: _____________________________________________________________________XXXXXXX____ Uplink 20: ___________________________________________________________________XXXXXXXX_____ Uplink 21: ___________________________________________________________________XXXXXXXX_____ Uplink 22: ____________________________________________________________________XXXXXXXX____ Uplink 23: ____________________________________________________________________XXXXXXXX____ Uplink 24: ____________________________________________________________________XXXXXXX_____ Uplink 25: ____________________________________________________________________XXXXXXX_____ Uplink 26: ____________________________________________________________________XXXXXXXX____ Uplink 27: ____________________________________________________________________XXXXXXXX____ Uplink 28: _____________________________________________________________________XXXXXXX____ Uplink 29: _____________________________________________________________________XXXXXXX____ Uplink 30: _____________________________________________________________________XXXXXXXX___ Uplink 31: _____________________________________________________________________XXXXXXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 17: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 18: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 19: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 20: Optimal Phase: 16 Window Length: 34 Eye Window: __________________________________XXXXXX Uplink 21: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 22: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 23: Optimal Phase: 19 Window Length: 29 Eye Window: XXXXX_____________________________XXXXXX Uplink 24: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXXXX___________________________ Uplink 25: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 26: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 27: Optimal Phase: 34 Window Length: 34 Eye Window: ____________XXXXXX______________________ Uplink 28: Optimal Phase: 35 Window Length: 34 Eye Window: _____________XXXXXX_____________________ Uplink 29: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 30: Optimal Phase: 38 Window Length: 35 Eye Window: ________________XXXXX___________________ Uplink 31: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ ] 09:37:02:setup_element:INFO: Beginning SMX ASICs map scan 09:37:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:37:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:37:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:37:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:37:02:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:37:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 09:37:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 09:37:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:37:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:37:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 09:37:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 09:37:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:37:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:37:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 09:37:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 09:37:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:37:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:37:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 09:37:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 09:37:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:37:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:37:05:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 31 Window Length: 70 Eye Windows: Uplink 16: ____________________________________________________________________XXXXXXXXX___ Uplink 17: ____________________________________________________________________XXXXXXXXX___ Uplink 18: _____________________________________________________________________XXXXXXX____ Uplink 19: _____________________________________________________________________XXXXXXX____ Uplink 20: ___________________________________________________________________XXXXXXXX_____ Uplink 21: ___________________________________________________________________XXXXXXXX_____ Uplink 22: ____________________________________________________________________XXXXXXXX____ Uplink 23: ____________________________________________________________________XXXXXXXX____ Uplink 24: ____________________________________________________________________XXXXXXX_____ Uplink 25: ____________________________________________________________________XXXXXXX_____ Uplink 26: ____________________________________________________________________XXXXXXXX____ Uplink 27: ____________________________________________________________________XXXXXXXX____ Uplink 28: _____________________________________________________________________XXXXXXX____ Uplink 29: _____________________________________________________________________XXXXXXX____ Uplink 30: _____________________________________________________________________XXXXXXXX___ Uplink 31: _____________________________________________________________________XXXXXXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 17: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 18: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 19: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 20: Optimal Phase: 16 Window Length: 34 Eye Window: __________________________________XXXXXX Uplink 21: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 22: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 23: Optimal Phase: 19 Window Length: 29 Eye Window: XXXXX_____________________________XXXXXX Uplink 24: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXXXX___________________________ Uplink 25: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 26: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 27: Optimal Phase: 34 Window Length: 34 Eye Window: ____________XXXXXX______________________ Uplink 28: Optimal Phase: 35 Window Length: 34 Eye Window: _____________XXXXXX_____________________ Uplink 29: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 30: Optimal Phase: 38 Window Length: 35 Eye Window: ________________XXXXX___________________ Uplink 31: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ 09:37:05:setup_element:INFO: Performing Elink synchronization 09:37:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:37:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:37:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:37:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:37:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:37:05:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:37:05:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_21 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_2__upli_21 FEB type: B FEB_A: 0 FEB_B: 1 09:37:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:37:07:febtest:INFO: 23-00 | XA-000-08-002-000-000-010-14 | 40.9 | 1189.2 09:37:07:febtest:INFO: 30-01 | XA-000-08-002-000-005-142-15 | 21.9 | 1236.2 09:37:07:febtest:INFO: 21-02 | XA-000-08-002-000-000-017-09 | 53.6 | 1141.9 09:37:08:febtest:INFO: 28-03 | XA-000-08-002-000-005-141-15 | 18.7 | 1242.0 09:37:08:febtest:INFO: 19-04 | XA-000-08-002-000-000-012-14 | 34.6 | 1206.9 09:37:08:febtest:INFO: 26-05 | XA-000-08-002-000-005-140-15 | 47.3 | 1153.7 09:37:08:febtest:INFO: 17-06 | XA-000-08-002-000-000-014-14 | 40.9 | 1195.1 09:37:08:febtest:INFO: 24-07 | XA-000-08-002-000-005-138-15 | 37.7 | 1177.4 09:37:08:ST3_smx:INFO: Configuring SMX FAST 09:37:10:ST3_smx:INFO: chip: 23-0 50.430383 C 1147.806000 mV 09:37:10:ST3_smx:INFO: Electrons 09:37:10:ST3_smx:INFO: # loops 0 09:37:12:ST3_smx:INFO: # loops 1 09:37:14:ST3_smx:INFO: # loops 2 09:37:15:ST3_smx:INFO: Total # of broken channels: 0 09:37:15:ST3_smx:INFO: List of broken channels: [] 09:37:15:ST3_smx:INFO: Total # of broken channels: 0 09:37:15:ST3_smx:INFO: List of broken channels: [] 09:37:16:ST3_smx:INFO: Configuring SMX FAST 09:37:18:ST3_smx:INFO: chip: 30-1 28.225000 C 1212.728715 mV 09:37:18:ST3_smx:INFO: Electrons 09:37:18:ST3_smx:INFO: # loops 0 09:37:20:ST3_smx:INFO: # loops 1 09:37:22:ST3_smx:INFO: # loops 2 09:37:23:ST3_smx:INFO: Total # of broken channels: 0 09:37:23:ST3_smx:INFO: List of broken channels: [] 09:37:23:ST3_smx:INFO: Total # of broken channels: 0 09:37:23:ST3_smx:INFO: List of broken channels: [] 09:37:24:ST3_smx:INFO: Configuring SMX FAST 09:37:26:ST3_smx:INFO: chip: 21-2 53.612520 C 1147.806000 mV 09:37:26:ST3_smx:INFO: Electrons 09:37:26:ST3_smx:INFO: # loops 0 09:37:28:ST3_smx:INFO: # loops 1 09:37:30:ST3_smx:INFO: # loops 2 09:37:31:ST3_smx:INFO: Total # of broken channels: 0 09:37:31:ST3_smx:INFO: List of broken channels: [] 09:37:31:ST3_smx:INFO: Total # of broken channels: 0 09:37:31:ST3_smx:INFO: List of broken channels: [] 09:37:32:ST3_smx:INFO: Configuring SMX FAST 09:37:34:ST3_smx:INFO: chip: 28-3 25.062742 C 1218.600960 mV 09:37:34:ST3_smx:INFO: Electrons 09:37:34:ST3_smx:INFO: # loops 0 09:37:36:ST3_smx:INFO: # loops 1 09:37:38:ST3_smx:INFO: # loops 2 09:37:39:ST3_smx:INFO: Total # of broken channels: 0 09:37:39:ST3_smx:INFO: List of broken channels: [] 09:37:39:ST3_smx:INFO: Total # of broken channels: 0 09:37:39:ST3_smx:INFO: List of broken channels: [] 09:37:40:ST3_smx:INFO: Configuring SMX FAST 09:37:42:ST3_smx:INFO: chip: 19-4 44.073563 C 1165.571835 mV 09:37:42:ST3_smx:INFO: Electrons 09:37:42:ST3_smx:INFO: # loops 0 09:37:44:ST3_smx:INFO: # loops 1 09:37:46:ST3_smx:INFO: # loops 2 09:37:47:ST3_smx:INFO: Total # of broken channels: 0 09:37:47:ST3_smx:INFO: List of broken channels: [] 09:37:47:ST3_smx:INFO: Total # of broken channels: 0 09:37:47:ST3_smx:INFO: List of broken channels: [] 09:37:48:ST3_smx:INFO: Configuring SMX FAST 09:37:50:ST3_smx:INFO: chip: 26-5 47.250730 C 1159.654860 mV 09:37:50:ST3_smx:INFO: Electrons 09:37:50:ST3_smx:INFO: # loops 0 09:37:52:ST3_smx:INFO: # loops 1 09:37:54:ST3_smx:INFO: # loops 2 09:37:55:ST3_smx:INFO: Total # of broken channels: 0 09:37:55:ST3_smx:INFO: List of broken channels: [] 09:37:55:ST3_smx:INFO: Total # of broken channels: 0 09:37:55:ST3_smx:INFO: List of broken channels: [] 09:37:56:ST3_smx:INFO: Configuring SMX FAST 09:37:58:ST3_smx:INFO: chip: 17-6 40.898880 C 1200.969315 mV 09:37:58:ST3_smx:INFO: Electrons 09:37:58:ST3_smx:INFO: # loops 0 09:38:00:ST3_smx:INFO: # loops 1 09:38:01:ST3_smx:INFO: # loops 2 09:38:03:ST3_smx:INFO: Total # of broken channels: 0 09:38:03:ST3_smx:INFO: List of broken channels: [] 09:38:03:ST3_smx:INFO: Total # of broken channels: 0 09:38:03:ST3_smx:INFO: List of broken channels: [] 09:38:04:ST3_smx:INFO: Configuring SMX FAST 09:38:06:ST3_smx:INFO: chip: 24-7 40.898880 C 1177.390875 mV 09:38:06:ST3_smx:INFO: Electrons 09:38:06:ST3_smx:INFO: # loops 0 09:38:08:ST3_smx:INFO: # loops 1 09:38:09:ST3_smx:INFO: # loops 2 09:38:11:ST3_smx:INFO: Total # of broken channels: 0 09:38:11:ST3_smx:INFO: List of broken channels: [] 09:38:11:ST3_smx:INFO: Total # of broken channels: 0 09:38:11:ST3_smx:INFO: List of broken channels: [] 09:38:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:38:12:febtest:INFO: 23-00 | XA-000-08-002-000-000-010-14 | 50.4 | 1147.8 09:38:12:febtest:INFO: 30-01 | XA-000-08-002-000-005-142-15 | 28.2 | 1212.7 09:38:12:febtest:INFO: 21-02 | XA-000-08-002-000-000-017-09 | 53.6 | 1147.8 09:38:13:febtest:INFO: 28-03 | XA-000-08-002-000-005-141-15 | 28.2 | 1218.6 09:38:13:febtest:INFO: 19-04 | XA-000-08-002-000-000-012-14 | 44.1 | 1165.6 09:38:13:febtest:INFO: 26-05 | XA-000-08-002-000-005-140-15 | 44.1 | 1153.7 09:38:13:febtest:INFO: 17-06 | XA-000-08-002-000-000-014-14 | 40.9 | 1201.0 09:38:14:febtest:INFO: 24-07 | XA-000-08-002-000-005-138-15 | 40.9 | 1183.3 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_03_14-09_36_53 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L5DL100116 M5DL1T0001160A2 42 A FEB_SN : 2109 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 0 FEB_B : 1 --------------------------------------- --------------------------------------- VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.8770', '1.852', '2.4270'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9980', '1.850', '0.3219'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9940', '1.850', '0.3218']