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FEB_2111 14.02.24 09:01:05
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09:00:58:febtest:INFO: FEB type: 8.2
09:00:58:febtest:INFO: FEB SN: 2111
09:00:58:febtest:INFO: FEB A: 0
09:00:58:febtest:INFO: FEB B: 1
09:01:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:01:05:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
09:01:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:01:05:febtest:INFO: Testing FEB with SN 2111
09:01:08:smx_tester:INFO: Scanning setup
09:01:08:elinks:INFO: Disabling clock on downlink 0
09:01:08:elinks:INFO: Disabling clock on downlink 1
09:01:08:elinks:INFO: Disabling clock on downlink 2
09:01:08:elinks:INFO: Disabling clock on downlink 3
09:01:08:elinks:INFO: Disabling clock on downlink 4
09:01:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:01:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:08:elinks:INFO: Disabling clock on downlink 0
09:01:08:elinks:INFO: Disabling clock on downlink 1
09:01:08:elinks:INFO: Disabling clock on downlink 2
09:01:08:elinks:INFO: Disabling clock on downlink 3
09:01:08:elinks:INFO: Disabling clock on downlink 4
09:01:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:01:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:08:elinks:INFO: Disabling clock on downlink 0
09:01:08:elinks:INFO: Disabling clock on downlink 1
09:01:08:elinks:INFO: Disabling clock on downlink 2
09:01:08:elinks:INFO: Disabling clock on downlink 3
09:01:08:elinks:INFO: Disabling clock on downlink 4
09:01:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:01:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:01:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:01:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:01:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:01:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:01:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:01:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:01:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:01:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:08:elinks:INFO: Disabling clock on downlink 0
09:01:08:elinks:INFO: Disabling clock on downlink 1
09:01:08:elinks:INFO: Disabling clock on downlink 2
09:01:08:elinks:INFO: Disabling clock on downlink 3
09:01:08:elinks:INFO: Disabling clock on downlink 4
09:01:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:01:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:09:elinks:INFO: Disabling clock on downlink 0
09:01:09:elinks:INFO: Disabling clock on downlink 1
09:01:09:elinks:INFO: Disabling clock on downlink 2
09:01:09:elinks:INFO: Disabling clock on downlink 3
09:01:09:elinks:INFO: Disabling clock on downlink 4
09:01:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:01:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:09:setup_element:INFO: Scanning clock phase
09:01:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:01:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:09:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:01:09:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:01:09:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:01:09:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:01:09:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:01:09:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:01:09:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:01:09:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:01:09:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:01:09:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
09:01:09:setup_element:INFO: Scanning data phases
09:01:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:01:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:14:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:01:14:setup_element:INFO: Eye window for uplink 24: _____XXXXXXX____________________________
Data delay found: 28
09:01:14:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________
Data delay found: 31
09:01:14:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
09:01:14:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
09:01:14:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
09:01:14:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
09:01:14:setup_element:INFO: Eye window for uplink 30: ______________XXXXX_____________________
Data delay found: 36
09:01:14:setup_element:INFO: Eye window for uplink 31: _____________XXXX_______________________
Data delay found: 34
09:01:14:setup_element:INFO: Setting the data phase to 28 for uplink 24
09:01:14:setup_element:INFO: Setting the data phase to 31 for uplink 25
09:01:14:setup_element:INFO: Setting the data phase to 29 for uplink 26
09:01:14:setup_element:INFO: Setting the data phase to 32 for uplink 27
09:01:14:setup_element:INFO: Setting the data phase to 35 for uplink 28
09:01:14:setup_element:INFO: Setting the data phase to 36 for uplink 29
09:01:14:setup_element:INFO: Setting the data phase to 36 for uplink 30
09:01:14:setup_element:INFO: Setting the data phase to 34 for uplink 31
09:01:14:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: ______________________________________________________________________XXXXXXX___
Uplink 27: ______________________________________________________________________XXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXX___
Uplink 29: ______________________________________________________________________XXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 33
Eye Window: _____XXXXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 31:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
]
09:01:14:setup_element:INFO: Beginning SMX ASICs map scan
09:01:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:01:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:01:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:01:14:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:01:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:01:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:01:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:01:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:01:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:01:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:01:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:01:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:01:17:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: ______________________________________________________________________XXXXXXX___
Uplink 27: ______________________________________________________________________XXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXX___
Uplink 29: ______________________________________________________________________XXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 33
Eye Window: _____XXXXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 31:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
09:01:17:setup_element:INFO: Performing Elink synchronization
09:01:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:01:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:01:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:01:17:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:01:17:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
09:01:17:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
FEB type: B FEB_A: 0 FEB_B: 1
09:01:18:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:01:18:febtest:INFO: 30-1 | XA-000-08-002-001-006-137-09 | 63.2 | 1100.2
09:01:19:febtest:INFO: 28-3 | XA-000-08-002-001-006-136-09 | 53.6 | 1135.9
09:01:19:febtest:INFO: 26-5 | XA-000-08-002-001-006-126-15 | 37.7 | 1195.1
09:01:19:febtest:INFO: 24-7 | XA-000-08-002-001-006-121-15 | 47.3 | 1147.8
09:01:19:ST3_smx:INFO: Configuring SMX FAST
09:01:21:ST3_smx:INFO: chip: 30-1 53.612520 C 1129.995435 mV
09:01:21:ST3_smx:INFO: Electrons
09:01:21:ST3_smx:INFO: # loops 0
09:01:23:ST3_smx:INFO: # loops 1
09:01:24:ST3_smx:INFO: # loops 2
09:01:26:ST3_smx:INFO: # loops 3
09:01:27:ST3_smx:INFO: # loops 4
09:01:29:ST3_smx:INFO: Total # of broken channels: 0
09:01:29:ST3_smx:INFO: List of broken channels: []
09:01:29:ST3_smx:INFO: Total # of broken channels: 0
09:01:29:ST3_smx:INFO: List of broken channels: []
09:01:30:ST3_smx:INFO: Configuring SMX FAST
09:01:32:ST3_smx:INFO: chip: 28-3 50.430383 C 1141.874115 mV
09:01:32:ST3_smx:INFO: Electrons
09:01:32:ST3_smx:INFO: # loops 0
09:01:34:ST3_smx:INFO: # loops 1
09:01:35:ST3_smx:INFO: # loops 2
09:01:37:ST3_smx:INFO: # loops 3
09:01:38:ST3_smx:INFO: # loops 4
09:01:40:ST3_smx:INFO: Total # of broken channels: 0
09:01:40:ST3_smx:INFO: List of broken channels: []
09:01:40:ST3_smx:INFO: Total # of broken channels: 0
09:01:40:ST3_smx:INFO: List of broken channels: []
09:01:41:ST3_smx:INFO: Configuring SMX FAST
09:01:43:ST3_smx:INFO: chip: 26-5 40.898880 C 1177.390875 mV
09:01:43:ST3_smx:INFO: Electrons
09:01:43:ST3_smx:INFO: # loops 0
09:01:44:ST3_smx:INFO: # loops 1
09:01:46:ST3_smx:INFO: # loops 2
09:01:48:ST3_smx:INFO: # loops 3
09:01:49:ST3_smx:INFO: # loops 4
09:01:51:ST3_smx:INFO: Total # of broken channels: 0
09:01:51:ST3_smx:INFO: List of broken channels: []
09:01:51:ST3_smx:INFO: Total # of broken channels: 0
09:01:51:ST3_smx:INFO: List of broken channels: []
09:01:52:ST3_smx:INFO: Configuring SMX FAST
09:01:54:ST3_smx:INFO: chip: 24-7 47.250730 C 1147.806000 mV
09:01:54:ST3_smx:INFO: Electrons
09:01:54:ST3_smx:INFO: # loops 0
09:01:55:ST3_smx:INFO: # loops 1
09:01:57:ST3_smx:INFO: # loops 2
09:01:58:ST3_smx:INFO: # loops 3
09:02:00:ST3_smx:INFO: # loops 4
09:02:01:ST3_smx:INFO: Total # of broken channels: 0
09:02:01:ST3_smx:INFO: List of broken channels: []
09:02:01:ST3_smx:INFO: Total # of broken channels: 1
09:02:01:ST3_smx:INFO: List of broken channels: [1]
09:02:02:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:02:03:febtest:INFO: 30-1 | XA-000-08-002-001-006-137-09 | 56.8 | 1130.0
09:02:03:febtest:INFO: 28-3 | XA-000-08-002-001-006-136-09 | 53.6 | 1135.9
09:02:03:febtest:INFO: 26-5 | XA-000-08-002-001-006-126-15 | 40.9 | 1171.5
09:02:03:febtest:INFO: 24-7 | XA-000-08-002-001-006-121-15 | 47.3 | 1147.8
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_14-09_01_05
OPERATOR : Kerstin S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L6DL600127 M6DL6T0001270A2 124 C
FEB_SN : 2111
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.0003', '1.850', '0.0000', '2.450', '1.0370', '1.850', '1.3180']
VI_after__Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9920', '1.850', '0.3258']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:02:11:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2111/TestDate_2024_02_14-09_01_05/