13:53:25:ST3_hmp4040:INFO:	ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
13:53:25:febtest:INFO:	FEB type: 8.2
13:53:25:febtest:INFO:	FEB SN: 2115
13:53:26:febtest:INFO:	FEB 8-2 selected
13:53:26:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
13:53:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:53:29:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
13:53:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:53:30:febtest:INFO:	Testing FEB with SN 2115
13:53:32:smx_tester:INFO:	Scanning setup
13:53:32:elinks:INFO:	Disabling clock on downlink 0
13:53:32:elinks:INFO:	Disabling clock on downlink 1
13:53:32:elinks:INFO:	Disabling clock on downlink 2
13:53:32:elinks:INFO:	Disabling clock on downlink 3
13:53:32:elinks:INFO:	Disabling clock on downlink 4
13:53:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:53:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:53:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:53:32:elinks:INFO:	Disabling clock on downlink 0
13:53:32:elinks:INFO:	Disabling clock on downlink 1
13:53:32:elinks:INFO:	Disabling clock on downlink 2
13:53:32:elinks:INFO:	Disabling clock on downlink 3
13:53:32:elinks:INFO:	Disabling clock on downlink 4
13:53:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:53:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:53:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:53:32:elinks:INFO:	Disabling clock on downlink 0
13:53:33:elinks:INFO:	Disabling clock on downlink 1
13:53:33:elinks:INFO:	Disabling clock on downlink 2
13:53:33:elinks:INFO:	Disabling clock on downlink 3
13:53:33:elinks:INFO:	Disabling clock on downlink 4
13:53:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:53:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:53:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:53:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:53:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:53:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:53:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:53:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:53:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:53:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:53:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:53:33:elinks:INFO:	Disabling clock on downlink 0
13:53:33:elinks:INFO:	Disabling clock on downlink 1
13:53:33:elinks:INFO:	Disabling clock on downlink 2
13:53:33:elinks:INFO:	Disabling clock on downlink 3
13:53:33:elinks:INFO:	Disabling clock on downlink 4
13:53:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:53:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:53:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:53:33:elinks:INFO:	Disabling clock on downlink 0
13:53:33:elinks:INFO:	Disabling clock on downlink 1
13:53:33:elinks:INFO:	Disabling clock on downlink 2
13:53:33:elinks:INFO:	Disabling clock on downlink 3
13:53:33:elinks:INFO:	Disabling clock on downlink 4
13:53:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:53:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:53:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:53:33:setup_element:INFO:	Scanning clock phase
13:53:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:53:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:53:33:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:53:33:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:53:33:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:53:33:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:53:33:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:53:33:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:53:33:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:53:33:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:53:33:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:53:33:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
13:53:33:setup_element:INFO:	Scanning data phases
13:53:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:53:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:53:39:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:53:39:setup_element:INFO:	Eye window for uplink 24: ____XXXXXX______________________________
Data delay found: 26
13:53:39:setup_element:INFO:	Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
13:53:39:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
13:53:39:setup_element:INFO:	Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
13:53:39:setup_element:INFO:	Eye window for uplink 28: _________XXXXXX_________________________
Data delay found: 31
13:53:39:setup_element:INFO:	Eye window for uplink 29: ___________XXXXX________________________
Data delay found: 33
13:53:39:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
13:53:39:setup_element:INFO:	Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
13:53:39:setup_element:INFO:	Setting the data phase to 26 for uplink 24
13:53:39:setup_element:INFO:	Setting the data phase to 29 for uplink 25
13:53:39:setup_element:INFO:	Setting the data phase to 30 for uplink 26
13:53:39:setup_element:INFO:	Setting the data phase to 33 for uplink 27
13:53:39:setup_element:INFO:	Setting the data phase to 31 for uplink 28
13:53:39:setup_element:INFO:	Setting the data phase to 33 for uplink 29
13:53:39:setup_element:INFO:	Setting the data phase to 37 for uplink 30
13:53:39:setup_element:INFO:	Setting the data phase to 35 for uplink 31
13:53:39:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 71
    Eye Windows:
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: ______________________________________________________________________XXXXXXXX__
      Uplink 27: ______________________________________________________________________XXXXXXXX__
      Uplink 28: ______________________________________________________________________XXXXXXX___
      Uplink 29: ______________________________________________________________________XXXXXXX___
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
]
13:53:39:setup_element:INFO:	Beginning SMX ASICs map scan
13:53:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:53:39:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:53:39:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:53:39:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:53:39:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:53:39:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:53:39:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:53:39:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:53:39:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:53:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:53:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:53:40:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:53:40:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:53:41:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 71
    Eye Windows:
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: ______________________________________________________________________XXXXXXXX__
      Uplink 27: ______________________________________________________________________XXXXXXXX__
      Uplink 28: ______________________________________________________________________XXXXXXX___
      Uplink 29: ______________________________________________________________________XXXXXXX___
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________

13:53:41:setup_element:INFO:	Performing Elink synchronization
13:53:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:53:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:53:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:53:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:53:41:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:53:41:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
13:53:42:ST3_emu:INFO:	Number of chips: 4
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
13:53:43:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:53:43:febtest:INFO:	30-01 | XA-000-08-002-000-002-158-00 |  18.7 | 1253.7
13:53:43:febtest:INFO:	28-03 | XA-000-08-002-000-002-157-00 |  47.3 | 1159.7
13:53:44:febtest:INFO:	26-05 | XA-000-08-002-000-003-079-05 |  28.2 | 1224.5
13:53:44:febtest:INFO:	24-07 | XA-000-08-002-000-004-203-07 |  34.6 | 1195.1
13:53:44:ST3_smx:INFO:	Configuring SMX FAST
13:53:46:ST3_smx:INFO:	chip: 30-1 	 15.590880 C 	 1271.227515 mV
13:53:46:ST3_smx:INFO:		Electrons
13:53:46:ST3_smx:INFO:	# loops 0
13:53:48:ST3_smx:INFO:	# loops 1
13:53:50:ST3_smx:INFO:	# loops 2
13:53:52:ST3_smx:INFO:	Total # of broken channels: 0
13:53:52:ST3_smx:INFO:	List of broken channels: []
13:53:52:ST3_smx:INFO:	Total # of broken channels: 0
13:53:52:ST3_smx:INFO:	List of broken channels: []
13:53:53:ST3_smx:INFO:	Configuring SMX FAST
13:53:55:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1177.390875 mV
13:53:55:ST3_smx:INFO:		Electrons
13:53:55:ST3_smx:INFO:	# loops 0
13:53:57:ST3_smx:INFO:	# loops 1
13:53:58:ST3_smx:INFO:	# loops 2
13:54:00:ST3_smx:INFO:	Total # of broken channels: 0
13:54:00:ST3_smx:INFO:	List of broken channels: []
13:54:00:ST3_smx:INFO:	Total # of broken channels: 0
13:54:00:ST3_smx:INFO:	List of broken channels: []
13:54:01:ST3_smx:INFO:	Configuring SMX FAST
13:54:03:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1212.728715 mV
13:54:03:ST3_smx:INFO:		Electrons
13:54:03:ST3_smx:INFO:	# loops 0
13:54:04:ST3_smx:INFO:	# loops 1
13:54:06:ST3_smx:INFO:	# loops 2
13:54:08:ST3_smx:INFO:	Total # of broken channels: 0
13:54:08:ST3_smx:INFO:	List of broken channels: []
13:54:08:ST3_smx:INFO:	Total # of broken channels: 0
13:54:08:ST3_smx:INFO:	List of broken channels: []
13:54:08:ST3_smx:INFO:	Configuring SMX FAST
13:54:10:ST3_smx:INFO:	chip: 24-7 	 40.898880 C 	 1171.483840 mV
13:54:10:ST3_smx:INFO:		Electrons
13:54:10:ST3_smx:INFO:	# loops 0
13:54:12:ST3_smx:INFO:	# loops 1
13:54:14:ST3_smx:INFO:	# loops 2
13:54:15:ST3_smx:INFO:	Total # of broken channels: 0
13:54:15:ST3_smx:INFO:	List of broken channels: []
13:54:15:ST3_smx:INFO:	Total # of broken channels: 0
13:54:15:ST3_smx:INFO:	List of broken channels: []
13:54:16:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:54:16:febtest:INFO:	30-01 | XA-000-08-002-000-002-158-00 |  18.7 | 1271.2
13:54:17:febtest:INFO:	28-03 | XA-000-08-002-000-002-157-00 |  40.9 | 1177.4
13:54:17:febtest:INFO:	26-05 | XA-000-08-002-000-003-079-05 |  31.4 | 1212.7
13:54:17:febtest:INFO:	24-07 | XA-000-08-002-000-004-203-07 |  44.1 | 1171.5
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_02_23-13_53_29
OPERATOR  : Alois Alzheimer
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 2115
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9732', '1.850', '1.1370']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:54:31:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
13:54:33:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; Irakli K.;