FEB_2119    15.03.24 10:05:58

TextEdit.txt
            10:05:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:05:58:ST3_Shared:INFO:	                       FEB-Microcable                       
10:05:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:05:58:febtest:INFO:	Testing FEB with SN 2119
10:06:01:smx_tester:INFO:	Scanning setup
10:06:01:elinks:INFO:	Disabling clock on downlink 0
10:06:01:elinks:INFO:	Disabling clock on downlink 1
10:06:01:elinks:INFO:	Disabling clock on downlink 2
10:06:01:elinks:INFO:	Disabling clock on downlink 3
10:06:01:elinks:INFO:	Disabling clock on downlink 4
10:06:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:06:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:06:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:06:01:elinks:INFO:	Disabling clock on downlink 0
10:06:01:elinks:INFO:	Disabling clock on downlink 1
10:06:01:elinks:INFO:	Disabling clock on downlink 2
10:06:01:elinks:INFO:	Disabling clock on downlink 3
10:06:01:elinks:INFO:	Disabling clock on downlink 4
10:06:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:06:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:06:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:06:01:elinks:INFO:	Disabling clock on downlink 0
10:06:01:elinks:INFO:	Disabling clock on downlink 1
10:06:01:elinks:INFO:	Disabling clock on downlink 2
10:06:01:elinks:INFO:	Disabling clock on downlink 3
10:06:01:elinks:INFO:	Disabling clock on downlink 4
10:06:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:06:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:06:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:06:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:06:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:06:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:06:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:06:02:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:06:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:06:02:elinks:INFO:	Disabling clock on downlink 0
10:06:02:elinks:INFO:	Disabling clock on downlink 1
10:06:02:elinks:INFO:	Disabling clock on downlink 2
10:06:02:elinks:INFO:	Disabling clock on downlink 3
10:06:02:elinks:INFO:	Disabling clock on downlink 4
10:06:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:06:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:06:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:06:02:elinks:INFO:	Disabling clock on downlink 0
10:06:02:elinks:INFO:	Disabling clock on downlink 1
10:06:02:elinks:INFO:	Disabling clock on downlink 2
10:06:02:elinks:INFO:	Disabling clock on downlink 3
10:06:02:elinks:INFO:	Disabling clock on downlink 4
10:06:02:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:06:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:06:02:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:06:02:setup_element:INFO:	Scanning clock phase
10:06:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:06:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:06:02:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:06:02:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:06:02:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:06:02:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:06:02:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:06:02:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:06:02:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:06:02:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
10:06:02:setup_element:INFO:	Scanning data phases
10:06:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:06:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:06:08:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:06:08:setup_element:INFO:	Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
10:06:08:setup_element:INFO:	Eye window for uplink 25: __________XXXXXX________________________
Data delay found: 32
10:06:08:setup_element:INFO:	Eye window for uplink 26: _________XXXXXX_________________________
Data delay found: 31
10:06:08:setup_element:INFO:	Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
10:06:08:setup_element:INFO:	Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
10:06:08:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
10:06:08:setup_element:INFO:	Setting the data phase to 30 for uplink 24
10:06:08:setup_element:INFO:	Setting the data phase to 32 for uplink 25
10:06:08:setup_element:INFO:	Setting the data phase to 31 for uplink 26
10:06:08:setup_element:INFO:	Setting the data phase to 35 for uplink 27
10:06:08:setup_element:INFO:	Setting the data phase to 39 for uplink 30
10:06:08:setup_element:INFO:	Setting the data phase to 39 for uplink 31
10:06:08:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 72
    Eye Windows:
      Uplink 24: ____________________________________________________________________XXXXXXXX____
      Uplink 25: ____________________________________________________________________XXXXXXXX____
      Uplink 26: ____________________________________________________________________XXXXXXXX____
      Uplink 27: ____________________________________________________________________XXXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXXX____
      Uplink 31: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 27:
      Optimal Phase: 35
      Window Length: 33
      Eye Window: ____________XXXXXXX_____________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________
]
10:06:08:setup_element:INFO:	Beginning SMX ASICs map scan
10:06:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:06:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:06:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:06:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:06:08:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 30, 31]
10:06:08:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:06:08:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:06:09:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:06:09:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:06:09:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:06:09:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:06:10:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 72
    Eye Windows:
      Uplink 24: ____________________________________________________________________XXXXXXXX____
      Uplink 25: ____________________________________________________________________XXXXXXXX____
      Uplink 26: ____________________________________________________________________XXXXXXXX____
      Uplink 27: ____________________________________________________________________XXXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXXX____
      Uplink 31: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 27:
      Optimal Phase: 35
      Window Length: 33
      Eye Window: ____________XXXXXXX_____________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________

10:06:10:setup_element:INFO:	Performing Elink synchronization
10:06:11:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:06:11:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:06:11:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:06:11:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:06:11:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:06:11:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 30, 31]
10:06:11:ST3_emu:INFO:	Number of chips: 3
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
10:06:11:febtest:ERROR:	HW addres 1 != 0
10:06:16:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:06:17:febtest:INFO:	30-01 | XA-000-08-002-001-007-055-07 |  34.6 | 1171.5
10:06:17:febtest:INFO:	26-05 | XA-000-08-002-001-007-049-07 |  34.6 | 1183.3
10:06:17:febtest:INFO:	24-07 | XA-000-08-002-001-007-056-07 |   9.3 | 1265.4
10:06:17:ST3_smx:INFO:	Configuring SMX FAST
10:06:19:ST3_smx:INFO:	chip: 30-1 	 40.898880 C 	 1153.732915 mV
10:06:19:ST3_smx:INFO:		Electrons
10:06:19:ST3_smx:INFO:	# loops 0
10:06:21:ST3_smx:INFO:	# loops 1
10:06:22:ST3_smx:INFO:	# loops 2
10:06:24:ST3_smx:INFO:	Total # of broken channels: 0
10:06:24:ST3_smx:INFO:	List of broken channels: []
10:06:24:ST3_smx:INFO:	Total # of broken channels: 1
10:06:24:ST3_smx:INFO:	List of broken channels: [3]
10:06:25:ST3_smx:INFO:	Configuring SMX FAST
10:06:27:ST3_smx:INFO:	chip: 26-5 	 37.726682 C 	 1165.571835 mV
10:06:27:ST3_smx:INFO:		Electrons
10:06:27:ST3_smx:INFO:	# loops 0
10:06:28:ST3_smx:INFO:	# loops 1
10:06:30:ST3_smx:INFO:	# loops 2
10:06:31:ST3_smx:INFO:	Total # of broken channels: 0
10:06:31:ST3_smx:INFO:	List of broken channels: []
10:06:31:ST3_smx:INFO:	Total # of broken channels: 0
10:06:31:ST3_smx:INFO:	List of broken channels: []
10:06:32:ST3_smx:INFO:	Configuring SMX FAST
10:06:34:ST3_smx:INFO:	chip: 24-7 	 18.745682 C 	 1242.040240 mV
10:06:34:ST3_smx:INFO:		Electrons
10:06:34:ST3_smx:INFO:	# loops 0
10:06:36:ST3_smx:INFO:	# loops 1
10:06:38:ST3_smx:INFO:	# loops 2
10:06:39:ST3_smx:INFO:	Total # of broken channels: 0
10:06:39:ST3_smx:INFO:	List of broken channels: []
10:06:39:ST3_smx:INFO:	Total # of broken channels: 0
10:06:39:ST3_smx:INFO:	List of broken channels: []
10:06:40:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:06:40:febtest:INFO:	30-01 | XA-000-08-002-001-007-055-07 |  40.9 | 1153.7
10:06:41:febtest:INFO:	26-05 | XA-000-08-002-001-007-049-07 |  40.9 | 1165.6
10:06:41:febtest:INFO:	24-07 | XA-000-08-002-001-007-056-07 |  18.7 | 1236.2
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_03_15-10_05_58
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L5DL100116 M5DL1T0001160A2 42 A

FEB_SN : 2119
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.6737', '1.852', '1.2370']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9391', '1.850', '0.5092']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9379', '1.850', '0.4580']