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FEB_2119 15.03.24 10:14:05
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10:14:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:14:05:ST3_Shared:INFO: FEB-Microcable
10:14:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:14:06:febtest:INFO: Testing FEB with SN 2119
10:14:08:smx_tester:INFO: Scanning setup
10:14:08:elinks:INFO: Disabling clock on downlink 0
10:14:08:elinks:INFO: Disabling clock on downlink 1
10:14:08:elinks:INFO: Disabling clock on downlink 2
10:14:08:elinks:INFO: Disabling clock on downlink 3
10:14:08:elinks:INFO: Disabling clock on downlink 4
10:14:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:14:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:09:elinks:INFO: Disabling clock on downlink 0
10:14:09:elinks:INFO: Disabling clock on downlink 1
10:14:09:elinks:INFO: Disabling clock on downlink 2
10:14:09:elinks:INFO: Disabling clock on downlink 3
10:14:09:elinks:INFO: Disabling clock on downlink 4
10:14:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:14:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:09:elinks:INFO: Disabling clock on downlink 0
10:14:09:elinks:INFO: Disabling clock on downlink 1
10:14:09:elinks:INFO: Disabling clock on downlink 2
10:14:09:elinks:INFO: Disabling clock on downlink 3
10:14:09:elinks:INFO: Disabling clock on downlink 4
10:14:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:14:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:14:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:09:elinks:INFO: Disabling clock on downlink 0
10:14:09:elinks:INFO: Disabling clock on downlink 1
10:14:09:elinks:INFO: Disabling clock on downlink 2
10:14:09:elinks:INFO: Disabling clock on downlink 3
10:14:09:elinks:INFO: Disabling clock on downlink 4
10:14:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:14:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:09:elinks:INFO: Disabling clock on downlink 0
10:14:09:elinks:INFO: Disabling clock on downlink 1
10:14:09:elinks:INFO: Disabling clock on downlink 2
10:14:09:elinks:INFO: Disabling clock on downlink 3
10:14:09:elinks:INFO: Disabling clock on downlink 4
10:14:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:14:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:09:setup_element:INFO: Scanning clock phase
10:14:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:14:10:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:14:10:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:14:10:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:14:10:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:14:10:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:14:10:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:14:10:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:14:10:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
10:14:10:setup_element:INFO: Scanning data phases
10:14:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:14:15:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:14:15:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
10:14:15:setup_element:INFO: Eye window for uplink 25: __________XXXXXX________________________
Data delay found: 32
10:14:15:setup_element:INFO: Eye window for uplink 26: _________XXXXXX_________________________
Data delay found: 31
10:14:15:setup_element:INFO: Eye window for uplink 27: ____________XXXXXX______________________
Data delay found: 34
10:14:15:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
10:14:15:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXXX________________
Data delay found: 39
10:14:15:setup_element:INFO: Setting the data phase to 30 for uplink 24
10:14:15:setup_element:INFO: Setting the data phase to 32 for uplink 25
10:14:15:setup_element:INFO: Setting the data phase to 31 for uplink 26
10:14:15:setup_element:INFO: Setting the data phase to 34 for uplink 27
10:14:15:setup_element:INFO: Setting the data phase to 39 for uplink 30
10:14:15:setup_element:INFO: Setting the data phase to 39 for uplink 31
10:14:15:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 72
Eye Windows:
Uplink 24: ____________________________________________________________________XXXXXXXX____
Uplink 25: ____________________________________________________________________XXXXXXXX____
Uplink 26: ____________________________________________________________________XXXXXXXX____
Uplink 27: ____________________________________________________________________XXXXXXXX____
Uplink 30: _____________________________________________________________________XXXXXXX____
Uplink 31: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 25:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 26:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 27:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 30:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 31:
Optimal Phase: 39
Window Length: 32
Eye Window: ________________XXXXXXXX________________
]
10:14:15:setup_element:INFO: Beginning SMX ASICs map scan
10:14:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:14:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:14:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:14:15:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 30, 31]
10:14:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:14:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:14:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:14:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:14:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:14:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:14:17:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 72
Eye Windows:
Uplink 24: ____________________________________________________________________XXXXXXXX____
Uplink 25: ____________________________________________________________________XXXXXXXX____
Uplink 26: ____________________________________________________________________XXXXXXXX____
Uplink 27: ____________________________________________________________________XXXXXXXX____
Uplink 30: _____________________________________________________________________XXXXXXX____
Uplink 31: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 25:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 26:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 27:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 30:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 31:
Optimal Phase: 39
Window Length: 32
Eye Window: ________________XXXXXXXX________________
10:14:17:setup_element:INFO: Performing Elink synchronization
10:14:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:14:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:14:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:14:18:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:14:18:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 30, 31]
10:14:18:ST3_emu:INFO: Number of chips: 3
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
FEB type: B FEB_A: 0 FEB_B: 1
10:14:18:febtest:ERROR: HW addres 1 != 0
10:14:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:14:21:febtest:INFO: 30-01 | XA-000-08-002-001-007-055-07 | 34.6 | 1177.4
10:14:21:febtest:INFO: 26-05 | XA-000-08-002-001-007-049-07 | 34.6 | 1189.2
10:14:22:febtest:INFO: 24-07 | XA-000-08-002-001-007-056-07 | 12.4 | 1265.4
10:14:22:ST3_smx:INFO: Configuring SMX FAST
10:14:24:ST3_smx:INFO: chip: 30-1 40.898880 C 1159.654860 mV
10:14:24:ST3_smx:INFO: Electrons
10:14:24:ST3_smx:INFO: # loops 0
10:14:25:ST3_smx:INFO: # loops 1
10:14:27:ST3_smx:INFO: # loops 2
10:14:29:ST3_smx:INFO: Total # of broken channels: 0
10:14:29:ST3_smx:INFO: List of broken channels: []
10:14:29:ST3_smx:INFO: Total # of broken channels: 62
10:14:29:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
10:14:30:ST3_smx:INFO: Configuring SMX FAST
10:14:32:ST3_smx:INFO: chip: 26-5 40.898880 C 1165.571835 mV
10:14:32:ST3_smx:INFO: Electrons
10:14:32:ST3_smx:INFO: # loops 0
10:14:33:ST3_smx:INFO: # loops 1
10:14:35:ST3_smx:INFO: # loops 2
10:14:37:ST3_smx:INFO: Total # of broken channels: 0
10:14:37:ST3_smx:INFO: List of broken channels: []
10:14:37:ST3_smx:INFO: Total # of broken channels: 0
10:14:37:ST3_smx:INFO: List of broken channels: []
10:14:38:ST3_smx:INFO: Configuring SMX FAST
10:14:40:ST3_smx:INFO: chip: 24-7 18.745682 C 1236.187875 mV
10:14:40:ST3_smx:INFO: Electrons
10:14:40:ST3_smx:INFO: # loops 0
10:14:41:ST3_smx:INFO: # loops 1
10:14:43:ST3_smx:INFO: # loops 2
10:14:45:ST3_smx:INFO: Total # of broken channels: 0
10:14:45:ST3_smx:INFO: List of broken channels: []
10:14:45:ST3_smx:INFO: Total # of broken channels: 4
10:14:45:ST3_smx:INFO: List of broken channels: [7, 9, 11, 17]
10:14:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:14:46:febtest:INFO: 30-01 | XA-000-08-002-001-007-055-07 | 40.9 | 1159.7
10:14:46:febtest:INFO: 26-05 | XA-000-08-002-001-007-049-07 | 40.9 | 1165.6
10:14:46:febtest:INFO: 24-07 | XA-000-08-002-001-007-056-07 | 21.9 | 1242.0
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_03_15-10_14_05
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5DL100116 M5DL1T0001160A2 42 A
FEB_SN : 2119
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8531', '1.852', '1.1530']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9309', '1.850', '0.4399']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9266', '1.850', '0.3544']