
FEB_2125 21.03.24 13:06:35
TextEdit.txt
13:06:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:06:35:ST3_Shared:INFO: FEB-Microcable 13:06:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:06:35:febtest:INFO: Testing FEB with SN 2125 13:06:38:smx_tester:INFO: Scanning setup 13:06:38:elinks:INFO: Disabling clock on downlink 0 13:06:38:elinks:INFO: Disabling clock on downlink 1 13:06:38:elinks:INFO: Disabling clock on downlink 2 13:06:38:elinks:INFO: Disabling clock on downlink 3 13:06:38:elinks:INFO: Disabling clock on downlink 4 13:06:38:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:06:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:06:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:06:38:elinks:INFO: Disabling clock on downlink 0 13:06:38:elinks:INFO: Disabling clock on downlink 1 13:06:38:elinks:INFO: Disabling clock on downlink 2 13:06:38:elinks:INFO: Disabling clock on downlink 3 13:06:38:elinks:INFO: Disabling clock on downlink 4 13:06:38:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:06:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:06:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:06:38:elinks:INFO: Disabling clock on downlink 0 13:06:38:elinks:INFO: Disabling clock on downlink 1 13:06:38:elinks:INFO: Disabling clock on downlink 2 13:06:38:elinks:INFO: Disabling clock on downlink 3 13:06:38:elinks:INFO: Disabling clock on downlink 4 13:06:38:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:06:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:06:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:06:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:06:38:elinks:INFO: Disabling clock on downlink 0 13:06:38:elinks:INFO: Disabling clock on downlink 1 13:06:38:elinks:INFO: Disabling clock on downlink 2 13:06:38:elinks:INFO: Disabling clock on downlink 3 13:06:38:elinks:INFO: Disabling clock on downlink 4 13:06:38:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:06:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:06:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:06:39:elinks:INFO: Disabling clock on downlink 0 13:06:39:elinks:INFO: Disabling clock on downlink 1 13:06:39:elinks:INFO: Disabling clock on downlink 2 13:06:39:elinks:INFO: Disabling clock on downlink 3 13:06:39:elinks:INFO: Disabling clock on downlink 4 13:06:39:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:06:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:06:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:06:39:setup_element:INFO: Scanning clock phase 13:06:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:06:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:06:39:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:06:39:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 13:06:39:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 13:06:39:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXXXX__ Clock Delay: 32 13:06:39:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXXXX__ Clock Delay: 32 13:06:39:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 13:06:39:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 13:06:39:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 13:06:39:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 13:06:39:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 13:06:39:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 13:06:39:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 13:06:39:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 13:06:39:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:06:39:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 13:06:39:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 13:06:39:setup_element:INFO: Scanning data phases 13:06:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:06:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:06:45:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:06:45:setup_element:INFO: Eye window for uplink 16: XXX__________________________________XXX Data delay found: 19 13:06:45:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX Data delay found: 17 13:06:45:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX Data delay found: 18 13:06:45:setup_element:INFO: Eye window for uplink 19: X_________________________________XXXXX_ Data delay found: 17 13:06:45:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX Data delay found: 17 13:06:45:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_ Data delay found: 16 13:06:45:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________ Data delay found: 29 13:06:45:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________ Data delay found: 31 13:06:45:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________ Data delay found: 30 13:06:45:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________ Data delay found: 33 13:06:45:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________ Data delay found: 35 13:06:45:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________ Data delay found: 37 13:06:45:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________ Data delay found: 38 13:06:45:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________ Data delay found: 38 13:06:45:setup_element:INFO: Setting the data phase to 19 for uplink 16 13:06:45:setup_element:INFO: Setting the data phase to 17 for uplink 17 13:06:45:setup_element:INFO: Setting the data phase to 18 for uplink 18 13:06:45:setup_element:INFO: Setting the data phase to 17 for uplink 19 13:06:45:setup_element:INFO: Setting the data phase to 17 for uplink 20 13:06:45:setup_element:INFO: Setting the data phase to 16 for uplink 21 13:06:45:setup_element:INFO: Setting the data phase to 29 for uplink 24 13:06:45:setup_element:INFO: Setting the data phase to 31 for uplink 25 13:06:45:setup_element:INFO: Setting the data phase to 30 for uplink 26 13:06:45:setup_element:INFO: Setting the data phase to 33 for uplink 27 13:06:45:setup_element:INFO: Setting the data phase to 35 for uplink 28 13:06:45:setup_element:INFO: Setting the data phase to 37 for uplink 29 13:06:45:setup_element:INFO: Setting the data phase to 38 for uplink 30 13:06:45:setup_element:INFO: Setting the data phase to 38 for uplink 31 13:06:45:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 16: ____________________________________________________________________XXXXXXXX____ Uplink 17: ____________________________________________________________________XXXXXXXX____ Uplink 18: ____________________________________________________________________XXXXXXXXXX__ Uplink 19: ____________________________________________________________________XXXXXXXXXX__ Uplink 20: ____________________________________________________________________XXXXXXXXX___ Uplink 21: ____________________________________________________________________XXXXXXXXX___ Uplink 24: ____________________________________________________________________XXXXXXX_____ Uplink 25: ____________________________________________________________________XXXXXXX_____ Uplink 26: ____________________________________________________________________XXXXXXXX____ Uplink 27: ____________________________________________________________________XXXXXXXX____ Uplink 28: _____________________________________________________________________XXXXXXX____ Uplink 29: _____________________________________________________________________XXXXXXX____ Uplink 30: ______________________________________________________________________XXXXXXXX__ Uplink 31: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 17: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 18: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 19: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXX_ Uplink 20: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 21: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 24: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 25: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 26: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 27: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 28: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 29: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 30: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 31: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ ] 13:06:45:setup_element:INFO: Beginning SMX ASICs map scan 13:06:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:06:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:06:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:06:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:06:45:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31] 13:06:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:06:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:06:45:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 13:06:45:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 13:06:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:06:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:06:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 13:06:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 13:06:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 13:06:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 13:06:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 13:06:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 13:06:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:06:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:06:47:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 16: ____________________________________________________________________XXXXXXXX____ Uplink 17: ____________________________________________________________________XXXXXXXX____ Uplink 18: ____________________________________________________________________XXXXXXXXXX__ Uplink 19: ____________________________________________________________________XXXXXXXXXX__ Uplink 20: ____________________________________________________________________XXXXXXXXX___ Uplink 21: ____________________________________________________________________XXXXXXXXX___ Uplink 24: ____________________________________________________________________XXXXXXX_____ Uplink 25: ____________________________________________________________________XXXXXXX_____ Uplink 26: ____________________________________________________________________XXXXXXXX____ Uplink 27: ____________________________________________________________________XXXXXXXX____ Uplink 28: _____________________________________________________________________XXXXXXX____ Uplink 29: _____________________________________________________________________XXXXXXX____ Uplink 30: ______________________________________________________________________XXXXXXXX__ Uplink 31: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 17: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 18: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 19: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXX_ Uplink 20: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 21: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 24: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 25: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 26: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 27: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 28: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 29: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 30: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 31: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ 13:06:47:setup_element:INFO: Performing Elink synchronization 13:06:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:06:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:06:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:06:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:06:47:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:06:48:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31] 13:06:48:ST3_emu:INFO: Number of chips: 7 addr | upli | dwnli | grp | uplinks | uplinks_map 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] FEB type: B FEB_A: 0 FEB_B: 1 13:06:48:febtest:ERROR: HW addres 1 != 0 13:06:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:06:55:febtest:INFO: 30-01 | XA-000-08-002-000-005-163-01 | 37.7 | 1183.3 13:06:55:febtest:INFO: 21-02 | XA-000-08-002-000-005-161-01 | 6.1 | 1288.7 13:06:55:febtest:INFO: 28-03 | XA-000-08-002-000-005-156-08 | 40.9 | 1177.4 13:06:55:febtest:INFO: 19-04 | XA-000-08-002-000-005-158-08 | 25.1 | 1230.3 13:06:55:febtest:INFO: 26-05 | XA-000-08-002-000-005-159-08 | 21.9 | 1236.2 13:06:56:febtest:INFO: 17-06 | XA-000-08-002-000-005-155-08 | 18.7 | 1253.7 13:06:56:febtest:INFO: 24-07 | XA-000-08-002-000-005-162-01 | 50.4 | 1141.9 13:06:56:ST3_smx:INFO: Configuring SMX FAST 13:06:58:ST3_smx:INFO: chip: 30-1 25.062742 C 1224.468235 mV 13:06:58:ST3_smx:INFO: Electrons 13:06:58:ST3_smx:INFO: # loops 0 13:07:00:ST3_smx:INFO: # loops 1 13:07:01:ST3_smx:INFO: # loops 2 13:07:03:ST3_smx:INFO: Total # of broken channels: 0 13:07:03:ST3_smx:INFO: List of broken channels: [] 13:07:03:ST3_smx:INFO: Total # of broken channels: 0 13:07:03:ST3_smx:INFO: List of broken channels: [] 13:07:04:ST3_smx:INFO: Configuring SMX FAST 13:07:06:ST3_smx:INFO: chip: 21-2 21.902970 C 1247.887635 mV 13:07:06:ST3_smx:INFO: Electrons 13:07:06:ST3_smx:INFO: # loops 0 13:07:07:ST3_smx:INFO: # loops 1 13:07:09:ST3_smx:INFO: # loops 2 13:07:11:ST3_smx:INFO: Total # of broken channels: 1 13:07:11:ST3_smx:INFO: List of broken channels: [117] 13:07:11:ST3_smx:INFO: Total # of broken channels: 1 13:07:11:ST3_smx:INFO: List of broken channels: [117] 13:07:12:ST3_smx:INFO: Configuring SMX FAST 13:07:14:ST3_smx:INFO: chip: 28-3 40.898880 C 1165.571835 mV 13:07:14:ST3_smx:INFO: Electrons 13:07:14:ST3_smx:INFO: # loops 0 13:07:15:ST3_smx:INFO: # loops 1 13:07:17:ST3_smx:INFO: # loops 2 13:07:19:ST3_smx:INFO: Total # of broken channels: 0 13:07:19:ST3_smx:INFO: List of broken channels: [] 13:07:19:ST3_smx:INFO: Total # of broken channels: 5 13:07:19:ST3_smx:INFO: List of broken channels: [15, 21, 27, 29, 45] 13:07:20:ST3_smx:INFO: Configuring SMX FAST 13:07:22:ST3_smx:INFO: chip: 19-4 31.389742 C 1206.851500 mV 13:07:22:ST3_smx:INFO: Electrons 13:07:22:ST3_smx:INFO: # loops 0 13:07:23:ST3_smx:INFO: # loops 1 13:07:25:ST3_smx:INFO: # loops 2 13:07:27:ST3_smx:INFO: Total # of broken channels: 0 13:07:27:ST3_smx:INFO: List of broken channels: [] 13:07:27:ST3_smx:INFO: Total # of broken channels: 16 13:07:27:ST3_smx:INFO: List of broken channels: [5, 7, 9, 11, 13, 17, 19, 21, 23, 25, 27, 29, 31, 35, 37, 39] 13:07:27:ST3_smx:INFO: Configuring SMX FAST 13:07:29:ST3_smx:INFO: chip: 26-5 31.389742 C 1206.851500 mV 13:07:29:ST3_smx:INFO: Electrons 13:07:29:ST3_smx:INFO: # loops 0 13:07:31:ST3_smx:INFO: # loops 1 13:07:33:ST3_smx:INFO: # loops 2 13:07:35:ST3_smx:INFO: Total # of broken channels: 0 13:07:35:ST3_smx:INFO: List of broken channels: [] 13:07:35:ST3_smx:INFO: Total # of broken channels: 55 13:07:35:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 115, 117] 13:07:35:ST3_smx:INFO: Configuring SMX FAST 13:07:37:ST3_smx:INFO: chip: 17-6 25.062742 C 1230.330540 mV 13:07:37:ST3_smx:INFO: Electrons 13:07:37:ST3_smx:INFO: # loops 0 13:07:39:ST3_smx:INFO: # loops 1 13:07:41:ST3_smx:INFO: # loops 2 13:07:42:ST3_smx:INFO: Total # of broken channels: 0 13:07:42:ST3_smx:INFO: List of broken channels: [] 13:07:42:ST3_smx:INFO: Total # of broken channels: 6 13:07:42:ST3_smx:INFO: List of broken channels: [21, 23, 25, 27, 31, 33] 13:07:43:ST3_smx:INFO: Configuring SMX FAST 13:07:45:ST3_smx:INFO: chip: 24-7 50.430383 C 1141.874115 mV 13:07:45:ST3_smx:INFO: Electrons 13:07:45:ST3_smx:INFO: # loops 0 13:07:47:ST3_smx:INFO: # loops 1 13:07:49:ST3_smx:INFO: # loops 2 13:07:50:ST3_smx:INFO: Total # of broken channels: 0 13:07:50:ST3_smx:INFO: List of broken channels: [] 13:07:50:ST3_smx:INFO: Total # of broken channels: 30 13:07:50:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 59, 61, 73] 13:07:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:07:51:febtest:INFO: 30-01 | XA-000-08-002-000-005-163-01 | 25.1 | 1230.3 13:07:52:febtest:INFO: 21-02 | XA-000-08-002-000-005-161-01 | 21.9 | 1247.9 13:07:52:febtest:INFO: 28-03 | XA-000-08-002-000-005-156-08 | 40.9 | 1171.5 13:07:52:febtest:INFO: 19-04 | XA-000-08-002-000-005-158-08 | 31.4 | 1206.9 13:07:52:febtest:INFO: 26-05 | XA-000-08-002-000-005-159-08 | 31.4 | 1206.9 13:07:52:febtest:INFO: 17-06 | XA-000-08-002-000-005-155-08 | 25.1 | 1230.3 13:07:53:febtest:INFO: 24-07 | XA-000-08-002-000-005-162-01 | 50.4 | 1141.9 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_03_21-13_06_35 OPERATOR : Carmen S.; Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L5DL100116 M5DL1B0001160B2 42 A FEB_SN : 2125 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 0 FEB_B : 1 --------------------------------------- --------------------------------------- VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5300', '1.852', '2.7250'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9210', '1.850', '0.7882'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9210', '1.850', '0.7426']