
FEB_2125 22.03.24 14:06:03
TextEdit.txt
14:06:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:06:03:ST3_Shared:INFO: FEB-Microcable 14:06:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:06:04:febtest:INFO: Testing FEB with SN 2125 14:06:06:smx_tester:INFO: Scanning setup 14:06:06:elinks:INFO: Disabling clock on downlink 0 14:06:06:elinks:INFO: Disabling clock on downlink 1 14:06:06:elinks:INFO: Disabling clock on downlink 2 14:06:06:elinks:INFO: Disabling clock on downlink 3 14:06:06:elinks:INFO: Disabling clock on downlink 4 14:06:06:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:06:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:06:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:06:06:elinks:INFO: Disabling clock on downlink 0 14:06:06:elinks:INFO: Disabling clock on downlink 1 14:06:06:elinks:INFO: Disabling clock on downlink 2 14:06:06:elinks:INFO: Disabling clock on downlink 3 14:06:06:elinks:INFO: Disabling clock on downlink 4 14:06:06:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:06:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:06:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:06:06:elinks:INFO: Disabling clock on downlink 0 14:06:06:elinks:INFO: Disabling clock on downlink 1 14:06:06:elinks:INFO: Disabling clock on downlink 2 14:06:06:elinks:INFO: Disabling clock on downlink 3 14:06:06:elinks:INFO: Disabling clock on downlink 4 14:06:06:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:06:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:06:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:06:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:06:07:elinks:INFO: Disabling clock on downlink 0 14:06:07:elinks:INFO: Disabling clock on downlink 1 14:06:07:elinks:INFO: Disabling clock on downlink 2 14:06:07:elinks:INFO: Disabling clock on downlink 3 14:06:07:elinks:INFO: Disabling clock on downlink 4 14:06:07:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:06:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:06:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:06:07:elinks:INFO: Disabling clock on downlink 0 14:06:07:elinks:INFO: Disabling clock on downlink 1 14:06:07:elinks:INFO: Disabling clock on downlink 2 14:06:07:elinks:INFO: Disabling clock on downlink 3 14:06:07:elinks:INFO: Disabling clock on downlink 4 14:06:07:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:06:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:06:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:06:07:setup_element:INFO: Scanning clock phase 14:06:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:06:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:06:07:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:06:07:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 14:06:07:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 14:06:07:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 14:06:07:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 14:06:07:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:06:07:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:06:07:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 14:06:07:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 14:06:07:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:06:07:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:06:07:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:06:07:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:06:07:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 14:06:07:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 14:06:07:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2 14:06:07:setup_element:INFO: Scanning data phases 14:06:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:06:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:06:13:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:06:13:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX Data delay found: 20 14:06:13:setup_element:INFO: Eye window for uplink 17: X___________________________________XXXX Data delay found: 18 14:06:13:setup_element:INFO: Eye window for uplink 18: XXXX_________________________________XXX Data delay found: 20 14:06:13:setup_element:INFO: Eye window for uplink 19: XX__________________________________XXXX Data delay found: 18 14:06:13:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX Data delay found: 18 14:06:13:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXXX Data delay found: 16 14:06:13:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________ Data delay found: 29 14:06:13:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________ Data delay found: 31 14:06:13:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________ Data delay found: 30 14:06:13:setup_element:INFO: Eye window for uplink 27: ____________XXXXX_______________________ Data delay found: 34 14:06:13:setup_element:INFO: Eye window for uplink 28: _____________XXXXXX_____________________ Data delay found: 35 14:06:13:setup_element:INFO: Eye window for uplink 29: ________________XXXXXX__________________ Data delay found: 38 14:06:13:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________ Data delay found: 39 14:06:13:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXX_________________ Data delay found: 39 14:06:13:setup_element:INFO: Setting the data phase to 20 for uplink 16 14:06:13:setup_element:INFO: Setting the data phase to 18 for uplink 17 14:06:13:setup_element:INFO: Setting the data phase to 20 for uplink 18 14:06:13:setup_element:INFO: Setting the data phase to 18 for uplink 19 14:06:13:setup_element:INFO: Setting the data phase to 18 for uplink 20 14:06:13:setup_element:INFO: Setting the data phase to 16 for uplink 21 14:06:13:setup_element:INFO: Setting the data phase to 29 for uplink 24 14:06:13:setup_element:INFO: Setting the data phase to 31 for uplink 25 14:06:13:setup_element:INFO: Setting the data phase to 30 for uplink 26 14:06:13:setup_element:INFO: Setting the data phase to 34 for uplink 27 14:06:13:setup_element:INFO: Setting the data phase to 35 for uplink 28 14:06:13:setup_element:INFO: Setting the data phase to 38 for uplink 29 14:06:13:setup_element:INFO: Setting the data phase to 39 for uplink 30 14:06:13:setup_element:INFO: Setting the data phase to 39 for uplink 31 14:06:13:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 31 Window Length: 70 Eye Windows: Uplink 16: ____________________________________________________________________XXXXXXX_____ Uplink 17: ____________________________________________________________________XXXXXXX_____ Uplink 18: ____________________________________________________________________XXXXXXXXX___ Uplink 19: ____________________________________________________________________XXXXXXXXX___ Uplink 20: ____________________________________________________________________XXXXXXXX____ Uplink 21: ____________________________________________________________________XXXXXXXX____ Uplink 24: ___________________________________________________________________XXXXXXXX_____ Uplink 25: ___________________________________________________________________XXXXXXXX_____ Uplink 26: ____________________________________________________________________XXXXXXXX____ Uplink 27: ____________________________________________________________________XXXXXXXX____ Uplink 28: _____________________________________________________________________XXXXXXXX___ Uplink 29: _____________________________________________________________________XXXXXXXX___ Uplink 30: ______________________________________________________________________XXXXXXX___ Uplink 31: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 17: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 18: Optimal Phase: 20 Window Length: 33 Eye Window: XXXX_________________________________XXX Uplink 19: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 20: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 21: Optimal Phase: 16 Window Length: 34 Eye Window: __________________________________XXXXXX Uplink 24: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXXXX___________________________ Uplink 25: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 26: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 27: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 28: Optimal Phase: 35 Window Length: 34 Eye Window: _____________XXXXXX_____________________ Uplink 29: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 30: Optimal Phase: 39 Window Length: 34 Eye Window: _________________XXXXXX_________________ Uplink 31: Optimal Phase: 39 Window Length: 33 Eye Window: ________________XXXXXXX_________________ ] 14:06:13:setup_element:INFO: Beginning SMX ASICs map scan 14:06:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:06:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:06:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:06:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:06:13:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31] 14:06:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:06:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:06:13:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 14:06:14:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 14:06:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:06:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:06:14:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 14:06:14:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 14:06:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:06:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:06:14:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 14:06:14:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 14:06:14:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:06:14:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:06:16:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 31 Window Length: 70 Eye Windows: Uplink 16: ____________________________________________________________________XXXXXXX_____ Uplink 17: ____________________________________________________________________XXXXXXX_____ Uplink 18: ____________________________________________________________________XXXXXXXXX___ Uplink 19: ____________________________________________________________________XXXXXXXXX___ Uplink 20: ____________________________________________________________________XXXXXXXX____ Uplink 21: ____________________________________________________________________XXXXXXXX____ Uplink 24: ___________________________________________________________________XXXXXXXX_____ Uplink 25: ___________________________________________________________________XXXXXXXX_____ Uplink 26: ____________________________________________________________________XXXXXXXX____ Uplink 27: ____________________________________________________________________XXXXXXXX____ Uplink 28: _____________________________________________________________________XXXXXXXX___ Uplink 29: _____________________________________________________________________XXXXXXXX___ Uplink 30: ______________________________________________________________________XXXXXXX___ Uplink 31: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 17: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 18: Optimal Phase: 20 Window Length: 33 Eye Window: XXXX_________________________________XXX Uplink 19: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 20: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 21: Optimal Phase: 16 Window Length: 34 Eye Window: __________________________________XXXXXX Uplink 24: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXXXX___________________________ Uplink 25: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 26: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 27: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 28: Optimal Phase: 35 Window Length: 34 Eye Window: _____________XXXXXX_____________________ Uplink 29: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 30: Optimal Phase: 39 Window Length: 34 Eye Window: _________________XXXXXX_________________ Uplink 31: Optimal Phase: 39 Window Length: 33 Eye Window: ________________XXXXXXX_________________ 14:06:16:setup_element:INFO: Performing Elink synchronization 14:06:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:06:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:06:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:06:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:06:16:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:06:16:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31] 14:06:16:ST3_emu:INFO: Number of chips: 7 addr | upli | dwnli | grp | uplinks | uplinks_map 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] FEB type: B FEB_A: 0 FEB_B: 1 14:06:17:febtest:ERROR: HW addres 1 != 0 14:06:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:06:22:febtest:INFO: 30-01 | XA-000-08-002-000-005-163-01 | 40.9 | 1177.4 14:06:23:febtest:INFO: 21-02 | XA-000-08-002-000-005-161-01 | 9.3 | 1288.7 14:06:23:febtest:INFO: 28-03 | XA-000-08-002-000-005-156-08 | 40.9 | 1177.4 14:06:23:febtest:INFO: 19-04 | XA-000-08-002-000-005-158-08 | 25.1 | 1230.3 14:06:23:febtest:INFO: 26-05 | XA-000-08-002-000-005-159-08 | 21.9 | 1242.0 14:06:24:febtest:INFO: 17-06 | XA-000-08-002-000-005-155-08 | 25.1 | 1242.0 14:06:24:febtest:INFO: 24-07 | XA-000-08-002-000-005-162-01 | 53.6 | 1135.9 14:06:24:ST3_smx:INFO: Configuring SMX FAST 14:06:26:ST3_smx:INFO: chip: 30-1 28.225000 C 1230.330540 mV 14:06:26:ST3_smx:INFO: Electrons 14:06:26:ST3_smx:INFO: # loops 0 14:06:27:ST3_smx:INFO: # loops 1 14:06:29:ST3_smx:INFO: # loops 2 14:06:31:ST3_smx:INFO: Total # of broken channels: 0 14:06:31:ST3_smx:INFO: List of broken channels: [] 14:06:31:ST3_smx:INFO: Total # of broken channels: 60 14:06:31:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121] 14:06:32:ST3_smx:INFO: Configuring SMX FAST 14:06:34:ST3_smx:INFO: chip: 21-2 21.902970 C 1247.887635 mV 14:06:34:ST3_smx:INFO: Electrons 14:06:34:ST3_smx:INFO: # loops 0 14:06:35:ST3_smx:INFO: # loops 1 14:06:37:ST3_smx:INFO: # loops 2 14:06:39:ST3_smx:INFO: Total # of broken channels: 18 14:06:39:ST3_smx:INFO: List of broken channels: [86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 117, 120] 14:06:39:ST3_smx:INFO: Total # of broken channels: 89 14:06:39:ST3_smx:INFO: List of broken channels: [9, 11, 15, 16, 17, 18, 19, 20, 21, 23, 27, 29, 31, 33, 34, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 54, 55, 57, 59, 61, 63, 64, 65, 67, 69, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124] 14:06:40:ST3_smx:INFO: Configuring SMX FAST 14:06:42:ST3_smx:INFO: chip: 28-3 44.073563 C 1165.571835 mV 14:06:42:ST3_smx:INFO: Electrons 14:06:42:ST3_smx:INFO: # loops 0 14:06:43:ST3_smx:INFO: # loops 1 14:06:45:ST3_smx:INFO: # loops 2 14:06:46:ST3_smx:INFO: Total # of broken channels: 12 14:06:46:ST3_smx:INFO: List of broken channels: [11, 13, 15, 17, 21, 23, 27, 29, 101, 109, 111, 113] 14:06:46:ST3_smx:INFO: Total # of broken channels: 60 14:06:46:ST3_smx:INFO: List of broken channels: [7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125] 14:06:47:ST3_smx:INFO: Configuring SMX FAST 14:06:49:ST3_smx:INFO: chip: 19-4 34.556970 C 1206.851500 mV 14:06:49:ST3_smx:INFO: Electrons 14:06:49:ST3_smx:INFO: # loops 0 14:06:51:ST3_smx:INFO: # loops 1 14:06:53:ST3_smx:INFO: # loops 2 14:06:54:ST3_smx:INFO: Total # of broken channels: 19 14:06:54:ST3_smx:INFO: List of broken channels: [7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 43, 47] 14:06:54:ST3_smx:INFO: Total # of broken channels: 62 14:06:54:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125] 14:06:55:ST3_smx:INFO: Configuring SMX FAST 14:06:57:ST3_smx:INFO: chip: 26-5 34.556970 C 1206.851500 mV 14:06:57:ST3_smx:INFO: Electrons 14:06:57:ST3_smx:INFO: # loops 0 14:06:59:ST3_smx:INFO: # loops 1 14:07:00:ST3_smx:INFO: # loops 2 14:07:02:ST3_smx:INFO: Total # of broken channels: 23 14:07:02:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 55] 14:07:02:ST3_smx:INFO: Total # of broken channels: 62 14:07:02:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123] 14:07:03:ST3_smx:INFO: Configuring SMX FAST 14:07:05:ST3_smx:INFO: chip: 17-6 28.225000 C 1236.187875 mV 14:07:05:ST3_smx:INFO: Electrons 14:07:05:ST3_smx:INFO: # loops 0 14:07:06:ST3_smx:INFO: # loops 1 14:07:08:ST3_smx:INFO: # loops 2 14:07:10:ST3_smx:INFO: Total # of broken channels: 0 14:07:10:ST3_smx:INFO: List of broken channels: [] 14:07:10:ST3_smx:INFO: Total # of broken channels: 49 14:07:10:ST3_smx:INFO: List of broken channels: [29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125] 14:07:11:ST3_smx:INFO: Configuring SMX FAST 14:07:13:ST3_smx:INFO: chip: 24-7 53.612520 C 1141.874115 mV 14:07:13:ST3_smx:INFO: Electrons 14:07:13:ST3_smx:INFO: # loops 0 14:07:14:ST3_smx:INFO: # loops 1 14:07:16:ST3_smx:INFO: # loops 2 14:07:17:ST3_smx:INFO: Total # of broken channels: 1 14:07:17:ST3_smx:INFO: List of broken channels: [17] 14:07:17:ST3_smx:INFO: Total # of broken channels: 57 14:07:17:ST3_smx:INFO: List of broken channels: [2, 3, 4, 5, 6, 7, 8, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107] 14:07:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:07:19:febtest:INFO: 30-01 | XA-000-08-002-000-005-163-01 | 28.2 | 1230.3 14:07:19:febtest:INFO: 21-02 | XA-000-08-002-000-005-161-01 | 25.1 | 1247.9 14:07:19:febtest:INFO: 28-03 | XA-000-08-002-000-005-156-08 | 44.1 | 1165.6 14:07:19:febtest:INFO: 19-04 | XA-000-08-002-000-005-158-08 | 34.6 | 1206.9 14:07:19:febtest:INFO: 26-05 | XA-000-08-002-000-005-159-08 | 34.6 | 1206.9 14:07:20:febtest:INFO: 17-06 | XA-000-08-002-000-005-155-08 | 28.2 | 1236.2 14:07:20:febtest:INFO: 24-07 | XA-000-08-002-000-005-162-01 | 53.6 | 1141.9 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_03_22-14_06_03 OPERATOR : Carmen S.; Oleksandr S.; Robert V.; Irakli K.; Ralf K.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 2125 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 0 FEB_B : 1 --------------------------------------- --------------------------------------- VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5350', '1.850', '2.3730'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9290', '1.850', '0.6358'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9250', '1.850', '0.6356']