FEB_2126 12.03.24 13:33:39
Info
13:33:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:33:39:ST3_Shared:INFO: FEB-Microcable
13:33:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:33:39:febtest:INFO: Testing FEB with SN 2126
13:33:42:smx_tester:INFO: Scanning setup
13:33:42:elinks:INFO: Disabling clock on downlink 0
13:33:42:elinks:INFO: Disabling clock on downlink 1
13:33:42:elinks:INFO: Disabling clock on downlink 2
13:33:42:elinks:INFO: Disabling clock on downlink 3
13:33:42:elinks:INFO: Disabling clock on downlink 4
13:33:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:33:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:33:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:33:42:elinks:INFO: Disabling clock on downlink 0
13:33:42:elinks:INFO: Disabling clock on downlink 1
13:33:42:elinks:INFO: Disabling clock on downlink 2
13:33:42:elinks:INFO: Disabling clock on downlink 3
13:33:42:elinks:INFO: Disabling clock on downlink 4
13:33:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:33:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:33:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:33:42:elinks:INFO: Disabling clock on downlink 0
13:33:42:elinks:INFO: Disabling clock on downlink 1
13:33:42:elinks:INFO: Disabling clock on downlink 2
13:33:42:elinks:INFO: Disabling clock on downlink 3
13:33:42:elinks:INFO: Disabling clock on downlink 4
13:33:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:33:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:33:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:33:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:33:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:33:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:33:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:33:43:elinks:INFO: Disabling clock on downlink 0
13:33:43:elinks:INFO: Disabling clock on downlink 1
13:33:43:elinks:INFO: Disabling clock on downlink 2
13:33:43:elinks:INFO: Disabling clock on downlink 3
13:33:43:elinks:INFO: Disabling clock on downlink 4
13:33:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:33:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:33:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:33:43:elinks:INFO: Disabling clock on downlink 0
13:33:43:elinks:INFO: Disabling clock on downlink 1
13:33:43:elinks:INFO: Disabling clock on downlink 2
13:33:43:elinks:INFO: Disabling clock on downlink 3
13:33:43:elinks:INFO: Disabling clock on downlink 4
13:33:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:33:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:33:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:33:43:setup_element:INFO: Scanning clock phase
13:33:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:33:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:33:43:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:33:43:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:33:43:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:33:43:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:33:43:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:33:43:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:33:43:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:33:43:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:33:43:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:33:43:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:33:43:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:33:43:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:33:43:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:33:43:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
13:33:43:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
13:33:43:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:33:43:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:33:43:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
13:33:43:setup_element:INFO: Scanning data phases
13:33:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:33:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:33:49:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:33:49:setup_element:INFO: Eye window for uplink 16: XX__________________________________XXXX
Data delay found: 18
13:33:49:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
13:33:49:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
13:33:49:setup_element:INFO: Eye window for uplink 19: __________________________________XXXXX_
Data delay found: 16
13:33:49:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXXX
Data delay found: 17
13:33:49:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXXX
Data delay found: 16
13:33:49:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
13:33:49:setup_element:INFO: Eye window for uplink 23: XXXXX_____________________________XXXXXX
Data delay found: 19
13:33:49:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
13:33:49:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
13:33:49:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
13:33:49:setup_element:INFO: Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
13:33:49:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
13:33:49:setup_element:INFO: Eye window for uplink 29: _______________XXXXX____________________
Data delay found: 37
13:33:49:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
13:33:49:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
13:33:49:setup_element:INFO: Setting the data phase to 18 for uplink 16
13:33:49:setup_element:INFO: Setting the data phase to 16 for uplink 17
13:33:49:setup_element:INFO: Setting the data phase to 18 for uplink 18
13:33:49:setup_element:INFO: Setting the data phase to 16 for uplink 19
13:33:49:setup_element:INFO: Setting the data phase to 17 for uplink 20
13:33:49:setup_element:INFO: Setting the data phase to 16 for uplink 21
13:33:49:setup_element:INFO: Setting the data phase to 18 for uplink 22
13:33:49:setup_element:INFO: Setting the data phase to 19 for uplink 23
13:33:49:setup_element:INFO: Setting the data phase to 28 for uplink 24
13:33:49:setup_element:INFO: Setting the data phase to 31 for uplink 25
13:33:49:setup_element:INFO: Setting the data phase to 29 for uplink 26
13:33:49:setup_element:INFO: Setting the data phase to 33 for uplink 27
13:33:49:setup_element:INFO: Setting the data phase to 35 for uplink 28
13:33:49:setup_element:INFO: Setting the data phase to 37 for uplink 29
13:33:49:setup_element:INFO: Setting the data phase to 37 for uplink 30
13:33:49:setup_element:INFO: Setting the data phase to 38 for uplink 31
13:33:49:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 69
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: ____________________________________________________________________XXXXXXXX____
Uplink 19: ____________________________________________________________________XXXXXXXX____
Uplink 20: ____________________________________________________________________XXXXXXXX____
Uplink 21: ____________________________________________________________________XXXXXXXX____
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: ___________________________________________________________________XXXXXXXX_____
Uplink 25: ___________________________________________________________________XXXXXXXX_____
Uplink 26: ___________________________________________________________________XXXXXXXXX____
Uplink 27: ___________________________________________________________________XXXXXXXXX____
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 17:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 20:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 21:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 22:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 23:
Optimal Phase: 19
Window Length: 29
Eye Window: XXXXX_____________________________XXXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
]
13:33:49:setup_element:INFO: Beginning SMX ASICs map scan
13:33:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:33:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:33:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:33:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:33:49:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:33:49:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:33:49:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:33:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:33:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:33:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:33:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:33:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:33:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:33:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:33:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:33:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:33:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:33:50:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:33:50:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:33:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:33:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:33:52:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 69
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: ____________________________________________________________________XXXXXXXX____
Uplink 19: ____________________________________________________________________XXXXXXXX____
Uplink 20: ____________________________________________________________________XXXXXXXX____
Uplink 21: ____________________________________________________________________XXXXXXXX____
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: ___________________________________________________________________XXXXXXXX_____
Uplink 25: ___________________________________________________________________XXXXXXXX_____
Uplink 26: ___________________________________________________________________XXXXXXXXX____
Uplink 27: ___________________________________________________________________XXXXXXXXX____
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 17:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 20:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 21:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 22:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 23:
Optimal Phase: 19
Window Length: 29
Eye Window: XXXXX_____________________________XXXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
13:33:52:setup_element:INFO: Performing Elink synchronization
13:33:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:33:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:33:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:33:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:33:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:33:52:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:33:52:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
13:33:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:33:53:febtest:INFO: 23-00 | XA-000-08-002-000-008-085-00 | 34.6 | 1159.7
13:33:54:febtest:INFO: 30-01 | XA-000-08-002-000-008-089-00 | 31.4 | 1171.5
13:33:54:febtest:INFO: 21-02 | XA-000-08-002-000-008-080-00 | 37.7 | 1147.8
13:33:54:febtest:INFO: 28-03 | XA-000-08-002-000-008-062-11 | 25.1 | 1189.2
13:33:54:febtest:INFO: 19-04 | XA-000-08-002-000-008-065-07 | 6.1 | 1259.6
13:33:54:febtest:INFO: 26-05 | XA-000-08-002-000-008-092-00 | 37.7 | 1153.7
13:33:55:febtest:INFO: 17-06 | XA-000-08-002-000-008-084-00 | 34.6 | 1165.6
13:33:55:febtest:INFO: 24-07 | XA-000-08-002-000-008-090-00 | 31.4 | 1171.5
13:33:55:ST3_smx:INFO: Configuring SMX FAST
13:33:57:ST3_smx:INFO: chip: 23-0 28.225000 C 1177.390875 mV
13:33:57:ST3_smx:INFO: Electrons
13:33:57:ST3_smx:INFO: # loops 0
13:33:59:ST3_smx:INFO: # loops 1
13:34:00:ST3_smx:INFO: # loops 2
13:34:02:ST3_smx:INFO: Total # of broken channels: 1
13:34:02:ST3_smx:INFO: List of broken channels: [32]
13:34:02:ST3_smx:INFO: Total # of broken channels: 1
13:34:02:ST3_smx:INFO: List of broken channels: [32]
13:34:03:ST3_smx:INFO: Configuring SMX FAST
13:34:05:ST3_smx:INFO: chip: 30-1 37.726682 C 1147.806000 mV
13:34:05:ST3_smx:INFO: Electrons
13:34:05:ST3_smx:INFO: # loops 0
13:34:06:ST3_smx:INFO: # loops 1
13:34:08:ST3_smx:INFO: # loops 2
13:34:10:ST3_smx:INFO: Total # of broken channels: 0
13:34:10:ST3_smx:INFO: List of broken channels: []
13:34:10:ST3_smx:INFO: Total # of broken channels: 0
13:34:10:ST3_smx:INFO: List of broken channels: []
13:34:11:ST3_smx:INFO: Configuring SMX FAST
13:34:13:ST3_smx:INFO: chip: 21-2 34.556970 C 1171.483840 mV
13:34:13:ST3_smx:INFO: Electrons
13:34:13:ST3_smx:INFO: # loops 0
13:34:14:ST3_smx:INFO: # loops 1
13:34:16:ST3_smx:INFO: # loops 2
13:34:18:ST3_smx:INFO: Total # of broken channels: 0
13:34:18:ST3_smx:INFO: List of broken channels: []
13:34:18:ST3_smx:INFO: Total # of broken channels: 0
13:34:18:ST3_smx:INFO: List of broken channels: []
13:34:19:ST3_smx:INFO: Configuring SMX FAST
13:34:21:ST3_smx:INFO: chip: 28-3 28.225000 C 1183.292940 mV
13:34:21:ST3_smx:INFO: Electrons
13:34:21:ST3_smx:INFO: # loops 0
13:34:22:ST3_smx:INFO: # loops 1
13:34:24:ST3_smx:INFO: # loops 2
13:34:26:ST3_smx:INFO: Total # of broken channels: 0
13:34:26:ST3_smx:INFO: List of broken channels: []
13:34:26:ST3_smx:INFO: Total # of broken channels: 0
13:34:26:ST3_smx:INFO: List of broken channels: []
13:34:27:ST3_smx:INFO: Configuring SMX FAST
13:34:29:ST3_smx:INFO: chip: 19-4 12.438562 C 1247.887635 mV
13:34:29:ST3_smx:INFO: Electrons
13:34:29:ST3_smx:INFO: # loops 0
13:34:30:ST3_smx:INFO: # loops 1
13:34:32:ST3_smx:INFO: # loops 2
13:34:34:ST3_smx:INFO: Total # of broken channels: 0
13:34:34:ST3_smx:INFO: List of broken channels: []
13:34:34:ST3_smx:INFO: Total # of broken channels: 0
13:34:34:ST3_smx:INFO: List of broken channels: []
13:34:35:ST3_smx:INFO: Configuring SMX FAST
13:34:37:ST3_smx:INFO: chip: 26-5 40.898880 C 1147.806000 mV
13:34:37:ST3_smx:INFO: Electrons
13:34:37:ST3_smx:INFO: # loops 0
13:34:38:ST3_smx:INFO: # loops 1
13:34:40:ST3_smx:INFO: # loops 2
13:34:42:ST3_smx:INFO: Total # of broken channels: 0
13:34:42:ST3_smx:INFO: List of broken channels: []
13:34:42:ST3_smx:INFO: Total # of broken channels: 0
13:34:42:ST3_smx:INFO: List of broken channels: []
13:34:43:ST3_smx:INFO: Configuring SMX FAST
13:34:44:ST3_smx:INFO: chip: 17-6 40.898880 C 1147.806000 mV
13:34:44:ST3_smx:INFO: Electrons
13:34:44:ST3_smx:INFO: # loops 0
13:34:46:ST3_smx:INFO: # loops 1
13:34:48:ST3_smx:INFO: # loops 2
13:34:49:ST3_smx:INFO: Total # of broken channels: 0
13:34:49:ST3_smx:INFO: List of broken channels: []
13:34:49:ST3_smx:INFO: Total # of broken channels: 0
13:34:49:ST3_smx:INFO: List of broken channels: []
13:34:50:ST3_smx:INFO: Configuring SMX FAST
13:34:52:ST3_smx:INFO: chip: 24-7 40.898880 C 1147.806000 mV
13:34:52:ST3_smx:INFO: Electrons
13:34:52:ST3_smx:INFO: # loops 0
13:34:54:ST3_smx:INFO: # loops 1
13:34:56:ST3_smx:INFO: # loops 2
13:34:57:ST3_smx:INFO: Total # of broken channels: 0
13:34:57:ST3_smx:INFO: List of broken channels: []
13:34:57:ST3_smx:INFO: Total # of broken channels: 0
13:34:57:ST3_smx:INFO: List of broken channels: []
13:34:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:34:59:febtest:INFO: 23-00 | XA-000-08-002-000-008-085-00 | 28.2 | 1183.3
13:34:59:febtest:INFO: 30-01 | XA-000-08-002-000-008-089-00 | 37.7 | 1147.8
13:34:59:febtest:INFO: 21-02 | XA-000-08-002-000-008-080-00 | 34.6 | 1171.5
13:34:59:febtest:INFO: 28-03 | XA-000-08-002-000-008-062-11 | 28.2 | 1183.3
13:34:59:febtest:INFO: 19-04 | XA-000-08-002-000-008-065-07 | 12.4 | 1253.7
13:35:00:febtest:INFO: 26-05 | XA-000-08-002-000-008-092-00 | 40.9 | 1147.8
13:35:00:febtest:INFO: 17-06 | XA-000-08-002-000-008-084-00 | 40.9 | 1147.8
13:35:00:febtest:INFO: 24-07 | XA-000-08-002-000-008-090-00 | 40.9 | 1147.8
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_03_12-13_33_39
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L7DL100122 M7DL1T1001221A2 62 A
FEB_SN : 2126
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4930', '1.849', '2.1680']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9800', '1.850', '0.3181']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9780', '1.850', '0.3181']