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FEB_2127 07.03.24 10:44:38
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10:44:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:44:38:ST3_Shared:INFO: FEB-Sensor
10:44:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:44:53:ST3_ModuleSelector:INFO: New Sensor ID: 0427
10:44:53:ST3_ModuleSelector:INFO: New Sensor ID: 04274
10:44:55:ST3_ModuleSelector:INFO: L5DL300117 M5DL3T3001173A2 124 C
10:44:55:ST3_ModuleSelector:INFO: 04274
10:44:56:febtest:INFO: Testing FEB with SN 2127
10:44:59:smx_tester:INFO: Scanning setup
10:44:59:elinks:INFO: Disabling clock on downlink 0
10:44:59:elinks:INFO: Disabling clock on downlink 1
10:44:59:elinks:INFO: Disabling clock on downlink 2
10:44:59:elinks:INFO: Disabling clock on downlink 3
10:44:59:elinks:INFO: Disabling clock on downlink 4
10:44:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:44:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:59:elinks:INFO: Disabling clock on downlink 0
10:44:59:elinks:INFO: Disabling clock on downlink 1
10:44:59:elinks:INFO: Disabling clock on downlink 2
10:44:59:elinks:INFO: Disabling clock on downlink 3
10:44:59:elinks:INFO: Disabling clock on downlink 4
10:44:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:44:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:59:elinks:INFO: Disabling clock on downlink 0
10:44:59:elinks:INFO: Disabling clock on downlink 1
10:44:59:elinks:INFO: Disabling clock on downlink 2
10:44:59:elinks:INFO: Disabling clock on downlink 3
10:44:59:elinks:INFO: Disabling clock on downlink 4
10:44:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:44:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:44:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:59:elinks:INFO: Disabling clock on downlink 0
10:44:59:elinks:INFO: Disabling clock on downlink 1
10:44:59:elinks:INFO: Disabling clock on downlink 2
10:44:59:elinks:INFO: Disabling clock on downlink 3
10:44:59:elinks:INFO: Disabling clock on downlink 4
10:44:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:44:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:59:elinks:INFO: Disabling clock on downlink 0
10:44:59:elinks:INFO: Disabling clock on downlink 1
10:44:59:elinks:INFO: Disabling clock on downlink 2
10:44:59:elinks:INFO: Disabling clock on downlink 3
10:44:59:elinks:INFO: Disabling clock on downlink 4
10:44:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:44:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:44:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:44:59:setup_element:INFO: Scanning clock phase
10:44:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:45:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:45:00:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:45:00:setup_element:INFO: Eye window for uplink 16: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:45:00:setup_element:INFO: Eye window for uplink 17: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:45:00:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:45:00:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:45:00:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:45:00:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:45:00:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:45:00:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:45:00:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:45:00:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:45:00:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:45:00:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:45:00:setup_element:INFO: Eye window for uplink 28: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:45:00:setup_element:INFO: Eye window for uplink 29: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:45:00:setup_element:INFO: Eye window for uplink 30: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:45:00:setup_element:INFO: Eye window for uplink 31: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:45:00:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2
10:45:00:setup_element:INFO: Scanning data phases
10:45:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:45:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:45:05:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:45:05:setup_element:INFO: Eye window for uplink 16: XXXX__________________________________XX
Data delay found: 20
10:45:06:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
10:45:06:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
10:45:06:setup_element:INFO: Eye window for uplink 19: __________________________________XXXX__
Data delay found: 15
10:45:06:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXX_
Data delay found: 16
10:45:06:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
10:45:06:setup_element:INFO: Eye window for uplink 22: _________________________________XXXXX__
Data delay found: 15
10:45:06:setup_element:INFO: Eye window for uplink 23: _______________________________XXXXX____
Data delay found: 13
10:45:06:setup_element:INFO: Eye window for uplink 24: _XXXXXX_________________________________
Data delay found: 23
10:45:06:setup_element:INFO: Eye window for uplink 25: ______XXXXX_____________________________
Data delay found: 28
10:45:06:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
10:45:06:setup_element:INFO: Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
10:45:06:setup_element:INFO: Eye window for uplink 28: ____________XXXXXXX_____________________
Data delay found: 35
10:45:06:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXX___________________
Data delay found: 37
10:45:06:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
10:45:06:setup_element:INFO: Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
10:45:06:setup_element:INFO: Setting the data phase to 20 for uplink 16
10:45:06:setup_element:INFO: Setting the data phase to 16 for uplink 17
10:45:06:setup_element:INFO: Setting the data phase to 18 for uplink 18
10:45:06:setup_element:INFO: Setting the data phase to 15 for uplink 19
10:45:06:setup_element:INFO: Setting the data phase to 16 for uplink 20
10:45:06:setup_element:INFO: Setting the data phase to 15 for uplink 21
10:45:06:setup_element:INFO: Setting the data phase to 15 for uplink 22
10:45:06:setup_element:INFO: Setting the data phase to 13 for uplink 23
10:45:06:setup_element:INFO: Setting the data phase to 23 for uplink 24
10:45:06:setup_element:INFO: Setting the data phase to 28 for uplink 25
10:45:06:setup_element:INFO: Setting the data phase to 28 for uplink 26
10:45:06:setup_element:INFO: Setting the data phase to 31 for uplink 27
10:45:06:setup_element:INFO: Setting the data phase to 35 for uplink 28
10:45:06:setup_element:INFO: Setting the data phase to 37 for uplink 29
10:45:06:setup_element:INFO: Setting the data phase to 37 for uplink 30
10:45:06:setup_element:INFO: Setting the data phase to 35 for uplink 31
10:45:06:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 16: _________________________________________________________________________XXXXXXX
Uplink 17: _________________________________________________________________________XXXXXXX
Uplink 18: _______________________________________________________________________XXXXXXXXX
Uplink 19: _______________________________________________________________________XXXXXXXXX
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: _______________________________________________________________________XXXXXXXX_
Uplink 23: _______________________________________________________________________XXXXXXXX_
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: _______________________________________________________________________XXXXXXX__
Uplink 27: _______________________________________________________________________XXXXXXX__
Uplink 28: X_______________________________________________________________________XXXXXXXX
Uplink 29: X_______________________________________________________________________XXXXXXXX
Uplink 30: X_______________________________________________________________________XXXXXXXX
Uplink 31: X_______________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 17:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 20:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 21:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 22:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 23:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 24:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 25:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 35
Window Length: 33
Eye Window: ____________XXXXXXX_____________________
Uplink 29:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
]
10:45:06:setup_element:INFO: Beginning SMX ASICs map scan
10:45:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:45:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:45:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:45:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:45:06:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:45:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:45:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:45:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:45:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:45:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:45:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:45:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:45:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:45:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:45:07:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:45:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:45:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:45:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:45:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:45:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:45:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:45:08:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 16: _________________________________________________________________________XXXXXXX
Uplink 17: _________________________________________________________________________XXXXXXX
Uplink 18: _______________________________________________________________________XXXXXXXXX
Uplink 19: _______________________________________________________________________XXXXXXXXX
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: _______________________________________________________________________XXXXXXXX_
Uplink 23: _______________________________________________________________________XXXXXXXX_
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: _______________________________________________________________________XXXXXXX__
Uplink 27: _______________________________________________________________________XXXXXXX__
Uplink 28: X_______________________________________________________________________XXXXXXXX
Uplink 29: X_______________________________________________________________________XXXXXXXX
Uplink 30: X_______________________________________________________________________XXXXXXXX
Uplink 31: X_______________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 17:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 20:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 21:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 22:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 23:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 24:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 25:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 35
Window Length: 33
Eye Window: ____________XXXXXXX_____________________
Uplink 29:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
10:45:08:setup_element:INFO: Performing Elink synchronization
10:45:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:45:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:45:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:45:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:45:09:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:45:09:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:45:09:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
10:45:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:45:10:febtest:INFO: 23-00 | XA-000-08-002-000-004-218-00 | 12.4 | 1247.9
10:45:11:febtest:INFO: 30-01 | XA-000-08-002-000-002-062-04 | 47.3 | 1124.0
10:45:11:febtest:INFO: 21-02 | XA-000-08-002-000-004-216-00 | 25.1 | 1206.9
10:45:11:febtest:INFO: 28-03 | XA-000-08-002-000-000-253-08 | 37.7 | 1159.7
10:45:11:febtest:INFO: 19-04 | XA-000-08-002-000-004-208-00 | 21.9 | 1206.9
10:45:12:febtest:INFO: 26-05 | XA-000-08-002-000-004-219-00 | 15.6 | 1230.3
10:45:12:febtest:INFO: 17-06 | XA-000-08-002-000-004-065-13 | 25.1 | 1201.0
10:45:12:febtest:INFO: 24-07 | XA-000-08-002-000-004-215-00 | 31.4 | 1177.4
10:45:13:ST3_smx:INFO: Configuring SMX FAST
10:45:15:ST3_smx:INFO: chip: 23-0 15.590880 C 1236.187875 mV
10:45:15:ST3_smx:INFO: Electrons
10:45:15:ST3_smx:INFO: # loops 0
10:45:16:ST3_smx:INFO: # loops 1
10:45:18:ST3_smx:INFO: # loops 2
10:45:19:ST3_smx:INFO: # loops 3
10:45:21:ST3_smx:INFO: # loops 4
10:45:23:ST3_smx:INFO: Total # of broken channels: 0
10:45:23:ST3_smx:INFO: List of broken channels: []
10:45:23:ST3_smx:INFO: Total # of broken channels: 0
10:45:23:ST3_smx:INFO: List of broken channels: []
10:45:24:ST3_smx:INFO: Configuring SMX FAST
10:45:26:ST3_smx:INFO: chip: 30-1 40.898880 C 1141.874115 mV
10:45:26:ST3_smx:INFO: Electrons
10:45:26:ST3_smx:INFO: # loops 0
10:45:27:ST3_smx:INFO: # loops 1
10:45:29:ST3_smx:INFO: # loops 2
10:45:30:ST3_smx:INFO: # loops 3
10:45:32:ST3_smx:INFO: # loops 4
10:45:34:ST3_smx:INFO: Total # of broken channels: 0
10:45:34:ST3_smx:INFO: List of broken channels: []
10:45:34:ST3_smx:INFO: Total # of broken channels: 0
10:45:34:ST3_smx:INFO: List of broken channels: []
10:45:35:ST3_smx:INFO: Configuring SMX FAST
10:45:36:ST3_smx:INFO: chip: 21-2 18.745682 C 1230.330540 mV
10:45:36:ST3_smx:INFO: Electrons
10:45:36:ST3_smx:INFO: # loops 0
10:45:38:ST3_smx:INFO: # loops 1
10:45:40:ST3_smx:INFO: # loops 2
10:45:41:ST3_smx:INFO: # loops 3
10:45:43:ST3_smx:INFO: # loops 4
10:45:44:ST3_smx:INFO: Total # of broken channels: 0
10:45:44:ST3_smx:INFO: List of broken channels: []
10:45:44:ST3_smx:INFO: Total # of broken channels: 0
10:45:44:ST3_smx:INFO: List of broken channels: []
10:45:45:ST3_smx:INFO: Configuring SMX FAST
10:45:47:ST3_smx:INFO: chip: 28-3 40.898880 C 1153.732915 mV
10:45:47:ST3_smx:INFO: Electrons
10:45:47:ST3_smx:INFO: # loops 0
10:45:49:ST3_smx:INFO: # loops 1
10:45:51:ST3_smx:INFO: # loops 2
10:45:52:ST3_smx:INFO: # loops 3
10:45:54:ST3_smx:INFO: # loops 4
10:45:55:ST3_smx:INFO: Total # of broken channels: 0
10:45:55:ST3_smx:INFO: List of broken channels: []
10:45:55:ST3_smx:INFO: Total # of broken channels: 1
10:45:55:ST3_smx:INFO: List of broken channels: [76]
10:45:56:ST3_smx:INFO: Configuring SMX FAST
10:45:58:ST3_smx:INFO: chip: 19-4 28.225000 C 1200.969315 mV
10:45:58:ST3_smx:INFO: Electrons
10:45:58:ST3_smx:INFO: # loops 0
10:46:00:ST3_smx:INFO: # loops 1
10:46:01:ST3_smx:INFO: # loops 2
10:46:03:ST3_smx:INFO: # loops 3
10:46:05:ST3_smx:INFO: # loops 4
10:46:06:ST3_smx:INFO: Total # of broken channels: 0
10:46:06:ST3_smx:INFO: List of broken channels: []
10:46:06:ST3_smx:INFO: Total # of broken channels: 0
10:46:06:ST3_smx:INFO: List of broken channels: []
10:46:07:ST3_smx:INFO: Configuring SMX FAST
10:46:09:ST3_smx:INFO: chip: 26-5 25.062742 C 1206.851500 mV
10:46:09:ST3_smx:INFO: Electrons
10:46:09:ST3_smx:INFO: # loops 0
10:46:11:ST3_smx:INFO: # loops 1
10:46:12:ST3_smx:INFO: # loops 2
10:46:14:ST3_smx:INFO: # loops 3
10:46:15:ST3_smx:INFO: # loops 4
10:46:17:ST3_smx:INFO: Total # of broken channels: 0
10:46:17:ST3_smx:INFO: List of broken channels: []
10:46:17:ST3_smx:INFO: Total # of broken channels: 0
10:46:17:ST3_smx:INFO: List of broken channels: []
10:46:18:ST3_smx:INFO: Configuring SMX FAST
10:46:20:ST3_smx:INFO: chip: 17-6 31.389742 C 1189.190035 mV
10:46:20:ST3_smx:INFO: Electrons
10:46:20:ST3_smx:INFO: # loops 0
10:46:22:ST3_smx:INFO: # loops 1
10:46:23:ST3_smx:INFO: # loops 2
10:46:25:ST3_smx:INFO: # loops 3
10:46:26:ST3_smx:INFO: # loops 4
10:46:28:ST3_smx:INFO: Total # of broken channels: 0
10:46:28:ST3_smx:INFO: List of broken channels: []
10:46:28:ST3_smx:INFO: Total # of broken channels: 0
10:46:28:ST3_smx:INFO: List of broken channels: []
10:46:29:ST3_smx:INFO: Configuring SMX FAST
10:46:31:ST3_smx:INFO: chip: 24-7 28.225000 C 1195.082160 mV
10:46:31:ST3_smx:INFO: Electrons
10:46:31:ST3_smx:INFO: # loops 0
10:46:32:ST3_smx:INFO: # loops 1
10:46:34:ST3_smx:INFO: # loops 2
10:46:35:ST3_smx:INFO: # loops 3
10:46:37:ST3_smx:INFO: # loops 4
10:46:39:ST3_smx:INFO: Total # of broken channels: 0
10:46:39:ST3_smx:INFO: List of broken channels: []
10:46:39:ST3_smx:INFO: Total # of broken channels: 0
10:46:39:ST3_smx:INFO: List of broken channels: []
10:46:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:46:40:febtest:INFO: 23-00 | XA-000-08-002-000-004-218-00 | 15.6 | 1242.0
10:46:40:febtest:INFO: 30-01 | XA-000-08-002-000-002-062-04 | 40.9 | 1141.9
10:46:40:febtest:INFO: 21-02 | XA-000-08-002-000-004-216-00 | 18.7 | 1230.3
10:46:41:febtest:INFO: 28-03 | XA-000-08-002-000-000-253-08 | 40.9 | 1153.7
10:46:41:febtest:INFO: 19-04 | XA-000-08-002-000-004-208-00 | 28.2 | 1201.0
10:46:41:febtest:INFO: 26-05 | XA-000-08-002-000-004-219-00 | 25.1 | 1206.9
10:46:41:febtest:INFO: 17-06 | XA-000-08-002-000-004-065-13 | 31.4 | 1189.2
10:46:42:febtest:INFO: 24-07 | XA-000-08-002-000-004-215-00 | 28.2 | 1195.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_03_07-10_44_38
OPERATOR : Kerstin S.; Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5DL300117 M5DL3T3001173A2 124 C
FEB_SN : 2127
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
SENSOR_ID: 04274
MODULE_NAME: L5DL300117 M5DL3T3001173A2 124 C
MODULE_TYPE:
MODULE_LADDER:
MODULE_MODULE:
MODULE_SIZE: 0
MODULE_GRADE:
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8880', '1.850', '0.4860']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9660', '1.850', '0.3250']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9660', '1.850', '0.3179']