FEB_2128    22.03.24 14:54:51

TextEdit.txt
            14:54:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:54:51:ST3_Shared:INFO:	                       FEB-Microcable                       
14:54:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:54:51:febtest:INFO:	Testing FEB with SN 2128
14:54:54:smx_tester:INFO:	Scanning setup
14:54:54:elinks:INFO:	Disabling clock on downlink 0
14:54:54:elinks:INFO:	Disabling clock on downlink 1
14:54:54:elinks:INFO:	Disabling clock on downlink 2
14:54:54:elinks:INFO:	Disabling clock on downlink 3
14:54:54:elinks:INFO:	Disabling clock on downlink 4
14:54:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:54:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:54:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:54:54:elinks:INFO:	Disabling clock on downlink 0
14:54:54:elinks:INFO:	Disabling clock on downlink 1
14:54:54:elinks:INFO:	Disabling clock on downlink 2
14:54:54:elinks:INFO:	Disabling clock on downlink 3
14:54:54:elinks:INFO:	Disabling clock on downlink 4
14:54:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:54:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:54:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:54:54:elinks:INFO:	Disabling clock on downlink 0
14:54:54:elinks:INFO:	Disabling clock on downlink 1
14:54:54:elinks:INFO:	Disabling clock on downlink 2
14:54:54:elinks:INFO:	Disabling clock on downlink 3
14:54:54:elinks:INFO:	Disabling clock on downlink 4
14:54:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:54:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:54:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:54:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:54:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:54:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:54:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:54:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:54:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:54:54:elinks:INFO:	Disabling clock on downlink 0
14:54:54:elinks:INFO:	Disabling clock on downlink 1
14:54:54:elinks:INFO:	Disabling clock on downlink 2
14:54:54:elinks:INFO:	Disabling clock on downlink 3
14:54:54:elinks:INFO:	Disabling clock on downlink 4
14:54:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:54:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:54:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:54:54:elinks:INFO:	Disabling clock on downlink 0
14:54:55:elinks:INFO:	Disabling clock on downlink 1
14:54:55:elinks:INFO:	Disabling clock on downlink 2
14:54:55:elinks:INFO:	Disabling clock on downlink 3
14:54:55:elinks:INFO:	Disabling clock on downlink 4
14:54:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:54:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:54:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:54:55:setup_element:INFO:	Scanning clock phase
14:54:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:54:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:54:55:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:54:55:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:54:55:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:54:55:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
14:54:55:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
14:54:55:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
14:54:55:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
14:54:55:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 2
14:54:55:setup_element:INFO:	Scanning data phases
14:54:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:54:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:55:00:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:55:00:setup_element:INFO:	Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
14:55:00:setup_element:INFO:	Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
14:55:00:setup_element:INFO:	Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
14:55:00:setup_element:INFO:	Eye window for uplink 27: __________XXXXX_________________________
Data delay found: 32
14:55:00:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
14:55:00:setup_element:INFO:	Eye window for uplink 31: _______________XXXX_X___________________
Data delay found: 37
14:55:00:setup_element:INFO:	Setting the data phase to 31 for uplink 24
14:55:00:setup_element:INFO:	Setting the data phase to 33 for uplink 25
14:55:00:setup_element:INFO:	Setting the data phase to 28 for uplink 26
14:55:00:setup_element:INFO:	Setting the data phase to 32 for uplink 27
14:55:00:setup_element:INFO:	Setting the data phase to 36 for uplink 30
14:55:00:setup_element:INFO:	Setting the data phase to 37 for uplink 31
14:55:00:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 24: ___________________________________________________________________XXXXXXXXX____
      Uplink 25: ___________________________________________________________________XXXXXXXXX____
      Uplink 26: __________________________________________________________________XXXXXXX_______
      Uplink 27: __________________________________________________________________XXXXXXX_______
      Uplink 30: ___________________________________________________________________XXXXXXXX_____
      Uplink 31: ___________________________________________________________________XXXXXXXX_____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 25:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 30:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 31:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXX_X___________________
]
14:55:00:setup_element:INFO:	Beginning SMX ASICs map scan
14:55:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:55:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:55:00:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:55:00:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:55:00:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 30, 31]
14:55:00:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:55:01:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:55:01:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:55:01:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:55:02:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:55:02:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:55:03:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 24: ___________________________________________________________________XXXXXXXXX____
      Uplink 25: ___________________________________________________________________XXXXXXXXX____
      Uplink 26: __________________________________________________________________XXXXXXX_______
      Uplink 27: __________________________________________________________________XXXXXXX_______
      Uplink 30: ___________________________________________________________________XXXXXXXX_____
      Uplink 31: ___________________________________________________________________XXXXXXXX_____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 25:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 30:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 31:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXX_X___________________

14:55:03:setup_element:INFO:	Performing Elink synchronization
14:55:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:55:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:55:03:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:55:03:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:55:03:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:55:03:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 30, 31]
14:55:03:ST3_emu:INFO:	Number of chips: 3
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
14:55:04:febtest:ERROR:	HW addres 1 != 0
14:56:48:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:56:48:febtest:INFO:	30-01 | XA-000-08-002-001-007-081-12 |  50.4 | 1147.8
14:56:48:febtest:INFO:	26-05 | XA-000-08-002-001-007-066-11 |  44.1 | 1159.7
14:56:49:febtest:INFO:	24-07 | XA-000-08-002-001-007-144-03 |  44.1 | 1147.8
14:56:49:ST3_smx:INFO:	Configuring SMX FAST
14:56:51:ST3_smx:INFO:	chip: 30-1 	 56.797143 C 	 1124.048640 mV
14:56:51:ST3_smx:INFO:		Electrons
14:56:51:ST3_smx:INFO:	# loops 0
14:56:52:ST3_smx:INFO:	# loops 1
14:56:54:ST3_smx:INFO:	# loops 2
14:56:56:ST3_smx:INFO:	Total # of broken channels: 0
14:56:56:ST3_smx:INFO:	List of broken channels: []
14:56:56:ST3_smx:INFO:	Total # of broken channels: 0
14:56:56:ST3_smx:INFO:	List of broken channels: []
14:56:57:ST3_smx:INFO:	Configuring SMX FAST
14:56:59:ST3_smx:INFO:	chip: 26-5 	 44.073563 C 	 1165.571835 mV
14:56:59:ST3_smx:INFO:		Electrons
14:56:59:ST3_smx:INFO:	# loops 0
14:57:00:ST3_smx:INFO:	# loops 1
14:57:02:ST3_smx:INFO:	# loops 2
14:57:04:ST3_smx:INFO:	Total # of broken channels: 0
14:57:04:ST3_smx:INFO:	List of broken channels: []
14:57:04:ST3_smx:INFO:	Total # of broken channels: 0
14:57:04:ST3_smx:INFO:	List of broken channels: []
14:57:05:ST3_smx:INFO:	Configuring SMX FAST
14:57:07:ST3_smx:INFO:	chip: 24-7 	 40.898880 C 	 1171.483840 mV
14:57:07:ST3_smx:INFO:		Electrons
14:57:07:ST3_smx:INFO:	# loops 0
14:57:08:ST3_smx:INFO:	# loops 1
14:57:10:ST3_smx:INFO:	# loops 2
14:57:12:ST3_smx:INFO:	Total # of broken channels: 0
14:57:12:ST3_smx:INFO:	List of broken channels: []
14:57:12:ST3_smx:INFO:	Total # of broken channels: 0
14:57:12:ST3_smx:INFO:	List of broken channels: []
14:57:13:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:57:13:febtest:INFO:	30-01 | XA-000-08-002-001-007-081-12 |  56.8 | 1124.0
14:57:13:febtest:INFO:	26-05 | XA-000-08-002-001-007-066-11 |  44.1 | 1165.6
14:57:13:febtest:INFO:	24-07 | XA-000-08-002-001-007-144-03 |  40.9 | 1171.5
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_03_22-14_54_51
OPERATOR  : Carmen S.; Oleksandr S.; Irakli K.; Ralf K.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 2128
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9836', '1.852', '1.1420']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9481', '1.850', '0.3248']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9437', '1.850', '0.3247']