
FEB_2128 11.04.24 12:49:54
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12:49:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:49:54:ST3_Shared:INFO: FEB-Microcable 12:49:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:49:54:febtest:INFO: Testing FEB with SN 2128 12:49:57:smx_tester:INFO: Scanning setup 12:49:57:elinks:INFO: Disabling clock on downlink 0 12:49:57:elinks:INFO: Disabling clock on downlink 1 12:49:57:elinks:INFO: Disabling clock on downlink 2 12:49:57:elinks:INFO: Disabling clock on downlink 3 12:49:57:elinks:INFO: Disabling clock on downlink 4 12:49:57:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:49:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:57:elinks:INFO: Disabling clock on downlink 0 12:49:57:elinks:INFO: Disabling clock on downlink 1 12:49:57:elinks:INFO: Disabling clock on downlink 2 12:49:57:elinks:INFO: Disabling clock on downlink 3 12:49:57:elinks:INFO: Disabling clock on downlink 4 12:49:57:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:49:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:57:elinks:INFO: Disabling clock on downlink 0 12:49:57:elinks:INFO: Disabling clock on downlink 1 12:49:57:elinks:INFO: Disabling clock on downlink 2 12:49:57:elinks:INFO: Disabling clock on downlink 3 12:49:57:elinks:INFO: Disabling clock on downlink 4 12:49:57:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 12:49:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 12:49:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:57:elinks:INFO: Disabling clock on downlink 0 12:49:57:elinks:INFO: Disabling clock on downlink 1 12:49:57:elinks:INFO: Disabling clock on downlink 2 12:49:57:elinks:INFO: Disabling clock on downlink 3 12:49:57:elinks:INFO: Disabling clock on downlink 4 12:49:57:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:49:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:57:elinks:INFO: Disabling clock on downlink 0 12:49:57:elinks:INFO: Disabling clock on downlink 1 12:49:57:elinks:INFO: Disabling clock on downlink 2 12:49:57:elinks:INFO: Disabling clock on downlink 3 12:49:57:elinks:INFO: Disabling clock on downlink 4 12:49:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:49:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:49:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:49:58:setup_element:INFO: Scanning clock phase 12:49:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:49:58:setup_element:INFO: Clock phase scan results for group 0, downlink 2 12:49:58:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 12:49:58:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 12:49:58:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:49:58:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:49:58:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:49:58:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:49:58:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 12:49:58:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 12:49:58:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 12:49:58:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 12:49:58:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________ Clock Delay: 40 12:49:58:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________ Clock Delay: 40 12:49:58:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 12:49:58:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 12:49:58:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:49:58:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 12:49:58:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 12:49:58:setup_element:INFO: Scanning data phases 12:49:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:50:04:setup_element:INFO: Data phase scan results for group 0, downlink 2 12:50:04:setup_element:INFO: Eye window for uplink 16: XX__________________________________XXXX Data delay found: 18 12:50:04:setup_element:INFO: Eye window for uplink 17: ___________________________________XXXX_ Data delay found: 16 12:50:04:setup_element:INFO: Eye window for uplink 18: XXXXX__________________________________X Data delay found: 21 12:50:04:setup_element:INFO: Eye window for uplink 19: XXX__________________________________XXX Data delay found: 19 12:50:04:setup_element:INFO: Eye window for uplink 20: XX___________________________________XXX Data delay found: 19 12:50:04:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX Data delay found: 17 12:50:04:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX Data delay found: 17 12:50:04:setup_element:INFO: Eye window for uplink 23: XXXXX____________________________XXXXXXX Data delay found: 18 12:50:04:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________ Data delay found: 30 12:50:04:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________ Data delay found: 32 12:50:04:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________ Data delay found: 28 12:50:04:setup_element:INFO: Eye window for uplink 27: _________XXXXX__________________________ Data delay found: 31 12:50:04:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________ Data delay found: 35 12:50:04:setup_element:INFO: Eye window for uplink 29: _______________XXXXX____________________ Data delay found: 37 12:50:04:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________ Data delay found: 37 12:50:04:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________ Data delay found: 37 12:50:04:setup_element:INFO: Setting the data phase to 18 for uplink 16 12:50:04:setup_element:INFO: Setting the data phase to 16 for uplink 17 12:50:04:setup_element:INFO: Setting the data phase to 21 for uplink 18 12:50:04:setup_element:INFO: Setting the data phase to 19 for uplink 19 12:50:04:setup_element:INFO: Setting the data phase to 19 for uplink 20 12:50:04:setup_element:INFO: Setting the data phase to 17 for uplink 21 12:50:04:setup_element:INFO: Setting the data phase to 17 for uplink 22 12:50:04:setup_element:INFO: Setting the data phase to 18 for uplink 23 12:50:04:setup_element:INFO: Setting the data phase to 30 for uplink 24 12:50:04:setup_element:INFO: Setting the data phase to 32 for uplink 25 12:50:04:setup_element:INFO: Setting the data phase to 28 for uplink 26 12:50:04:setup_element:INFO: Setting the data phase to 31 for uplink 27 12:50:04:setup_element:INFO: Setting the data phase to 35 for uplink 28 12:50:04:setup_element:INFO: Setting the data phase to 37 for uplink 29 12:50:04:setup_element:INFO: Setting the data phase to 37 for uplink 30 12:50:04:setup_element:INFO: Setting the data phase to 37 for uplink 31 12:50:04:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 16: ____________________________________________________________________XXXXXXXX____ Uplink 17: ____________________________________________________________________XXXXXXXX____ Uplink 18: _____________________________________________________________________XXXXXXXXX__ Uplink 19: _____________________________________________________________________XXXXXXXXX__ Uplink 20: _____________________________________________________________________XXXXXXXX___ Uplink 21: _____________________________________________________________________XXXXXXXX___ Uplink 22: ____________________________________________________________________XXXXXXX_____ Uplink 23: ____________________________________________________________________XXXXXXX_____ Uplink 24: ____________________________________________________________________XXXXXXXXX___ Uplink 25: ____________________________________________________________________XXXXXXXXX___ Uplink 26: ________________________________________________________________________________ Uplink 27: ________________________________________________________________________________ Uplink 28: ____________________________________________________________________XXXXXXXX____ Uplink 29: ____________________________________________________________________XXXXXXXX____ Uplink 30: _____________________________________________________________________XXXXXXXX___ Uplink 31: _____________________________________________________________________XXXXXXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 17: Optimal Phase: 16 Window Length: 36 Eye Window: ___________________________________XXXX_ Uplink 18: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 19: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 20: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 21: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 23: Optimal Phase: 18 Window Length: 28 Eye Window: XXXXX____________________________XXXXXXX Uplink 24: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 25: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 26: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 27: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 28: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 29: Optimal Phase: 37 Window Length: 35 Eye Window: _______________XXXXX____________________ Uplink 30: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 31: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ ] 12:50:04:setup_element:INFO: Beginning SMX ASICs map scan 12:50:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:50:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:50:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:50:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:50:04:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 12:50:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 12:50:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 12:50:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 12:50:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 12:50:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 12:50:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 12:50:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 12:50:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 12:50:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 12:50:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 12:50:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 12:50:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 12:50:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 12:50:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 12:50:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 12:50:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 12:50:06:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 70 Eye Windows: Uplink 16: ____________________________________________________________________XXXXXXXX____ Uplink 17: ____________________________________________________________________XXXXXXXX____ Uplink 18: _____________________________________________________________________XXXXXXXXX__ Uplink 19: _____________________________________________________________________XXXXXXXXX__ Uplink 20: _____________________________________________________________________XXXXXXXX___ Uplink 21: _____________________________________________________________________XXXXXXXX___ Uplink 22: ____________________________________________________________________XXXXXXX_____ Uplink 23: ____________________________________________________________________XXXXXXX_____ Uplink 24: ____________________________________________________________________XXXXXXXXX___ Uplink 25: ____________________________________________________________________XXXXXXXXX___ Uplink 26: ________________________________________________________________________________ Uplink 27: ________________________________________________________________________________ Uplink 28: ____________________________________________________________________XXXXXXXX____ Uplink 29: ____________________________________________________________________XXXXXXXX____ Uplink 30: _____________________________________________________________________XXXXXXXX___ Uplink 31: _____________________________________________________________________XXXXXXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 17: Optimal Phase: 16 Window Length: 36 Eye Window: ___________________________________XXXX_ Uplink 18: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 19: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 20: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 21: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 23: Optimal Phase: 18 Window Length: 28 Eye Window: XXXXX____________________________XXXXXXX Uplink 24: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 25: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 26: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 27: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 28: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 29: Optimal Phase: 37 Window Length: 35 Eye Window: _______________XXXXX____________________ Uplink 30: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 31: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ 12:50:06:setup_element:INFO: Performing Elink synchronization 12:50:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:50:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:50:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:50:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:50:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 12:50:07:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 12:50:07:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] FEB type: B FEB_A: 0 FEB_B: 1 12:50:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:50:08:febtest:INFO: 23-00 | XA-000-08-002-001-007-153-03 | 40.9 | 1135.9 12:50:09:febtest:INFO: 30-01 | XA-000-08-002-001-007-081-12 | 47.3 | 1118.1 12:50:09:febtest:INFO: 21-02 | XA-000-08-002-001-007-149-03 | 18.7 | 1212.7 12:50:09:febtest:INFO: 28-03 | XA-000-08-002-002-007-167-11 | 25.1 | 1189.2 12:50:09:febtest:INFO: 19-04 | XA-000-08-002-001-007-137-04 | 15.6 | 1224.5 12:50:10:febtest:INFO: 26-05 | XA-000-08-002-001-007-066-11 | 28.2 | 1177.4 12:50:10:febtest:INFO: 17-06 | XA-000-08-002-001-007-075-11 | 56.8 | 1100.2 12:50:10:febtest:INFO: 24-07 | XA-000-08-002-001-007-144-03 | 37.7 | 1147.8 12:50:10:ST3_smx:INFO: Configuring SMX FAST 12:50:12:ST3_smx:INFO: chip: 23-0 40.898880 C 1135.937260 mV 12:50:12:ST3_smx:INFO: Electrons 12:50:12:ST3_smx:INFO: # loops 0 12:50:14:ST3_smx:INFO: # loops 1 12:50:15:ST3_smx:INFO: # loops 2 12:50:17:ST3_smx:INFO: Total # of broken channels: 0 12:50:17:ST3_smx:INFO: List of broken channels: [] 12:50:17:ST3_smx:INFO: Total # of broken channels: 0 12:50:17:ST3_smx:INFO: List of broken channels: [] 12:50:18:ST3_smx:INFO: Configuring SMX FAST 12:50:20:ST3_smx:INFO: chip: 30-1 44.073563 C 1118.096875 mV 12:50:20:ST3_smx:INFO: Electrons 12:50:20:ST3_smx:INFO: # loops 0 12:50:22:ST3_smx:INFO: # loops 1 12:50:23:ST3_smx:INFO: # loops 2 12:50:25:ST3_smx:INFO: Total # of broken channels: 0 12:50:25:ST3_smx:INFO: List of broken channels: [] 12:50:25:ST3_smx:INFO: Total # of broken channels: 0 12:50:25:ST3_smx:INFO: List of broken channels: [] 12:50:26:ST3_smx:INFO: Configuring SMX FAST 12:50:28:ST3_smx:INFO: chip: 21-2 34.556970 C 1165.571835 mV 12:50:28:ST3_smx:INFO: Electrons 12:50:28:ST3_smx:INFO: # loops 0 12:50:30:ST3_smx:INFO: # loops 1 12:50:31:ST3_smx:INFO: # loops 2 12:50:33:ST3_smx:INFO: Total # of broken channels: 0 12:50:33:ST3_smx:INFO: List of broken channels: [] 12:50:33:ST3_smx:INFO: Total # of broken channels: 0 12:50:33:ST3_smx:INFO: List of broken channels: [] 12:50:34:ST3_smx:INFO: Configuring SMX FAST 12:50:36:ST3_smx:INFO: chip: 28-3 25.062742 C 1183.292940 mV 12:50:36:ST3_smx:INFO: Electrons 12:50:36:ST3_smx:INFO: # loops 0 12:50:37:ST3_smx:INFO: # loops 1 12:50:39:ST3_smx:INFO: # loops 2 12:50:41:ST3_smx:INFO: Total # of broken channels: 0 12:50:41:ST3_smx:INFO: List of broken channels: [] 12:50:41:ST3_smx:INFO: Total # of broken channels: 0 12:50:41:ST3_smx:INFO: List of broken channels: [] 12:50:42:ST3_smx:INFO: Configuring SMX FAST 12:50:44:ST3_smx:INFO: chip: 19-4 28.225000 C 1195.082160 mV 12:50:44:ST3_smx:INFO: Electrons 12:50:44:ST3_smx:INFO: # loops 0 12:50:45:ST3_smx:INFO: # loops 1 12:50:47:ST3_smx:INFO: # loops 2 12:50:49:ST3_smx:INFO: Total # of broken channels: 0 12:50:49:ST3_smx:INFO: List of broken channels: [] 12:50:49:ST3_smx:INFO: Total # of broken channels: 0 12:50:49:ST3_smx:INFO: List of broken channels: [] 12:50:50:ST3_smx:INFO: Configuring SMX FAST 12:50:51:ST3_smx:INFO: chip: 26-5 37.726682 C 1153.732915 mV 12:50:51:ST3_smx:INFO: Electrons 12:50:51:ST3_smx:INFO: # loops 0 12:50:53:ST3_smx:INFO: # loops 1 12:50:55:ST3_smx:INFO: # loops 2 12:50:56:ST3_smx:INFO: Total # of broken channels: 0 12:50:56:ST3_smx:INFO: List of broken channels: [] 12:50:56:ST3_smx:INFO: Total # of broken channels: 0 12:50:56:ST3_smx:INFO: List of broken channels: [] 12:50:57:ST3_smx:INFO: Configuring SMX FAST 12:50:59:ST3_smx:INFO: chip: 17-6 53.612520 C 1112.140140 mV 12:50:59:ST3_smx:INFO: Electrons 12:50:59:ST3_smx:INFO: # loops 0 12:51:01:ST3_smx:INFO: # loops 1 12:51:02:ST3_smx:INFO: # loops 2 12:51:04:ST3_smx:INFO: Total # of broken channels: 0 12:51:04:ST3_smx:INFO: List of broken channels: [] 12:51:04:ST3_smx:INFO: Total # of broken channels: 0 12:51:04:ST3_smx:INFO: List of broken channels: [] 12:51:05:ST3_smx:INFO: Configuring SMX FAST 12:51:07:ST3_smx:INFO: chip: 24-7 31.389742 C 1171.483840 mV 12:51:07:ST3_smx:INFO: Electrons 12:51:07:ST3_smx:INFO: # loops 0 12:51:09:ST3_smx:INFO: # loops 1 12:51:10:ST3_smx:INFO: # loops 2 12:51:12:ST3_smx:INFO: Total # of broken channels: 0 12:51:12:ST3_smx:INFO: List of broken channels: [] 12:51:12:ST3_smx:INFO: Total # of broken channels: 0 12:51:12:ST3_smx:INFO: List of broken channels: [] 12:51:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:51:13:febtest:INFO: 23-00 | XA-000-08-002-001-007-153-03 | 44.1 | 1135.9 12:51:13:febtest:INFO: 30-01 | XA-000-08-002-001-007-081-12 | 47.3 | 1118.1 12:51:13:febtest:INFO: 21-02 | XA-000-08-002-001-007-149-03 | 34.6 | 1165.6 12:51:14:febtest:INFO: 28-03 | XA-000-08-002-002-007-167-11 | 25.1 | 1189.2 12:51:14:febtest:INFO: 19-04 | XA-000-08-002-001-007-137-04 | 28.2 | 1195.1 12:51:14:febtest:INFO: 26-05 | XA-000-08-002-001-007-066-11 | 37.7 | 1153.7 12:51:14:febtest:INFO: 17-06 | XA-000-08-002-001-007-075-11 | 56.8 | 1106.2 12:51:14:febtest:INFO: 24-07 | XA-000-08-002-001-007-144-03 | 31.4 | 1171.5 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_04_11-12_49_54 OPERATOR : Alois Alzheimer SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 2128 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 0 FEB_B : 1 --------------------------------------- --------------------------------------- VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9160', '1.852', '2.0780'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9890', '1.850', '0.3502'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9880', '1.850', '0.3222'] 12:51:19:ST3_Shared:INFO: Listo of operators:Robert V.;