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FEB_2130 13.03.24 09:37:32
Info
09:37:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:37:32:ST3_Shared:INFO: FEB-Sensor
09:37:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:37:44:ST3_ModuleSelector:INFO: L7DL100122 M7DL1T1001221A2 62 A
09:37:44:ST3_ModuleSelector:INFO: 25053
09:37:44:febtest:INFO: Testing FEB with SN 2130
09:37:47:smx_tester:INFO: Scanning setup
09:37:47:elinks:INFO: Disabling clock on downlink 0
09:37:47:elinks:INFO: Disabling clock on downlink 1
09:37:47:elinks:INFO: Disabling clock on downlink 2
09:37:47:elinks:INFO: Disabling clock on downlink 3
09:37:47:elinks:INFO: Disabling clock on downlink 4
09:37:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:37:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:37:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:37:47:elinks:INFO: Disabling clock on downlink 0
09:37:47:elinks:INFO: Disabling clock on downlink 1
09:37:47:elinks:INFO: Disabling clock on downlink 2
09:37:47:elinks:INFO: Disabling clock on downlink 3
09:37:47:elinks:INFO: Disabling clock on downlink 4
09:37:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:37:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:37:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:37:47:elinks:INFO: Disabling clock on downlink 0
09:37:47:elinks:INFO: Disabling clock on downlink 1
09:37:47:elinks:INFO: Disabling clock on downlink 2
09:37:47:elinks:INFO: Disabling clock on downlink 3
09:37:47:elinks:INFO: Disabling clock on downlink 4
09:37:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:37:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:37:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:37:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:37:47:elinks:INFO: Disabling clock on downlink 0
09:37:47:elinks:INFO: Disabling clock on downlink 1
09:37:47:elinks:INFO: Disabling clock on downlink 2
09:37:47:elinks:INFO: Disabling clock on downlink 3
09:37:47:elinks:INFO: Disabling clock on downlink 4
09:37:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:37:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:37:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:37:48:elinks:INFO: Disabling clock on downlink 0
09:37:48:elinks:INFO: Disabling clock on downlink 1
09:37:48:elinks:INFO: Disabling clock on downlink 2
09:37:48:elinks:INFO: Disabling clock on downlink 3
09:37:48:elinks:INFO: Disabling clock on downlink 4
09:37:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:37:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:37:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:37:48:setup_element:INFO: Scanning clock phase
09:37:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:37:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:37:48:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:37:48:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:37:48:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:37:48:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:37:48:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:37:48:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:37:48:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:37:48:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:37:48:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:37:48:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:37:48:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:37:48:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
09:37:48:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
09:37:48:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:37:48:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:37:48:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
09:37:48:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
09:37:48:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
09:37:48:setup_element:INFO: Scanning data phases
09:37:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:37:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:37:53:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:37:53:setup_element:INFO: Eye window for uplink 16: XXXX____________________________________
Data delay found: 21
09:37:53:setup_element:INFO: Eye window for uplink 17: XXX___________________________________XX
Data delay found: 20
09:37:53:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
09:37:53:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXXX
Data delay found: 17
09:37:53:setup_element:INFO: Eye window for uplink 20: XXXX__________________________________XX
Data delay found: 20
09:37:53:setup_element:INFO: Eye window for uplink 21: XXX__________________________________XXX
Data delay found: 19
09:37:53:setup_element:INFO: Eye window for uplink 22: X_________________________________XXXXXX
Data delay found: 17
09:37:53:setup_element:INFO: Eye window for uplink 23: XXXXX____________________________XXXXXXX
Data delay found: 18
09:37:53:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
09:37:53:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
09:37:53:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
09:37:53:setup_element:INFO: Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
09:37:53:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
09:37:53:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
09:37:53:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
09:37:53:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_X___________________
Data delay found: 37
09:37:53:setup_element:INFO: Setting the data phase to 21 for uplink 16
09:37:53:setup_element:INFO: Setting the data phase to 20 for uplink 17
09:37:53:setup_element:INFO: Setting the data phase to 19 for uplink 18
09:37:53:setup_element:INFO: Setting the data phase to 17 for uplink 19
09:37:53:setup_element:INFO: Setting the data phase to 20 for uplink 20
09:37:53:setup_element:INFO: Setting the data phase to 19 for uplink 21
09:37:53:setup_element:INFO: Setting the data phase to 17 for uplink 22
09:37:53:setup_element:INFO: Setting the data phase to 18 for uplink 23
09:37:53:setup_element:INFO: Setting the data phase to 28 for uplink 24
09:37:53:setup_element:INFO: Setting the data phase to 30 for uplink 25
09:37:53:setup_element:INFO: Setting the data phase to 28 for uplink 26
09:37:53:setup_element:INFO: Setting the data phase to 31 for uplink 27
09:37:53:setup_element:INFO: Setting the data phase to 35 for uplink 28
09:37:53:setup_element:INFO: Setting the data phase to 37 for uplink 29
09:37:53:setup_element:INFO: Setting the data phase to 36 for uplink 30
09:37:53:setup_element:INFO: Setting the data phase to 37 for uplink 31
09:37:53:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 69
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXX__
Uplink 17: ______________________________________________________________________XXXXXXXX__
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: ______________________________________________________________________XXXXXXXX__
Uplink 21: ______________________________________________________________________XXXXXXXX__
Uplink 22: ____________________________________________________________________XXXXXXXX____
Uplink 23: ____________________________________________________________________XXXXXXXX____
Uplink 24: ___________________________________________________________________XXXXXXXX_____
Uplink 25: ___________________________________________________________________XXXXXXXX_____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 36
Eye Window: XXXX____________________________________
Uplink 17:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 18:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 19:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 20:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 21:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 22:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 23:
Optimal Phase: 18
Window Length: 28
Eye Window: XXXXX____________________________XXXXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXX_X___________________
]
09:37:53:setup_element:INFO: Beginning SMX ASICs map scan
09:37:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:37:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:37:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:37:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:37:53:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:37:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:37:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:37:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:37:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:37:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:37:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:37:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:37:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:37:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:37:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:37:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:37:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:37:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:37:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:37:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:37:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:37:56:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 69
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXX__
Uplink 17: ______________________________________________________________________XXXXXXXX__
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: ______________________________________________________________________XXXXXXXX__
Uplink 21: ______________________________________________________________________XXXXXXXX__
Uplink 22: ____________________________________________________________________XXXXXXXX____
Uplink 23: ____________________________________________________________________XXXXXXXX____
Uplink 24: ___________________________________________________________________XXXXXXXX_____
Uplink 25: ___________________________________________________________________XXXXXXXX_____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 36
Eye Window: XXXX____________________________________
Uplink 17:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 18:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 19:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 20:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 21:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 22:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 23:
Optimal Phase: 18
Window Length: 28
Eye Window: XXXXX____________________________XXXXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXX_X___________________
09:37:56:setup_element:INFO: Performing Elink synchronization
09:37:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:37:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:37:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:37:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:37:56:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:37:56:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:37:56:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
09:37:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:37:58:febtest:INFO: 23-00 | XA-000-08-002-000-002-041-03 | 25.1 | 1195.1
09:37:58:febtest:INFO: 30-01 | XA-000-08-002-000-002-070-08 | 40.9 | 1141.9
09:37:58:febtest:INFO: 21-02 | XA-000-08-002-002-008-045-05 | 18.7 | 1212.7
09:37:58:febtest:INFO: 28-03 | XA-000-08-002-000-002-058-04 | 18.7 | 1212.7
09:37:59:febtest:INFO: 19-04 | XA-000-08-002-002-008-105-00 | 15.6 | 1218.6
09:37:59:febtest:INFO: 26-05 | XA-000-08-002-000-002-069-08 | 31.4 | 1171.5
09:37:59:febtest:INFO: 17-06 | XA-000-08-002-000-000-106-05 | 28.2 | 1195.1
09:37:59:febtest:INFO: 24-07 | XA-000-08-002-000-002-067-08 | 37.7 | 1153.7
09:38:00:ST3_smx:INFO: Configuring SMX FAST
09:38:02:ST3_smx:INFO: chip: 23-0 28.225000 C 1183.292940 mV
09:38:02:ST3_smx:INFO: Electrons
09:38:02:ST3_smx:INFO: # loops 0
09:38:03:ST3_smx:INFO: # loops 1
09:38:05:ST3_smx:INFO: # loops 2
09:38:07:ST3_smx:INFO: # loops 3
09:38:08:ST3_smx:INFO: # loops 4
09:38:10:ST3_smx:INFO: Total # of broken channels: 0
09:38:10:ST3_smx:INFO: List of broken channels: []
09:38:10:ST3_smx:INFO: Total # of broken channels: 0
09:38:10:ST3_smx:INFO: List of broken channels: []
09:38:11:ST3_smx:INFO: Configuring SMX FAST
09:38:13:ST3_smx:INFO: chip: 30-1 37.726682 C 1147.806000 mV
09:38:13:ST3_smx:INFO: Electrons
09:38:13:ST3_smx:INFO: # loops 0
09:38:15:ST3_smx:INFO: # loops 1
09:38:16:ST3_smx:INFO: # loops 2
09:38:18:ST3_smx:INFO: # loops 3
09:38:19:ST3_smx:INFO: # loops 4
09:38:21:ST3_smx:INFO: Total # of broken channels: 0
09:38:21:ST3_smx:INFO: List of broken channels: []
09:38:21:ST3_smx:INFO: Total # of broken channels: 0
09:38:21:ST3_smx:INFO: List of broken channels: []
09:38:22:ST3_smx:INFO: Configuring SMX FAST
09:38:24:ST3_smx:INFO: chip: 21-2 21.902970 C 1206.851500 mV
09:38:24:ST3_smx:INFO: Electrons
09:38:24:ST3_smx:INFO: # loops 0
09:38:26:ST3_smx:INFO: # loops 1
09:38:27:ST3_smx:INFO: # loops 2
09:38:29:ST3_smx:INFO: # loops 3
09:38:30:ST3_smx:INFO: # loops 4
09:38:32:ST3_smx:INFO: Total # of broken channels: 0
09:38:32:ST3_smx:INFO: List of broken channels: []
09:38:32:ST3_smx:INFO: Total # of broken channels: 1
09:38:32:ST3_smx:INFO: List of broken channels: [81]
09:38:33:ST3_smx:INFO: Configuring SMX FAST
09:38:34:ST3_smx:INFO: chip: 28-3 18.745682 C 1212.728715 mV
09:38:34:ST3_smx:INFO: Electrons
09:38:34:ST3_smx:INFO: # loops 0
09:38:36:ST3_smx:INFO: # loops 1
09:38:38:ST3_smx:INFO: # loops 2
09:38:40:ST3_smx:INFO: # loops 3
09:38:41:ST3_smx:INFO: # loops 4
09:38:43:ST3_smx:INFO: Total # of broken channels: 0
09:38:43:ST3_smx:INFO: List of broken channels: []
09:38:43:ST3_smx:INFO: Total # of broken channels: 0
09:38:43:ST3_smx:INFO: List of broken channels: []
09:38:44:ST3_smx:INFO: Configuring SMX FAST
09:38:46:ST3_smx:INFO: chip: 19-4 21.902970 C 1206.851500 mV
09:38:46:ST3_smx:INFO: Electrons
09:38:46:ST3_smx:INFO: # loops 0
09:38:48:ST3_smx:INFO: # loops 1
09:38:49:ST3_smx:INFO: # loops 2
09:38:51:ST3_smx:INFO: # loops 3
09:38:52:ST3_smx:INFO: # loops 4
09:38:54:ST3_smx:INFO: Total # of broken channels: 0
09:38:54:ST3_smx:INFO: List of broken channels: []
09:38:54:ST3_smx:INFO: Total # of broken channels: 0
09:38:54:ST3_smx:INFO: List of broken channels: []
09:38:55:ST3_smx:INFO: Configuring SMX FAST
09:38:57:ST3_smx:INFO: chip: 26-5 44.073563 C 1129.995435 mV
09:38:57:ST3_smx:INFO: Electrons
09:38:57:ST3_smx:INFO: # loops 0
09:38:59:ST3_smx:INFO: # loops 1
09:39:01:ST3_smx:INFO: # loops 2
09:39:02:ST3_smx:INFO: # loops 3
09:39:04:ST3_smx:INFO: # loops 4
09:39:05:ST3_smx:INFO: Total # of broken channels: 0
09:39:05:ST3_smx:INFO: List of broken channels: []
09:39:05:ST3_smx:INFO: Total # of broken channels: 2
09:39:05:ST3_smx:INFO: List of broken channels: [1, 3]
09:39:06:ST3_smx:INFO: Configuring SMX FAST
09:39:08:ST3_smx:INFO: chip: 17-6 37.726682 C 1165.571835 mV
09:39:08:ST3_smx:INFO: Electrons
09:39:08:ST3_smx:INFO: # loops 0
09:39:10:ST3_smx:INFO: # loops 1
09:39:12:ST3_smx:INFO: # loops 2
09:39:13:ST3_smx:INFO: # loops 3
09:39:15:ST3_smx:INFO: # loops 4
09:39:16:ST3_smx:INFO: Total # of broken channels: 0
09:39:16:ST3_smx:INFO: List of broken channels: []
09:39:16:ST3_smx:INFO: Total # of broken channels: 0
09:39:16:ST3_smx:INFO: List of broken channels: []
09:39:17:ST3_smx:INFO: Configuring SMX FAST
09:39:19:ST3_smx:INFO: chip: 24-7 40.898880 C 1153.732915 mV
09:39:19:ST3_smx:INFO: Electrons
09:39:19:ST3_smx:INFO: # loops 0
09:39:21:ST3_smx:INFO: # loops 1
09:39:22:ST3_smx:INFO: # loops 2
09:39:24:ST3_smx:INFO: # loops 3
09:39:25:ST3_smx:INFO: # loops 4
09:39:27:ST3_smx:INFO: Total # of broken channels: 0
09:39:27:ST3_smx:INFO: List of broken channels: []
09:39:27:ST3_smx:INFO: Total # of broken channels: 0
09:39:27:ST3_smx:INFO: List of broken channels: []
09:39:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:39:28:febtest:INFO: 23-00 | XA-000-08-002-000-002-041-03 | 31.4 | 1183.3
09:39:28:febtest:INFO: 30-01 | XA-000-08-002-000-002-070-08 | 40.9 | 1147.8
09:39:29:febtest:INFO: 21-02 | XA-000-08-002-002-008-045-05 | 25.1 | 1201.0
09:39:29:febtest:INFO: 28-03 | XA-000-08-002-000-002-058-04 | 21.9 | 1212.7
09:39:29:febtest:INFO: 19-04 | XA-000-08-002-002-008-105-00 | 25.1 | 1206.9
09:39:29:febtest:INFO: 26-05 | XA-000-08-002-000-002-069-08 | 44.1 | 1135.9
09:39:30:febtest:INFO: 17-06 | XA-000-08-002-000-000-106-05 | 37.7 | 1165.6
09:39:30:febtest:INFO: 24-07 | XA-000-08-002-000-002-067-08 | 40.9 | 1153.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_03_13-09_37_32
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L7DL100122 M7DL1T1001221A2 62 A
FEB_SN : 2130
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
SENSOR_ID: 25053
MODULE_NAME: L7DL100122 M7DL1T1001221A2 62 A
MODULE_TYPE:
MODULE_LADDER: L7DL100122
MODULE_MODULE: M7DL1T1001221A2
MODULE_SIZE: 62
MODULE_GRADE: A
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8470', '1.850', '0.3606']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0040', '1.850', '0.4454']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9930', '1.850', '0.3181']