
FEB_2135 18.09.24 16:01:11
TextEdit.txt
16:01:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 16:01:11:ST3_Shared:INFO: FEB-Sensor 16:01:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 16:01:14:ST3_ModuleSelector:INFO: M4DL4T2001172A2 16:01:14:ST3_ModuleSelector:INFO: 20264 16:01:14:febtest:INFO: Testing FEB with SN 2135 16:01:15:smx_tester:INFO: Scanning setup 16:01:15:elinks:INFO: Disabling clock on downlink 0 16:01:15:elinks:INFO: Disabling clock on downlink 1 16:01:15:elinks:INFO: Disabling clock on downlink 2 16:01:15:elinks:INFO: Disabling clock on downlink 3 16:01:15:elinks:INFO: Disabling clock on downlink 4 16:01:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:01:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 16:01:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:01:15:elinks:INFO: Disabling clock on downlink 0 16:01:15:elinks:INFO: Disabling clock on downlink 1 16:01:15:elinks:INFO: Disabling clock on downlink 2 16:01:15:elinks:INFO: Disabling clock on downlink 3 16:01:15:elinks:INFO: Disabling clock on downlink 4 16:01:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:01:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 16:01:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:01:15:elinks:INFO: Disabling clock on downlink 0 16:01:15:elinks:INFO: Disabling clock on downlink 1 16:01:15:elinks:INFO: Disabling clock on downlink 2 16:01:15:elinks:INFO: Disabling clock on downlink 3 16:01:15:elinks:INFO: Disabling clock on downlink 4 16:01:16:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:01:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 16:01:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 16:01:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:01:16:elinks:INFO: Disabling clock on downlink 0 16:01:16:elinks:INFO: Disabling clock on downlink 1 16:01:16:elinks:INFO: Disabling clock on downlink 2 16:01:16:elinks:INFO: Disabling clock on downlink 3 16:01:16:elinks:INFO: Disabling clock on downlink 4 16:01:16:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:01:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 16:01:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:01:16:elinks:INFO: Disabling clock on downlink 0 16:01:16:elinks:INFO: Disabling clock on downlink 1 16:01:16:elinks:INFO: Disabling clock on downlink 2 16:01:16:elinks:INFO: Disabling clock on downlink 3 16:01:16:elinks:INFO: Disabling clock on downlink 4 16:01:16:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:01:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 16:01:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:01:16:setup_element:INFO: Scanning clock phase 16:01:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:01:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:01:16:setup_element:INFO: Clock phase scan results for group 0, downlink 2 16:01:16:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 16:01:16:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 16:01:16:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 16:01:16:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 16:01:16:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 16:01:16:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 16:01:16:setup_element:INFO: Eye window for uplink 22: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 16:01:16:setup_element:INFO: Eye window for uplink 23: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 16:01:16:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________ Clock Delay: 40 16:01:16:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________ Clock Delay: 40 16:01:16:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 16:01:16:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 16:01:16:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 16:01:16:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 16:01:16:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 16:01:16:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 16:01:16:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 16:01:16:setup_element:INFO: Scanning data phases 16:01:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:01:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:01:22:setup_element:INFO: Data phase scan results for group 0, downlink 2 16:01:22:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX Data delay found: 20 16:01:22:setup_element:INFO: Eye window for uplink 17: X___________________________________XXXX Data delay found: 18 16:01:22:setup_element:INFO: Eye window for uplink 18: X_______________________XXXXXXXXXXXXXXXX Data delay found: 12 16:01:22:setup_element:INFO: Eye window for uplink 19: ________________________XXXXXXXXXXXXXXXX Data delay found: 11 16:01:22:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXX_ Data delay found: 17 16:01:22:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_ Data delay found: 16 16:01:22:setup_element:INFO: Eye window for uplink 22: X___________________________________XXX_ Data delay found: 18 16:01:22:setup_element:INFO: Eye window for uplink 23: XXXX_____________________________XXXXXXX Data delay found: 18 16:01:22:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________ Data delay found: 28 16:01:22:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________ Data delay found: 31 16:01:22:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________ Data delay found: 28 16:01:22:setup_element:INFO: Eye window for uplink 27: __________XXXXX_________________________ Data delay found: 32 16:01:22:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________ Data delay found: 35 16:01:22:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________ Data delay found: 37 16:01:22:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________ Data delay found: 38 16:01:22:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXX_________________ Data delay found: 39 16:01:22:setup_element:INFO: Setting the data phase to 20 for uplink 16 16:01:22:setup_element:INFO: Setting the data phase to 18 for uplink 17 16:01:22:setup_element:INFO: Setting the data phase to 12 for uplink 18 16:01:22:setup_element:INFO: Setting the data phase to 11 for uplink 19 16:01:22:setup_element:INFO: Setting the data phase to 17 for uplink 20 16:01:22:setup_element:INFO: Setting the data phase to 16 for uplink 21 16:01:22:setup_element:INFO: Setting the data phase to 18 for uplink 22 16:01:22:setup_element:INFO: Setting the data phase to 18 for uplink 23 16:01:22:setup_element:INFO: Setting the data phase to 28 for uplink 24 16:01:22:setup_element:INFO: Setting the data phase to 31 for uplink 25 16:01:22:setup_element:INFO: Setting the data phase to 28 for uplink 26 16:01:22:setup_element:INFO: Setting the data phase to 32 for uplink 27 16:01:22:setup_element:INFO: Setting the data phase to 35 for uplink 28 16:01:22:setup_element:INFO: Setting the data phase to 37 for uplink 29 16:01:22:setup_element:INFO: Setting the data phase to 38 for uplink 30 16:01:22:setup_element:INFO: Setting the data phase to 39 for uplink 31 16:01:22:setup_element:INFO: Beginning SMX ASICs map scan 16:01:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:01:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:01:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 16:01:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 16:01:22:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 16:01:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 16:01:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 16:01:22:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 16:01:22:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 16:01:22:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 16:01:22:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 16:01:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 16:01:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 16:01:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 16:01:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 16:01:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 16:01:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 16:01:23:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 16:01:23:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 16:01:23:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 16:01:23:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 16:01:25:setup_element:INFO: Performing Elink synchronization 16:01:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:01:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:01:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 16:01:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 16:01:25:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 16:01:25:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 16:01:25:ST3_emu_feb:DEBUG: Chip address: 0x0 16:01:25:ST3_emu_feb:DEBUG: Chip address: 0x1 16:01:25:ST3_emu_feb:DEBUG: Chip address: 0x2 16:01:25:ST3_emu_feb:DEBUG: Chip address: 0x3 16:01:25:ST3_emu_feb:DEBUG: Chip address: 0x4 16:01:25:ST3_emu_feb:DEBUG: Chip address: 0x5 16:01:25:ST3_emu_feb:DEBUG: Chip address: 0x6 16:01:25:ST3_emu_feb:DEBUG: Chip address: 0x7 16:01:26:febtest:INFO: Init all SMX (CSA): 30 16:01:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 16:01:41:febtest:INFO: 23-00 | XA-000-08-002-001-008-126-06 | 28.2 | 1212.7 16:01:41:febtest:INFO: 30-01 | XA-000-08-002-001-008-122-06 | 34.6 | 1177.4 16:01:41:febtest:INFO: 21-02 | XA-000-08-002-001-008-084-08 | 44.1 | 1153.7 16:01:41:febtest:INFO: 28-03 | XA-000-08-002-001-008-081-08 | 50.4 | 1130.0 16:01:41:febtest:INFO: 19-04 | XA-000-08-002-001-008-135-00 | 40.9 | 1171.5 16:01:42:febtest:INFO: 26-05 | XA-000-08-002-001-008-088-08 | 40.9 | 1147.8 16:01:42:febtest:INFO: 17-06 | XA-000-08-002-001-008-140-00 | 28.2 | 1212.7 16:01:42:febtest:INFO: 24-07 | XA-000-08-002-001-008-097-01 | 44.1 | 1147.8 16:01:43:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 16:01:45:ST3_smx:INFO: chip: 23-0 28.225000 C 1224.468235 mV 16:01:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:01:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:01:45:ST3_smx:INFO: Electrons 16:01:45:ST3_smx:INFO: # loops 0 16:01:47:ST3_smx:INFO: # loops 1 16:01:49:ST3_smx:INFO: # loops 2 16:01:50:ST3_smx:INFO: # loops 3 16:01:52:ST3_smx:INFO: # loops 4 16:01:54:ST3_smx:INFO: Total # of broken channels: 0 16:01:54:ST3_smx:INFO: List of broken channels: [] 16:01:54:ST3_smx:INFO: Total # of broken channels: 0 16:01:54:ST3_smx:INFO: List of broken channels: [] 16:01:55:ST3_smx:INFO: chip: 30-1 37.726682 C 1189.190035 mV 16:01:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:01:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:01:55:ST3_smx:INFO: Electrons 16:01:55:ST3_smx:INFO: # loops 0 16:01:57:ST3_smx:INFO: # loops 1 16:01:59:ST3_smx:INFO: # loops 2 16:02:01:ST3_smx:INFO: # loops 3 16:02:02:ST3_smx:INFO: # loops 4 16:02:04:ST3_smx:INFO: Total # of broken channels: 0 16:02:04:ST3_smx:INFO: List of broken channels: [] 16:02:04:ST3_smx:INFO: Total # of broken channels: 1 16:02:04:ST3_smx:INFO: List of broken channels: [0] 16:02:06:ST3_smx:INFO: chip: 21-2 47.250730 C 1165.571835 mV 16:02:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:06:ST3_smx:INFO: Electrons 16:02:06:ST3_smx:INFO: # loops 0 16:02:07:ST3_smx:INFO: # loops 1 16:02:09:ST3_smx:INFO: # loops 2 16:02:11:ST3_smx:INFO: # loops 3 16:02:12:ST3_smx:INFO: # loops 4 16:02:14:ST3_smx:INFO: Total # of broken channels: 0 16:02:14:ST3_smx:INFO: List of broken channels: [] 16:02:14:ST3_smx:INFO: Total # of broken channels: 0 16:02:14:ST3_smx:INFO: List of broken channels: [] 16:02:16:ST3_smx:INFO: chip: 28-3 53.612520 C 1141.874115 mV 16:02:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:16:ST3_smx:INFO: Electrons 16:02:16:ST3_smx:INFO: # loops 0 16:02:18:ST3_smx:INFO: # loops 1 16:02:19:ST3_smx:INFO: # loops 2 16:02:21:ST3_smx:INFO: # loops 3 16:02:23:ST3_smx:INFO: # loops 4 16:02:24:ST3_smx:INFO: Total # of broken channels: 0 16:02:24:ST3_smx:INFO: List of broken channels: [] 16:02:24:ST3_smx:INFO: Total # of broken channels: 1 16:02:24:ST3_smx:INFO: List of broken channels: [9] 16:02:26:ST3_smx:INFO: chip: 19-4 44.073563 C 1189.190035 mV 16:02:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:26:ST3_smx:INFO: Electrons 16:02:26:ST3_smx:INFO: # loops 0 16:02:28:ST3_smx:INFO: # loops 1 16:02:29:ST3_smx:INFO: # loops 2 16:02:31:ST3_smx:INFO: # loops 3 16:02:33:ST3_smx:INFO: # loops 4 16:02:35:ST3_smx:INFO: Total # of broken channels: 0 16:02:35:ST3_smx:INFO: List of broken channels: [] 16:02:35:ST3_smx:INFO: Total # of broken channels: 0 16:02:35:ST3_smx:INFO: List of broken channels: [] 16:02:36:ST3_smx:INFO: chip: 26-5 47.250730 C 1159.654860 mV 16:02:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:36:ST3_smx:INFO: Electrons 16:02:36:ST3_smx:INFO: # loops 0 16:02:38:ST3_smx:INFO: # loops 1 16:02:40:ST3_smx:INFO: # loops 2 16:02:41:ST3_smx:INFO: # loops 3 16:02:43:ST3_smx:INFO: # loops 4 16:02:45:ST3_smx:INFO: Total # of broken channels: 0 16:02:45:ST3_smx:INFO: List of broken channels: [] 16:02:45:ST3_smx:INFO: Total # of broken channels: 0 16:02:45:ST3_smx:INFO: List of broken channels: [] 16:02:46:ST3_smx:INFO: chip: 17-6 34.556970 C 1218.600960 mV 16:02:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:46:ST3_smx:INFO: Electrons 16:02:46:ST3_smx:INFO: # loops 0 16:02:48:ST3_smx:INFO: # loops 1 16:02:50:ST3_smx:INFO: # loops 2 16:02:51:ST3_smx:INFO: # loops 3 16:02:53:ST3_smx:INFO: # loops 4 16:02:55:ST3_smx:INFO: Total # of broken channels: 0 16:02:55:ST3_smx:INFO: List of broken channels: [] 16:02:55:ST3_smx:INFO: Total # of broken channels: 0 16:02:55:ST3_smx:INFO: List of broken channels: [] 16:02:57:ST3_smx:INFO: chip: 24-7 47.250730 C 1159.654860 mV 16:02:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:02:57:ST3_smx:INFO: Electrons 16:02:57:ST3_smx:INFO: # loops 0 16:02:58:ST3_smx:INFO: # loops 1 16:03:00:ST3_smx:INFO: # loops 2 16:03:01:ST3_smx:INFO: # loops 3 16:03:03:ST3_smx:INFO: # loops 4 16:03:05:ST3_smx:INFO: Total # of broken channels: 0 16:03:05:ST3_smx:INFO: List of broken channels: [] 16:03:05:ST3_smx:INFO: Total # of broken channels: 0 16:03:05:ST3_smx:INFO: List of broken channels: [] 16:03:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 16:03:05:febtest:INFO: 23-00 | XA-000-08-002-001-008-126-06 | 37.7 | 1242.0 16:03:05:febtest:INFO: 30-01 | XA-000-08-002-001-008-122-06 | 44.1 | 1212.7 16:03:06:febtest:INFO: 21-02 | XA-000-08-002-001-008-084-08 | 53.6 | 1183.3 16:03:06:febtest:INFO: 28-03 | XA-000-08-002-001-008-081-08 | 56.8 | 1159.7 16:03:06:febtest:INFO: 19-04 | XA-000-08-002-001-008-135-00 | 47.3 | 1224.5 16:03:06:febtest:INFO: 26-05 | XA-000-08-002-001-008-088-08 | 50.4 | 1177.4 16:03:07:febtest:INFO: 17-06 | XA-000-08-002-001-008-140-00 | 37.7 | 1236.2 16:03:07:febtest:INFO: 24-07 | XA-000-08-002-001-008-097-01 | 50.4 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_09_18-16_01_11 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2135| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ SENSOR_NAME: 20264 | SIZE: 62x124 | GRADE: A MODULE_NAME: M4DL4T2001172A2 LADDER_NAME: L4DL400117 ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.5360', '1.848', '1.9520'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0140', '1.850', '2.5280'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9310', '1.850', '0.5087']