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FEB_2144 12.04.24 14:10:22
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14:10:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:10:22:ST3_Shared:INFO: FEB-Microcable
14:10:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:10:23:febtest:INFO: Testing FEB with SN 2144
14:10:25:smx_tester:INFO: Scanning setup
14:10:25:elinks:INFO: Disabling clock on downlink 0
14:10:25:elinks:INFO: Disabling clock on downlink 1
14:10:25:elinks:INFO: Disabling clock on downlink 2
14:10:25:elinks:INFO: Disabling clock on downlink 3
14:10:25:elinks:INFO: Disabling clock on downlink 4
14:10:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:10:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:10:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:10:25:elinks:INFO: Disabling clock on downlink 0
14:10:25:elinks:INFO: Disabling clock on downlink 1
14:10:25:elinks:INFO: Disabling clock on downlink 2
14:10:25:elinks:INFO: Disabling clock on downlink 3
14:10:25:elinks:INFO: Disabling clock on downlink 4
14:10:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:10:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:10:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:10:25:elinks:INFO: Disabling clock on downlink 0
14:10:25:elinks:INFO: Disabling clock on downlink 1
14:10:25:elinks:INFO: Disabling clock on downlink 2
14:10:25:elinks:INFO: Disabling clock on downlink 3
14:10:25:elinks:INFO: Disabling clock on downlink 4
14:10:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:10:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:10:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:10:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:10:26:elinks:INFO: Disabling clock on downlink 0
14:10:26:elinks:INFO: Disabling clock on downlink 1
14:10:26:elinks:INFO: Disabling clock on downlink 2
14:10:26:elinks:INFO: Disabling clock on downlink 3
14:10:26:elinks:INFO: Disabling clock on downlink 4
14:10:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:10:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:10:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:10:26:elinks:INFO: Disabling clock on downlink 0
14:10:26:elinks:INFO: Disabling clock on downlink 1
14:10:26:elinks:INFO: Disabling clock on downlink 2
14:10:26:elinks:INFO: Disabling clock on downlink 3
14:10:26:elinks:INFO: Disabling clock on downlink 4
14:10:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:10:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:10:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:10:26:setup_element:INFO: Scanning clock phase
14:10:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:10:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:10:26:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:10:26:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:10:26:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:10:26:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:10:26:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:10:26:setup_element:INFO: Eye window for uplink 20: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:10:26:setup_element:INFO: Eye window for uplink 21: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:10:26:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:10:26:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:10:26:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:10:26:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:10:26:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
14:10:26:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
14:10:26:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:10:26:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:10:26:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:10:26:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:10:26:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
14:10:26:setup_element:INFO: Scanning data phases
14:10:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:10:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:10:32:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:10:32:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
14:10:32:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
14:10:32:setup_element:INFO: Eye window for uplink 18: XXXX__________________________________XX
Data delay found: 20
14:10:32:setup_element:INFO: Eye window for uplink 19: XXX__________________________________XXX
Data delay found: 19
14:10:32:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX
Data delay found: 17
14:10:32:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXXX_
Data delay found: 15
14:10:32:setup_element:INFO: Eye window for uplink 22: XX_________________________________XXXXX
Data delay found: 18
14:10:32:setup_element:INFO: Eye window for uplink 23: XXXXX_____________________________XXXXXX
Data delay found: 19
14:10:32:setup_element:INFO: Eye window for uplink 24: _______XXXXXXX________________XXXXXXXXXX
Data delay found: 21
14:10:32:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_______________XXXXXXXXXX
Data delay found: 22
14:10:32:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
14:10:32:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
14:10:32:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
14:10:32:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
14:10:32:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
14:10:32:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
14:10:32:setup_element:INFO: Setting the data phase to 18 for uplink 16
14:10:32:setup_element:INFO: Setting the data phase to 16 for uplink 17
14:10:32:setup_element:INFO: Setting the data phase to 20 for uplink 18
14:10:32:setup_element:INFO: Setting the data phase to 19 for uplink 19
14:10:32:setup_element:INFO: Setting the data phase to 17 for uplink 20
14:10:32:setup_element:INFO: Setting the data phase to 15 for uplink 21
14:10:32:setup_element:INFO: Setting the data phase to 18 for uplink 22
14:10:32:setup_element:INFO: Setting the data phase to 19 for uplink 23
14:10:32:setup_element:INFO: Setting the data phase to 21 for uplink 24
14:10:32:setup_element:INFO: Setting the data phase to 22 for uplink 25
14:10:32:setup_element:INFO: Setting the data phase to 29 for uplink 26
14:10:32:setup_element:INFO: Setting the data phase to 32 for uplink 27
14:10:32:setup_element:INFO: Setting the data phase to 34 for uplink 28
14:10:32:setup_element:INFO: Setting the data phase to 36 for uplink 29
14:10:32:setup_element:INFO: Setting the data phase to 37 for uplink 30
14:10:32:setup_element:INFO: Setting the data phase to 38 for uplink 31
14:10:32:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 69
Eye Windows:
Uplink 16: ____________________________________________________________________XXXXXXXX____
Uplink 17: ____________________________________________________________________XXXXXXXX____
Uplink 18: ______________________________________________________________________XXXXXXX___
Uplink 19: ______________________________________________________________________XXXXXXX___
Uplink 20: ___________________________________________________________________XXXXXXXXX____
Uplink 21: ___________________________________________________________________XXXXXXXXX____
Uplink 22: ____________________________________________________________________XXXXXXXX____
Uplink 23: ____________________________________________________________________XXXXXXXX____
Uplink 24: ____________________________________________________________________XXXXXXXX____
Uplink 25: ____________________________________________________________________XXXXXXXX____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: ____________________________________________________________________XXXXXXXX____
Uplink 29: ____________________________________________________________________XXXXXXXX____
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 17:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 18:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 19:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 22:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 23:
Optimal Phase: 19
Window Length: 29
Eye Window: XXXXX_____________________________XXXXXX
Uplink 24:
Optimal Phase: 21
Window Length: 16
Eye Window: _______XXXXXXX________________XXXXXXXXXX
Uplink 25:
Optimal Phase: 22
Window Length: 15
Eye Window: _________XXXXXX_______________XXXXXXXXXX
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 29:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
]
14:10:32:setup_element:INFO: Beginning SMX ASICs map scan
14:10:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:10:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:10:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:10:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:10:32:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:10:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:10:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:10:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:10:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:10:33:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:10:33:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:10:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:10:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:10:33:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:10:33:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:10:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:10:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:10:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:10:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:10:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:10:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:10:35:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 69
Eye Windows:
Uplink 16: ____________________________________________________________________XXXXXXXX____
Uplink 17: ____________________________________________________________________XXXXXXXX____
Uplink 18: ______________________________________________________________________XXXXXXX___
Uplink 19: ______________________________________________________________________XXXXXXX___
Uplink 20: ___________________________________________________________________XXXXXXXXX____
Uplink 21: ___________________________________________________________________XXXXXXXXX____
Uplink 22: ____________________________________________________________________XXXXXXXX____
Uplink 23: ____________________________________________________________________XXXXXXXX____
Uplink 24: ____________________________________________________________________XXXXXXXX____
Uplink 25: ____________________________________________________________________XXXXXXXX____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: ____________________________________________________________________XXXXXXXX____
Uplink 29: ____________________________________________________________________XXXXXXXX____
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 17:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 18:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 19:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 22:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 23:
Optimal Phase: 19
Window Length: 29
Eye Window: XXXXX_____________________________XXXXXX
Uplink 24:
Optimal Phase: 21
Window Length: 16
Eye Window: _______XXXXXXX________________XXXXXXXXXX
Uplink 25:
Optimal Phase: 22
Window Length: 15
Eye Window: _________XXXXXX_______________XXXXXXXXXX
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 29:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
14:10:35:setup_element:INFO: Performing Elink synchronization
14:10:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:10:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:10:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:10:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:10:35:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:10:35:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:10:35:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
14:10:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:10:37:febtest:INFO: 23-00 | XA-000-08-002-001-007-111-05 | 31.4 | 1224.5
14:10:37:febtest:INFO: 30-01 | XA-000-08-002-001-007-112-02 | 37.7 | 1201.0
14:10:37:febtest:INFO: 21-02 | XA-000-08-002-001-007-114-02 | 47.3 | 1165.6
14:10:38:febtest:INFO: 28-03 | XA-000-08-002-001-007-116-02 | 31.4 | 1224.5
14:10:38:febtest:INFO: 19-04 | XA-000-08-002-001-007-082-12 | 37.7 | 1189.2
14:10:38:febtest:INFO: 26-05 | XA-000-08-002-001-007-120-02 | 28.2 | 1224.5
14:10:38:febtest:INFO: 17-06 | XA-000-08-002-001-007-079-11 | 40.9 | 1171.5
14:10:39:febtest:INFO: 24-07 | XA-000-08-002-001-007-118-02 | 18.7 | 1247.9
14:10:39:ST3_smx:INFO: Configuring SMX FAST
14:10:41:ST3_smx:INFO: chip: 23-0 34.556970 C 1206.851500 mV
14:10:41:ST3_smx:INFO: Electrons
14:10:41:ST3_smx:INFO: # loops 0
14:10:42:ST3_smx:INFO: # loops 1
14:10:44:ST3_smx:INFO: # loops 2
14:10:46:ST3_smx:INFO: Total # of broken channels: 0
14:10:46:ST3_smx:INFO: List of broken channels: []
14:10:46:ST3_smx:INFO: Total # of broken channels: 0
14:10:46:ST3_smx:INFO: List of broken channels: []
14:10:47:ST3_smx:INFO: Configuring SMX FAST
14:10:49:ST3_smx:INFO: chip: 30-1 37.726682 C 1206.851500 mV
14:10:49:ST3_smx:INFO: Electrons
14:10:49:ST3_smx:INFO: # loops 0
14:10:50:ST3_smx:INFO: # loops 1
14:10:52:ST3_smx:INFO: # loops 2
14:10:53:ST3_smx:INFO: Total # of broken channels: 0
14:10:53:ST3_smx:INFO: List of broken channels: []
14:10:53:ST3_smx:INFO: Total # of broken channels: 0
14:10:53:ST3_smx:INFO: List of broken channels: []
14:10:54:ST3_smx:INFO: Configuring SMX FAST
14:10:56:ST3_smx:INFO: chip: 21-2 44.073563 C 1183.292940 mV
14:10:56:ST3_smx:INFO: Electrons
14:10:56:ST3_smx:INFO: # loops 0
14:10:58:ST3_smx:INFO: # loops 1
14:11:00:ST3_smx:INFO: # loops 2
14:11:01:ST3_smx:INFO: Total # of broken channels: 0
14:11:01:ST3_smx:INFO: List of broken channels: []
14:11:01:ST3_smx:INFO: Total # of broken channels: 0
14:11:01:ST3_smx:INFO: List of broken channels: []
14:11:02:ST3_smx:INFO: Configuring SMX FAST
14:11:04:ST3_smx:INFO: chip: 28-3 40.898880 C 1195.082160 mV
14:11:04:ST3_smx:INFO: Electrons
14:11:04:ST3_smx:INFO: # loops 0
14:11:06:ST3_smx:INFO: # loops 1
14:11:07:ST3_smx:INFO: # loops 2
14:11:09:ST3_smx:INFO: Total # of broken channels: 0
14:11:09:ST3_smx:INFO: List of broken channels: []
14:11:09:ST3_smx:INFO: Total # of broken channels: 0
14:11:09:ST3_smx:INFO: List of broken channels: []
14:11:10:ST3_smx:INFO: Configuring SMX FAST
14:11:12:ST3_smx:INFO: chip: 19-4 44.073563 C 1177.390875 mV
14:11:12:ST3_smx:INFO: Electrons
14:11:12:ST3_smx:INFO: # loops 0
14:11:14:ST3_smx:INFO: # loops 1
14:11:15:ST3_smx:INFO: # loops 2
14:11:17:ST3_smx:INFO: Total # of broken channels: 0
14:11:17:ST3_smx:INFO: List of broken channels: []
14:11:17:ST3_smx:INFO: Total # of broken channels: 0
14:11:17:ST3_smx:INFO: List of broken channels: []
14:11:18:ST3_smx:INFO: Configuring SMX FAST
14:11:20:ST3_smx:INFO: chip: 26-5 31.389742 C 1230.330540 mV
14:11:20:ST3_smx:INFO: Electrons
14:11:20:ST3_smx:INFO: # loops 0
14:11:21:ST3_smx:INFO: # loops 1
14:11:23:ST3_smx:INFO: # loops 2
14:11:25:ST3_smx:INFO: Total # of broken channels: 1
14:11:25:ST3_smx:INFO: List of broken channels: [1]
14:11:25:ST3_smx:INFO: Total # of broken channels: 1
14:11:25:ST3_smx:INFO: List of broken channels: [1]
14:11:26:ST3_smx:INFO: Configuring SMX FAST
14:11:28:ST3_smx:INFO: chip: 17-6 40.898880 C 1177.390875 mV
14:11:28:ST3_smx:INFO: Electrons
14:11:28:ST3_smx:INFO: # loops 0
14:11:29:ST3_smx:INFO: # loops 1
14:11:31:ST3_smx:INFO: # loops 2
14:11:32:ST3_smx:INFO: Total # of broken channels: 0
14:11:32:ST3_smx:INFO: List of broken channels: []
14:11:32:ST3_smx:INFO: Total # of broken channels: 0
14:11:32:ST3_smx:INFO: List of broken channels: []
14:11:33:ST3_smx:INFO: Configuring SMX FAST
14:11:35:ST3_smx:INFO: chip: 24-7 31.389742 C 1206.851500 mV
14:11:35:ST3_smx:INFO: Electrons
14:11:35:ST3_smx:INFO: # loops 0
14:11:37:ST3_smx:INFO: # loops 1
14:11:38:ST3_smx:INFO: # loops 2
14:11:40:ST3_smx:INFO: Total # of broken channels: 0
14:11:40:ST3_smx:INFO: List of broken channels: []
14:11:40:ST3_smx:INFO: Total # of broken channels: 0
14:11:40:ST3_smx:INFO: List of broken channels: []
14:11:41:febtest:INFO: SetCSA :30
14:11:41:ST3_smx:INFO: Configuring SMX FAST
14:11:43:ST3_smx:INFO: Configuring SMX FAST
14:11:44:ST3_smx:INFO: Configuring SMX FAST
14:11:46:ST3_smx:INFO: Configuring SMX FAST
14:11:48:ST3_smx:INFO: Configuring SMX FAST
14:11:50:ST3_smx:INFO: Configuring SMX FAST
14:11:51:ST3_smx:INFO: Configuring SMX FAST
14:11:53:ST3_smx:INFO: Configuring SMX FAST
14:11:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:11:55:febtest:INFO: 23-00 | XA-000-08-002-001-007-111-05 | 37.7 | 1206.9
14:11:55:febtest:INFO: 30-01 | XA-000-08-002-001-007-112-02 | 37.7 | 1206.9
14:11:55:febtest:INFO: 21-02 | XA-000-08-002-001-007-114-02 | 44.1 | 1189.2
14:11:56:febtest:INFO: 28-03 | XA-000-08-002-001-007-116-02 | 40.9 | 1195.1
14:11:56:febtest:INFO: 19-04 | XA-000-08-002-001-007-082-12 | 44.1 | 1183.3
14:11:56:febtest:INFO: 26-05 | XA-000-08-002-001-007-120-02 | 31.4 | 1230.3
14:11:56:febtest:INFO: 17-06 | XA-000-08-002-001-007-079-11 | 40.9 | 1183.3
14:11:57:febtest:INFO: 24-07 | XA-000-08-002-001-007-118-02 | 31.4 | 1212.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_04_12-14_10_22
OPERATOR : Irakli K.; Ralf K.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 2144
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0980', '1.851', '3.0310']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.1720', '1.850', '0.3801']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.1640', '1.850', '0.3184']