FEB_2149    16.04.24 11:01:23

TextEdit.txt
            11:01:23:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:01:23:ST3_Shared:INFO:	                       FEB-Microcable                       
11:01:23:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:01:24:febtest:INFO:	Testing FEB with SN 2149
11:01:26:smx_tester:INFO:	Scanning setup
11:01:26:elinks:INFO:	Disabling clock on downlink 0
11:01:26:elinks:INFO:	Disabling clock on downlink 1
11:01:26:elinks:INFO:	Disabling clock on downlink 2
11:01:26:elinks:INFO:	Disabling clock on downlink 3
11:01:26:elinks:INFO:	Disabling clock on downlink 4
11:01:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:01:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:01:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:01:26:elinks:INFO:	Disabling clock on downlink 0
11:01:26:elinks:INFO:	Disabling clock on downlink 1
11:01:26:elinks:INFO:	Disabling clock on downlink 2
11:01:26:elinks:INFO:	Disabling clock on downlink 3
11:01:26:elinks:INFO:	Disabling clock on downlink 4
11:01:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:01:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:01:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:01:26:elinks:INFO:	Disabling clock on downlink 0
11:01:26:elinks:INFO:	Disabling clock on downlink 1
11:01:26:elinks:INFO:	Disabling clock on downlink 2
11:01:26:elinks:INFO:	Disabling clock on downlink 3
11:01:26:elinks:INFO:	Disabling clock on downlink 4
11:01:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:01:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
11:01:27:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
11:01:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:01:27:elinks:INFO:	Disabling clock on downlink 0
11:01:27:elinks:INFO:	Disabling clock on downlink 1
11:01:27:elinks:INFO:	Disabling clock on downlink 2
11:01:27:elinks:INFO:	Disabling clock on downlink 3
11:01:27:elinks:INFO:	Disabling clock on downlink 4
11:01:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:01:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:01:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:01:27:elinks:INFO:	Disabling clock on downlink 0
11:01:27:elinks:INFO:	Disabling clock on downlink 1
11:01:27:elinks:INFO:	Disabling clock on downlink 2
11:01:27:elinks:INFO:	Disabling clock on downlink 3
11:01:27:elinks:INFO:	Disabling clock on downlink 4
11:01:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:01:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:01:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:01:27:setup_element:INFO:	Scanning clock phase
11:01:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:01:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:01:27:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
11:01:27:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:01:27:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:01:27:setup_element:INFO:	Eye window for uplink 18: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:01:27:setup_element:INFO:	Eye window for uplink 19: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:01:27:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:01:27:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:01:27:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:01:27:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:01:27:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:01:27:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:01:27:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:01:27:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:01:27:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:01:27:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:01:27:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
11:01:27:setup_element:INFO:	Scanning data phases
11:01:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:01:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:01:33:setup_element:INFO:	Data phase scan results for group 0, downlink 2
11:01:33:setup_element:INFO:	Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
11:01:33:setup_element:INFO:	Eye window for uplink 17: X_________________________________XXXXXX
Data delay found: 17
11:01:33:setup_element:INFO:	Eye window for uplink 18: XX_________________________________XXXXX
Data delay found: 18
11:01:33:setup_element:INFO:	Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
11:01:33:setup_element:INFO:	Eye window for uplink 20: X___________________________________XXXX
Data delay found: 18
11:01:33:setup_element:INFO:	Eye window for uplink 21: __________________________________XXXXXX
Data delay found: 16
11:01:33:setup_element:INFO:	Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
11:01:33:setup_element:INFO:	Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
11:01:33:setup_element:INFO:	Eye window for uplink 26: _________XXXXX__________________________
Data delay found: 31
11:01:33:setup_element:INFO:	Eye window for uplink 27: _____________XXXXX______________________
Data delay found: 35
11:01:33:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
11:01:33:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
11:01:33:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXXX_________________
Data delay found: 39
11:01:33:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
11:01:33:setup_element:INFO:	Setting the data phase to 19 for uplink 16
11:01:33:setup_element:INFO:	Setting the data phase to 17 for uplink 17
11:01:33:setup_element:INFO:	Setting the data phase to 18 for uplink 18
11:01:33:setup_element:INFO:	Setting the data phase to 15 for uplink 19
11:01:33:setup_element:INFO:	Setting the data phase to 18 for uplink 20
11:01:33:setup_element:INFO:	Setting the data phase to 16 for uplink 21
11:01:33:setup_element:INFO:	Setting the data phase to 30 for uplink 24
11:01:33:setup_element:INFO:	Setting the data phase to 32 for uplink 25
11:01:33:setup_element:INFO:	Setting the data phase to 31 for uplink 26
11:01:33:setup_element:INFO:	Setting the data phase to 35 for uplink 27
11:01:33:setup_element:INFO:	Setting the data phase to 35 for uplink 28
11:01:33:setup_element:INFO:	Setting the data phase to 37 for uplink 29
11:01:33:setup_element:INFO:	Setting the data phase to 39 for uplink 30
11:01:33:setup_element:INFO:	Setting the data phase to 39 for uplink 31
11:01:33:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 71
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXX____
      Uplink 17: _____________________________________________________________________XXXXXXX____
      Uplink 18: ____________________________________________________________________XXXXXXXXX___
      Uplink 19: ____________________________________________________________________XXXXXXXXX___
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 24: ____________________________________________________________________XXXXXXXX____
      Uplink 25: ____________________________________________________________________XXXXXXXX____
      Uplink 26: ____________________________________________________________________XXXXXXXXX___
      Uplink 27: ____________________________________________________________________XXXXXXXXX___
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXXXX___
      Uplink 31: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 17:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 18:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 19:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 20:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 21:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 24:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 27:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________
]
11:01:33:setup_element:INFO:	Beginning SMX ASICs map scan
11:01:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:01:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:01:33:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:01:33:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:01:33:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
11:01:33:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:01:33:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:01:33:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:01:34:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:01:34:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:01:34:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:01:34:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:01:34:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:01:34:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:01:34:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:01:34:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:01:34:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:01:34:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:01:34:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:01:36:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 71
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXX____
      Uplink 17: _____________________________________________________________________XXXXXXX____
      Uplink 18: ____________________________________________________________________XXXXXXXXX___
      Uplink 19: ____________________________________________________________________XXXXXXXXX___
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 24: ____________________________________________________________________XXXXXXXX____
      Uplink 25: ____________________________________________________________________XXXXXXXX____
      Uplink 26: ____________________________________________________________________XXXXXXXXX___
      Uplink 27: ____________________________________________________________________XXXXXXXXX___
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXXXX___
      Uplink 31: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 17:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 18:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 19:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 20:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 21:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 24:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 27:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________

11:01:36:setup_element:INFO:	Performing Elink synchronization
11:01:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:01:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:01:36:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:01:36:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:01:36:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
11:01:36:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
11:01:36:ST3_emu:INFO:	Number of chips: 7
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
11:01:37:febtest:ERROR:	HW addres 1 != 0
11:01:43:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:01:43:febtest:INFO:	30-01 | XA-000-08-002-001-008-065-15 |  15.6 | 1271.2
11:01:43:febtest:INFO:	21-02 | XA-000-08-002-002-007-001-15 |  37.7 | 1189.2
11:01:44:febtest:INFO:	28-03 | XA-000-08-002-001-008-077-15 |  31.4 | 1206.9
11:01:44:febtest:INFO:	19-04 | XA-000-08-002-002-006-251-04 |  37.7 | 1195.1
11:01:44:febtest:INFO:	26-05 | XA-000-08-002-001-008-062-03 |  40.9 | 1165.6
11:01:44:febtest:INFO:	17-06 | XA-000-08-002-002-006-250-04 |  28.2 | 1224.5
11:01:44:febtest:INFO:	24-07 | XA-000-08-002-001-008-072-15 |  31.4 | 1195.1
11:01:44:febtest:INFO:	Init all SMX (CSA): 30
11:01:57:febtest:INFO:	Set all CSA to ZERO
11:01:58:febtest:INFO:	['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9160', '1.851', '0.4966']
11:01:58:ST3_smx:INFO:	chip: 30-1 	 31.389742 C 	 1189.190035 mV
11:01:58:ST3_smx:INFO:		Electrons
11:01:58:ST3_smx:INFO:	# loops 0
11:02:00:ST3_smx:INFO:	# loops 1
11:02:02:ST3_smx:INFO:	# loops 2
11:02:03:ST3_smx:INFO:	Total # of broken channels: 0
11:02:03:ST3_smx:INFO:	List of broken channels: []
11:02:03:ST3_smx:INFO:	Total # of broken channels: 0
11:02:03:ST3_smx:INFO:	List of broken channels: []
11:02:05:ST3_smx:INFO:	chip: 21-2 	 37.726682 C 	 1171.483840 mV
11:02:05:ST3_smx:INFO:		Electrons
11:02:05:ST3_smx:INFO:	# loops 0
11:02:07:ST3_smx:INFO:	# loops 1
11:02:08:ST3_smx:INFO:	# loops 2
11:02:10:ST3_smx:INFO:	Total # of broken channels: 0
11:02:10:ST3_smx:INFO:	List of broken channels: []
11:02:10:ST3_smx:INFO:	Total # of broken channels: 2
11:02:10:ST3_smx:INFO:	List of broken channels: [0, 2]
11:02:12:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1171.483840 mV
11:02:12:ST3_smx:INFO:		Electrons
11:02:12:ST3_smx:INFO:	# loops 0
11:02:13:ST3_smx:INFO:	# loops 1
11:02:15:ST3_smx:INFO:	# loops 2
11:02:17:ST3_smx:INFO:	Total # of broken channels: 0
11:02:17:ST3_smx:INFO:	List of broken channels: []
11:02:17:ST3_smx:INFO:	Total # of broken channels: 30
11:02:17:ST3_smx:INFO:	List of broken channels: [71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 124, 125, 127]
11:02:18:ST3_smx:INFO:	chip: 19-4 	 40.898880 C 	 1159.654860 mV
11:02:18:ST3_smx:INFO:		Electrons
11:02:18:ST3_smx:INFO:	# loops 0
11:02:20:ST3_smx:INFO:	# loops 1
11:02:22:ST3_smx:INFO:	# loops 2
11:02:23:ST3_smx:INFO:	Total # of broken channels: 0
11:02:23:ST3_smx:INFO:	List of broken channels: []
11:02:23:ST3_smx:INFO:	Total # of broken channels: 0
11:02:23:ST3_smx:INFO:	List of broken channels: []
11:02:25:ST3_smx:INFO:	chip: 26-5 	 37.726682 C 	 1171.483840 mV
11:02:25:ST3_smx:INFO:		Electrons
11:02:25:ST3_smx:INFO:	# loops 0
11:02:27:ST3_smx:INFO:	# loops 1
11:02:28:ST3_smx:INFO:	# loops 2
11:02:30:ST3_smx:INFO:	Total # of broken channels: 0
11:02:30:ST3_smx:INFO:	List of broken channels: []
11:02:30:ST3_smx:INFO:	Total # of broken channels: 0
11:02:30:ST3_smx:INFO:	List of broken channels: []
11:02:32:ST3_smx:INFO:	chip: 17-6 	 31.389742 C 	 1195.082160 mV
11:02:32:ST3_smx:INFO:		Electrons
11:02:32:ST3_smx:INFO:	# loops 0
11:02:33:ST3_smx:INFO:	# loops 1
11:02:35:ST3_smx:INFO:	# loops 2
11:02:37:ST3_smx:INFO:	Total # of broken channels: 0
11:02:37:ST3_smx:INFO:	List of broken channels: []
11:02:37:ST3_smx:INFO:	Total # of broken channels: 0
11:02:37:ST3_smx:INFO:	List of broken channels: []
11:02:38:ST3_smx:INFO:	chip: 24-7 	 34.556970 C 	 1165.571835 mV
11:02:38:ST3_smx:INFO:		Electrons
11:02:38:ST3_smx:INFO:	# loops 0
11:02:40:ST3_smx:INFO:	# loops 1
11:02:42:ST3_smx:INFO:	# loops 2
11:02:44:ST3_smx:INFO:	Total # of broken channels: 0
11:02:44:ST3_smx:INFO:	List of broken channels: []
11:02:44:ST3_smx:INFO:	Total # of broken channels: 1
11:02:44:ST3_smx:INFO:	List of broken channels: [61]
11:02:45:febtest:INFO:	SetCSA :30
11:02:45:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:02:45:febtest:INFO:	30-01 | XA-000-08-002-001-008-065-15 |  34.6 | 1177.4
11:02:45:febtest:INFO:	21-02 | XA-000-08-002-002-007-001-15 |  37.7 | 1165.6
11:02:45:febtest:INFO:	28-03 | XA-000-08-002-001-008-077-15 |  37.7 | 1159.7
11:02:45:febtest:INFO:	19-04 | XA-000-08-002-002-006-251-04 |  44.1 | 1147.8
11:02:46:febtest:INFO:	26-05 | XA-000-08-002-001-008-062-03 |  37.7 | 1153.7
11:02:46:febtest:INFO:	17-06 | XA-000-08-002-002-006-250-04 |  31.4 | 1183.3
11:02:46:febtest:INFO:	24-07 | XA-000-08-002-001-008-072-15 |  37.7 | 1153.7
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_04_16-11_01_23
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 2149
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8760', '1.852', '2.4510']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9500', '1.850', '2.5800']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9610', '1.849', '2.5800']