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FEB_2153 16.05.24 09:26:48
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09:26:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:26:48:ST3_Shared:INFO: FEB-Sensor
09:26:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:27:30:ST3_ModuleSelector:INFO: New Sensor ID:
314
09:27:30:ST3_ModuleSelector:INFO: New Sensor ID:
3142
09:27:38:ST3_ModuleSelector:INFO: L4DL000161 M4DL0T0001610A2 42 A
09:27:38:ST3_ModuleSelector:INFO:
3142
09:27:38:febtest:INFO: Testing FEB with SN 2153
09:27:41:smx_tester:INFO: Scanning setup
09:27:41:elinks:INFO: Disabling clock on downlink 0
09:27:41:elinks:INFO: Disabling clock on downlink 1
09:27:41:elinks:INFO: Disabling clock on downlink 2
09:27:41:elinks:INFO: Disabling clock on downlink 3
09:27:41:elinks:INFO: Disabling clock on downlink 4
09:27:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:27:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:27:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:27:41:elinks:INFO: Disabling clock on downlink 0
09:27:41:elinks:INFO: Disabling clock on downlink 1
09:27:41:elinks:INFO: Disabling clock on downlink 2
09:27:41:elinks:INFO: Disabling clock on downlink 3
09:27:41:elinks:INFO: Disabling clock on downlink 4
09:27:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:27:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:27:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:27:41:elinks:INFO: Disabling clock on downlink 0
09:27:41:elinks:INFO: Disabling clock on downlink 1
09:27:41:elinks:INFO: Disabling clock on downlink 2
09:27:41:elinks:INFO: Disabling clock on downlink 3
09:27:41:elinks:INFO: Disabling clock on downlink 4
09:27:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:27:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:27:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:27:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:27:41:elinks:INFO: Disabling clock on downlink 0
09:27:41:elinks:INFO: Disabling clock on downlink 1
09:27:41:elinks:INFO: Disabling clock on downlink 2
09:27:41:elinks:INFO: Disabling clock on downlink 3
09:27:41:elinks:INFO: Disabling clock on downlink 4
09:27:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:27:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:27:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:27:41:elinks:INFO: Disabling clock on downlink 0
09:27:41:elinks:INFO: Disabling clock on downlink 1
09:27:41:elinks:INFO: Disabling clock on downlink 2
09:27:41:elinks:INFO: Disabling clock on downlink 3
09:27:41:elinks:INFO: Disabling clock on downlink 4
09:27:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:27:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:27:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:27:42:setup_element:INFO: Scanning clock phase
09:27:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:27:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:27:42:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:27:42:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:27:42:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:27:42:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:27:42:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:27:42:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
09:27:42:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
09:27:42:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:27:42:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:27:42:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
09:27:42:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
09:27:42:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:27:42:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:27:42:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:27:42:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:27:42:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:27:42:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:27:42:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
09:27:42:setup_element:INFO: Scanning data phases
09:27:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:27:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:27:47:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:27:47:setup_element:INFO: Eye window for uplink 16: X__________________________________XXXXX
Data delay found: 17
09:27:47:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
09:27:47:setup_element:INFO: Eye window for uplink 18: XXXX_________________________________XXX
Data delay found: 20
09:27:47:setup_element:INFO: Eye window for uplink 19: XXX_________________________________XXXX
Data delay found: 19
09:27:47:setup_element:INFO: Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
09:27:47:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
09:27:47:setup_element:INFO: Eye window for uplink 22: XX_________________________________XXXXX
Data delay found: 18
09:27:47:setup_element:INFO: Eye window for uplink 23: XXXXX_____________________________XXXXXX
Data delay found: 19
09:27:47:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
09:27:47:setup_element:INFO: Eye window for uplink 25: _________XXXX___________________________
Data delay found: 30
09:27:47:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
09:27:47:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
09:27:47:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
09:27:47:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
09:27:47:setup_element:INFO: Eye window for uplink 30: _______________XXXXX____________________
Data delay found: 37
09:27:47:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
09:27:47:setup_element:INFO: Setting the data phase to 17 for uplink 16
09:27:47:setup_element:INFO: Setting the data phase to 16 for uplink 17
09:27:47:setup_element:INFO: Setting the data phase to 20 for uplink 18
09:27:47:setup_element:INFO: Setting the data phase to 19 for uplink 19
09:27:47:setup_element:INFO: Setting the data phase to 15 for uplink 20
09:27:47:setup_element:INFO: Setting the data phase to 15 for uplink 21
09:27:47:setup_element:INFO: Setting the data phase to 18 for uplink 22
09:27:47:setup_element:INFO: Setting the data phase to 19 for uplink 23
09:27:47:setup_element:INFO: Setting the data phase to 28 for uplink 24
09:27:47:setup_element:INFO: Setting the data phase to 30 for uplink 25
09:27:47:setup_element:INFO: Setting the data phase to 32 for uplink 26
09:27:47:setup_element:INFO: Setting the data phase to 35 for uplink 27
09:27:47:setup_element:INFO: Setting the data phase to 35 for uplink 28
09:27:47:setup_element:INFO: Setting the data phase to 37 for uplink 29
09:27:47:setup_element:INFO: Setting the data phase to 37 for uplink 30
09:27:47:setup_element:INFO: Setting the data phase to 37 for uplink 31
09:27:47:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXX___
Uplink 17: ______________________________________________________________________XXXXXXX___
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: ________________________________________________________________________________
Uplink 21: ________________________________________________________________________________
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: ________________________________________________________________________________
Uplink 25: ________________________________________________________________________________
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 17:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 18:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 19:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 20:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 21:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 22:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 23:
Optimal Phase: 19
Window Length: 29
Eye Window: XXXXX_____________________________XXXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 30:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 31:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
]
09:27:47:setup_element:INFO: Beginning SMX ASICs map scan
09:27:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:27:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:27:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:27:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:27:47:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:27:47:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:27:47:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:27:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:27:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:27:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:27:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:27:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:27:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:27:48:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:27:48:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:27:48:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:27:48:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:27:48:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:27:48:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:27:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:27:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:27:49:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXX___
Uplink 17: ______________________________________________________________________XXXXXXX___
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: ________________________________________________________________________________
Uplink 21: ________________________________________________________________________________
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: ________________________________________________________________________________
Uplink 25: ________________________________________________________________________________
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 17:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 18:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 19:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 20:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 21:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 22:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 23:
Optimal Phase: 19
Window Length: 29
Eye Window: XXXXX_____________________________XXXXXX
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 30:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 31:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
09:27:49:setup_element:INFO: Performing Elink synchronization
09:27:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:27:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:27:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:27:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:27:50:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:27:50:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:27:50:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
09:27:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:27:51:febtest:INFO: 23-00 | XA-000-08-002-002-006-058-11 | 31.4 | 1212.7
09:27:51:febtest:INFO: 30-01 | XA-000-08-002-002-006-041-12 | 28.2 | 1212.7
09:27:51:febtest:INFO: 21-02 | XA-000-08-002-002-006-053-11 | 40.9 | 1177.4
09:27:52:febtest:INFO: 28-03 | XA-000-08-002-002-006-030-05 | 18.7 | 1253.7
09:27:52:febtest:INFO: 19-04 | XA-000-08-002-002-006-040-12 | 40.9 | 1171.5
09:27:52:febtest:INFO: 26-05 | XA-000-08-002-002-006-021-05 | 44.1 | 1165.6
09:27:52:febtest:INFO: 17-06 | XA-000-08-002-002-006-045-12 | 25.1 | 1236.2
09:27:52:febtest:INFO: 24-07 | XA-000-08-002-002-006-033-12 | 37.7 | 1177.4
09:27:52:febtest:INFO: Init all SMX (CSA): 30
09:28:07:febtest:INFO: Set all CSA to ZERO
09:28:07:febtest:INFO: ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0100', '1.851', '0.2326']
09:28:08:ST3_smx:INFO: chip: 23-0 31.389742 C 1189.190035 mV
09:28:08:ST3_smx:INFO: Electrons
09:28:08:ST3_smx:INFO: # loops 0
09:28:10:ST3_smx:INFO: # loops 1
09:28:12:ST3_smx:INFO: # loops 2
09:28:13:ST3_smx:INFO: # loops 3
09:28:15:ST3_smx:INFO: # loops 4
09:28:16:ST3_smx:INFO: Total # of broken channels: 0
09:28:16:ST3_smx:INFO: List of broken channels: []
09:28:16:ST3_smx:INFO: Total # of broken channels: 0
09:28:16:ST3_smx:INFO: List of broken channels: []
09:28:18:ST3_smx:INFO: chip: 30-1 31.389742 C 1177.390875 mV
09:28:18:ST3_smx:INFO: Electrons
09:28:18:ST3_smx:INFO: # loops 0
09:28:20:ST3_smx:INFO: # loops 1
09:28:22:ST3_smx:INFO: # loops 2
09:28:23:ST3_smx:INFO: # loops 3
09:28:25:ST3_smx:INFO: # loops 4
09:28:26:ST3_smx:INFO: Total # of broken channels: 0
09:28:26:ST3_smx:INFO: List of broken channels: []
09:28:26:ST3_smx:INFO: Total # of broken channels: 1
09:28:26:ST3_smx:INFO: List of broken channels: [117]
09:28:28:ST3_smx:INFO: chip: 21-2 31.389742 C 1183.292940 mV
09:28:28:ST3_smx:INFO: Electrons
09:28:28:ST3_smx:INFO: # loops 0
09:28:30:ST3_smx:INFO: # loops 1
09:28:32:ST3_smx:INFO: # loops 2
09:28:33:ST3_smx:INFO: # loops 3
09:28:35:ST3_smx:INFO: # loops 4
09:28:36:ST3_smx:INFO: Total # of broken channels: 0
09:28:36:ST3_smx:INFO: List of broken channels: []
09:28:36:ST3_smx:INFO: Total # of broken channels: 0
09:28:36:ST3_smx:INFO: List of broken channels: []
09:28:38:ST3_smx:INFO: chip: 28-3 25.062742 C 1206.851500 mV
09:28:38:ST3_smx:INFO: Electrons
09:28:38:ST3_smx:INFO: # loops 0
09:28:40:ST3_smx:INFO: # loops 1
09:28:42:ST3_smx:INFO: # loops 2
09:28:43:ST3_smx:INFO: # loops 3
09:28:45:ST3_smx:INFO: # loops 4
09:28:46:ST3_smx:INFO: Total # of broken channels: 0
09:28:46:ST3_smx:INFO: List of broken channels: []
09:28:46:ST3_smx:INFO: Total # of broken channels: 3
09:28:46:ST3_smx:INFO: List of broken channels: [67, 69, 127]
09:28:48:ST3_smx:INFO: chip: 19-4 37.726682 C 1159.654860 mV
09:28:48:ST3_smx:INFO: Electrons
09:28:48:ST3_smx:INFO: # loops 0
09:28:50:ST3_smx:INFO: # loops 1
09:28:52:ST3_smx:INFO: # loops 2
09:28:53:ST3_smx:INFO: # loops 3
09:28:55:ST3_smx:INFO: # loops 4
09:28:56:ST3_smx:INFO: Total # of broken channels: 0
09:28:56:ST3_smx:INFO: List of broken channels: []
09:28:56:ST3_smx:INFO: Total # of broken channels: 0
09:28:56:ST3_smx:INFO: List of broken channels: []
09:28:58:ST3_smx:INFO: chip: 26-5 44.073563 C 1141.874115 mV
09:28:58:ST3_smx:INFO: Electrons
09:28:58:ST3_smx:INFO: # loops 0
09:29:00:ST3_smx:INFO: # loops 1
09:29:02:ST3_smx:INFO: # loops 2
09:29:03:ST3_smx:INFO: # loops 3
09:29:05:ST3_smx:INFO: # loops 4
09:29:06:ST3_smx:INFO: Total # of broken channels: 0
09:29:06:ST3_smx:INFO: List of broken channels: []
09:29:06:ST3_smx:INFO: Total # of broken channels: 0
09:29:06:ST3_smx:INFO: List of broken channels: []
09:29:08:ST3_smx:INFO: chip: 17-6 34.556970 C 1189.190035 mV
09:29:08:ST3_smx:INFO: Electrons
09:29:08:ST3_smx:INFO: # loops 0
09:29:10:ST3_smx:INFO: # loops 1
09:29:12:ST3_smx:INFO: # loops 2
09:29:13:ST3_smx:INFO: # loops 3
09:29:15:ST3_smx:INFO: # loops 4
09:29:17:ST3_smx:INFO: Total # of broken channels: 0
09:29:17:ST3_smx:INFO: List of broken channels: []
09:29:17:ST3_smx:INFO: Total # of broken channels: 0
09:29:17:ST3_smx:INFO: List of broken channels: []
09:29:19:ST3_smx:INFO: chip: 24-7 37.726682 C 1165.571835 mV
09:29:19:ST3_smx:INFO: Electrons
09:29:19:ST3_smx:INFO: # loops 0
09:29:20:ST3_smx:INFO: # loops 1
09:29:22:ST3_smx:INFO: # loops 2
09:29:23:ST3_smx:INFO: # loops 3
09:29:25:ST3_smx:INFO: # loops 4
09:29:27:ST3_smx:INFO: Total # of broken channels: 0
09:29:27:ST3_smx:INFO: List of broken channels: []
09:29:27:ST3_smx:INFO: Total # of broken channels: 0
09:29:27:ST3_smx:INFO: List of broken channels: []
09:29:28:febtest:INFO: SetCSA :30
09:29:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:29:28:febtest:INFO: 23-00 | XA-000-08-002-002-006-058-11 | 31.4 | 1171.5
09:29:28:febtest:INFO: 30-01 | XA-000-08-002-002-006-041-12 | 31.4 | 1159.7
09:29:28:febtest:INFO: 21-02 | XA-000-08-002-002-006-053-11 | 31.4 | 1171.5
09:29:28:febtest:INFO: 28-03 | XA-000-08-002-002-006-030-05 | 25.1 | 1189.2
09:29:29:febtest:INFO: 19-04 | XA-000-08-002-002-006-040-12 | 40.9 | 1141.9
09:29:29:febtest:INFO: 26-05 | XA-000-08-002-002-006-021-05 | 44.1 | 1130.0
09:29:29:febtest:INFO: 17-06 | XA-000-08-002-002-006-045-12 | 34.6 | 1177.4
09:29:29:febtest:INFO: 24-07 | XA-000-08-002-002-006-033-12 | 40.9 | 1147.8
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_05_16-09_26_48
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2153| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:
3142
MODULE_NAME: L4DL000161 M4DL0T0001610A2 42 A
MODULE_TYPE:
MODULE_LADDER: L4DL000161
MODULE_MODULE: M4DL0T0001610A2
MODULE_SIZE: 42
MODULE_GRADE: A
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4720', '1.852', '2.4130']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0240', '1.850', '2.4960']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0210', '1.850', '2.5880']