DTL-STS tests database

FEB_2159 12.06.24 08:23:17

link: XA-000-08-002-002-006-146-15
...SMX_0.root
link: XA-000-08-002-002-006-143-08
...SMX_2.root
link: XA-000-08-002-002-008-189-08
...SMX_4.root
link: XA-000-08-002-002-008-186-08
...SMX_6.root
link: XA-000-08-002-002-006-136-08
...SMX_1.root
link: XA-000-08-002-002-008-182-08
...SMX_3.root
link: XA-000-08-002-002-008-183-08
...SMX_5.root
link: XA-000-08-002-002-008-178-08
...SMX_7.root
link: XA-000-08-002-002-008-178-08
...VddmCSAstatus.root
TextEdit.txt
            08:23:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:23:17:ST3_Shared:INFO:	                         FEB-Sensor                         
08:23:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:23:20:ST3_ModuleSelector:INFO:	L4DL000161 M4DL0B3001613B2 124 C

08:23:20:ST3_ModuleSelector:INFO:	23194

08:23:20:febtest:INFO:	Testing FEB with SN 2159
08:23:21:smx_tester:INFO:	Scanning setup
08:23:21:elinks:INFO:	Disabling clock on downlink 0
08:23:21:elinks:INFO:	Disabling clock on downlink 1
08:23:21:elinks:INFO:	Disabling clock on downlink 2
08:23:21:elinks:INFO:	Disabling clock on downlink 3
08:23:21:elinks:INFO:	Disabling clock on downlink 4
08:23:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:23:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:23:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:23:22:elinks:INFO:	Disabling clock on downlink 0
08:23:22:elinks:INFO:	Disabling clock on downlink 1
08:23:22:elinks:INFO:	Disabling clock on downlink 2
08:23:22:elinks:INFO:	Disabling clock on downlink 3
08:23:22:elinks:INFO:	Disabling clock on downlink 4
08:23:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:23:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:23:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:23:22:elinks:INFO:	Disabling clock on downlink 0
08:23:22:elinks:INFO:	Disabling clock on downlink 1
08:23:22:elinks:INFO:	Disabling clock on downlink 2
08:23:22:elinks:INFO:	Disabling clock on downlink 3
08:23:22:elinks:INFO:	Disabling clock on downlink 4
08:23:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:23:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
08:23:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
08:23:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:23:22:elinks:INFO:	Disabling clock on downlink 0
08:23:22:elinks:INFO:	Disabling clock on downlink 1
08:23:22:elinks:INFO:	Disabling clock on downlink 2
08:23:22:elinks:INFO:	Disabling clock on downlink 3
08:23:22:elinks:INFO:	Disabling clock on downlink 4
08:23:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:23:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:23:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:23:22:elinks:INFO:	Disabling clock on downlink 0
08:23:22:elinks:INFO:	Disabling clock on downlink 1
08:23:22:elinks:INFO:	Disabling clock on downlink 2
08:23:22:elinks:INFO:	Disabling clock on downlink 3
08:23:22:elinks:INFO:	Disabling clock on downlink 4
08:23:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:23:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:23:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:23:22:setup_element:INFO:	Scanning clock phase
08:23:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:23:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:23:23:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
08:23:23:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:23:23:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:23:23:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
08:23:23:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
08:23:23:setup_element:INFO:	Eye window for uplink 20: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:23:23:setup_element:INFO:	Eye window for uplink 21: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:23:23:setup_element:INFO:	Eye window for uplink 22: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:23:23:setup_element:INFO:	Eye window for uplink 23: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:23:23:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:23:23:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:23:23:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:23:23:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:23:23:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
08:23:23:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
08:23:23:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
08:23:23:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
08:23:23:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
08:23:23:setup_element:INFO:	Scanning data phases
08:23:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:23:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:23:28:setup_element:INFO:	Data phase scan results for group 0, downlink 2
08:23:28:setup_element:INFO:	Eye window for uplink 16: XXX___________________________________XX
Data delay found: 20
08:23:28:setup_element:INFO:	Eye window for uplink 17: ____________________________________XXXX
Data delay found: 17
08:23:28:setup_element:INFO:	Eye window for uplink 18: XX___________________________________XXX
Data delay found: 19
08:23:28:setup_element:INFO:	Eye window for uplink 19: ___________________________________XXXX_
Data delay found: 16
08:23:28:setup_element:INFO:	Eye window for uplink 20: XXXXXXXXX____________________________XXX
Data delay found: 22
08:23:28:setup_element:INFO:	Eye window for uplink 21: _XXXXXXXX__________________________XXXXX
Data delay found: 21
08:23:28:setup_element:INFO:	Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
08:23:28:setup_element:INFO:	Eye window for uplink 23: XXXXXX_____________________________XXXXX
Data delay found: 20
08:23:28:setup_element:INFO:	Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
08:23:28:setup_element:INFO:	Eye window for uplink 25: ________XXXXXX__________________________
Data delay found: 30
08:23:28:setup_element:INFO:	Eye window for uplink 26: ________XXXXX_______XXXXXXXXXXXXXXXXXXXX
Data delay found: 3
08:23:28:setup_element:INFO:	Eye window for uplink 27: ____________XXXXXX__XXXXXXXXXXXXXXXXXXXX
Data delay found: 5
08:23:28:setup_element:INFO:	Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
08:23:28:setup_element:INFO:	Eye window for uplink 29: _________________XXXXX__________________
Data delay found: 39
08:23:28:setup_element:INFO:	Eye window for uplink 30: ________________XXXXX___________________
Data delay found: 38
08:23:28:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
08:23:28:setup_element:INFO:	Setting the data phase to 20 for uplink 16
08:23:28:setup_element:INFO:	Setting the data phase to 17 for uplink 17
08:23:28:setup_element:INFO:	Setting the data phase to 19 for uplink 18
08:23:28:setup_element:INFO:	Setting the data phase to 16 for uplink 19
08:23:28:setup_element:INFO:	Setting the data phase to 22 for uplink 20
08:23:28:setup_element:INFO:	Setting the data phase to 21 for uplink 21
08:23:28:setup_element:INFO:	Setting the data phase to 19 for uplink 22
08:23:28:setup_element:INFO:	Setting the data phase to 20 for uplink 23
08:23:28:setup_element:INFO:	Setting the data phase to 29 for uplink 24
08:23:28:setup_element:INFO:	Setting the data phase to 30 for uplink 25
08:23:28:setup_element:INFO:	Setting the data phase to 3 for uplink 26
08:23:28:setup_element:INFO:	Setting the data phase to 5 for uplink 27
08:23:28:setup_element:INFO:	Setting the data phase to 36 for uplink 28
08:23:28:setup_element:INFO:	Setting the data phase to 39 for uplink 29
08:23:28:setup_element:INFO:	Setting the data phase to 38 for uplink 30
08:23:28:setup_element:INFO:	Setting the data phase to 38 for uplink 31
08:23:28:setup_element:INFO:	Beginning SMX ASICs map scan
08:23:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:23:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:23:28:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:23:28:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:23:28:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:23:28:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:23:28:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:23:29:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:23:29:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:23:29:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:23:29:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:23:29:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:23:29:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:23:29:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:23:29:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:23:29:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:23:29:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:23:30:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:23:30:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:23:30:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:23:30:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:23:31:setup_element:INFO:	Performing Elink synchronization
08:23:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:23:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:23:31:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:23:31:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:23:31:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
08:23:31:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:23:32:febtest:INFO:	Init all SMX (CSA): 30
08:23:46:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:23:46:febtest:INFO:	23-00 | XA-000-08-002-002-006-146-15 |  21.9 | 1201.0
08:23:46:febtest:INFO:	30-01 | XA-000-08-002-002-006-136-08 |  31.4 | 1171.5
08:23:46:febtest:INFO:	21-02 | XA-000-08-002-002-006-143-08 |  28.2 | 1183.3
08:23:47:febtest:INFO:	28-03 | XA-000-08-002-002-008-182-08 |  40.9 | 1135.9
08:23:47:febtest:INFO:	19-04 | XA-000-08-002-002-008-189-08 |  44.1 | 1141.9
08:23:47:febtest:INFO:	26-05 | XA-000-08-002-002-008-183-08 |  34.6 | 1159.7
08:23:47:febtest:INFO:	17-06 | XA-000-08-002-002-008-186-08 |  40.9 | 1141.9
08:23:48:febtest:INFO:	24-07 | XA-000-08-002-002-008-178-08 |  40.9 | 1147.8
08:23:49:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:23:51:ST3_smx:INFO:	chip: 23-0 	 21.902970 C 	 1218.600960 mV
08:23:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:23:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:23:51:ST3_smx:INFO:		Electrons
08:23:51:ST3_smx:INFO:	# loops 0
08:23:53:ST3_smx:INFO:	# loops 1
08:23:54:ST3_smx:INFO:	# loops 2
08:23:56:ST3_smx:INFO:	# loops 3
08:23:57:ST3_smx:INFO:	# loops 4
08:23:59:ST3_smx:INFO:	Total # of broken channels: 0
08:23:59:ST3_smx:INFO:	List of broken channels: []
08:23:59:ST3_smx:INFO:	Total # of broken channels: 0
08:23:59:ST3_smx:INFO:	List of broken channels: []
08:24:01:ST3_smx:INFO:	chip: 30-1 	 31.389742 C 	 1183.292940 mV
08:24:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:01:ST3_smx:INFO:		Electrons
08:24:01:ST3_smx:INFO:	# loops 0
08:24:02:ST3_smx:INFO:	# loops 1
08:24:04:ST3_smx:INFO:	# loops 2
08:24:06:ST3_smx:INFO:	# loops 3
08:24:07:ST3_smx:INFO:	# loops 4
08:24:09:ST3_smx:INFO:	Total # of broken channels: 0
08:24:09:ST3_smx:INFO:	List of broken channels: []
08:24:09:ST3_smx:INFO:	Total # of broken channels: 1
08:24:09:ST3_smx:INFO:	List of broken channels: [83]
08:24:10:ST3_smx:INFO:	chip: 21-2 	 31.389742 C 	 1195.082160 mV
08:24:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:11:ST3_smx:INFO:		Electrons
08:24:11:ST3_smx:INFO:	# loops 0
08:24:12:ST3_smx:INFO:	# loops 1
08:24:14:ST3_smx:INFO:	# loops 2
08:24:15:ST3_smx:INFO:	# loops 3
08:24:17:ST3_smx:INFO:	# loops 4
08:24:18:ST3_smx:INFO:	Total # of broken channels: 0
08:24:18:ST3_smx:INFO:	List of broken channels: []
08:24:18:ST3_smx:INFO:	Total # of broken channels: 0
08:24:18:ST3_smx:INFO:	List of broken channels: []
08:24:20:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1147.806000 mV
08:24:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:20:ST3_smx:INFO:		Electrons
08:24:20:ST3_smx:INFO:	# loops 0
08:24:22:ST3_smx:INFO:	# loops 1
08:24:23:ST3_smx:INFO:	# loops 2
08:24:25:ST3_smx:INFO:	# loops 3
08:24:26:ST3_smx:INFO:	# loops 4
08:24:28:ST3_smx:INFO:	Total # of broken channels: 0
08:24:28:ST3_smx:INFO:	List of broken channels: []
08:24:28:ST3_smx:INFO:	Total # of broken channels: 1
08:24:28:ST3_smx:INFO:	List of broken channels: [39]
08:24:30:ST3_smx:INFO:	chip: 19-4 	 44.073563 C 	 1147.806000 mV
08:24:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:30:ST3_smx:INFO:		Electrons
08:24:30:ST3_smx:INFO:	# loops 0
08:24:32:ST3_smx:INFO:	# loops 1
08:24:33:ST3_smx:INFO:	# loops 2
08:24:35:ST3_smx:INFO:	# loops 3
08:24:36:ST3_smx:INFO:	# loops 4
08:24:38:ST3_smx:INFO:	Total # of broken channels: 0
08:24:38:ST3_smx:INFO:	List of broken channels: []
08:24:38:ST3_smx:INFO:	Total # of broken channels: 0
08:24:38:ST3_smx:INFO:	List of broken channels: []
08:24:40:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1171.483840 mV
08:24:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:40:ST3_smx:INFO:		Electrons
08:24:40:ST3_smx:INFO:	# loops 0
08:24:41:ST3_smx:INFO:	# loops 1
08:24:43:ST3_smx:INFO:	# loops 2
08:24:45:ST3_smx:INFO:	# loops 3
08:24:46:ST3_smx:INFO:	# loops 4
08:24:48:ST3_smx:INFO:	Total # of broken channels: 0
08:24:48:ST3_smx:INFO:	List of broken channels: []
08:24:48:ST3_smx:INFO:	Total # of broken channels: 3
08:24:48:ST3_smx:INFO:	List of broken channels: [53, 57, 67]
08:24:49:ST3_smx:INFO:	chip: 17-6 	 44.073563 C 	 1147.806000 mV
08:24:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:49:ST3_smx:INFO:		Electrons
08:24:49:ST3_smx:INFO:	# loops 0
08:24:51:ST3_smx:INFO:	# loops 1
08:24:53:ST3_smx:INFO:	# loops 2
08:24:54:ST3_smx:INFO:	# loops 3
08:24:56:ST3_smx:INFO:	# loops 4
08:24:57:ST3_smx:INFO:	Total # of broken channels: 0
08:24:57:ST3_smx:INFO:	List of broken channels: []
08:24:57:ST3_smx:INFO:	Total # of broken channels: 0
08:24:57:ST3_smx:INFO:	List of broken channels: []
08:24:59:ST3_smx:INFO:	chip: 24-7 	 40.898880 C 	 1153.732915 mV
08:24:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:24:59:ST3_smx:INFO:		Electrons
08:24:59:ST3_smx:INFO:	# loops 0
08:25:01:ST3_smx:INFO:	# loops 1
08:25:02:ST3_smx:INFO:	# loops 2
08:25:04:ST3_smx:INFO:	# loops 3
08:25:06:ST3_smx:INFO:	# loops 4
08:25:07:ST3_smx:INFO:	Total # of broken channels: 0
08:25:07:ST3_smx:INFO:	List of broken channels: []
08:25:07:ST3_smx:INFO:	Total # of broken channels: 0
08:25:07:ST3_smx:INFO:	List of broken channels: []
08:25:07:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:25:08:febtest:INFO:	23-00 | XA-000-08-002-002-006-146-15 |  21.9 | 1236.2
08:25:08:febtest:INFO:	30-01 | XA-000-08-002-002-006-136-08 |  31.4 | 1206.9
08:25:08:febtest:INFO:	21-02 | XA-000-08-002-002-006-143-08 |  31.4 | 1212.7
08:25:08:febtest:INFO:	28-03 | XA-000-08-002-002-008-182-08 |  44.1 | 1165.6
08:25:09:febtest:INFO:	19-04 | XA-000-08-002-002-008-189-08 |  47.3 | 1165.6
08:25:09:febtest:INFO:	26-05 | XA-000-08-002-002-008-183-08 |  34.6 | 1189.2
08:25:09:febtest:INFO:	17-06 | XA-000-08-002-002-008-186-08 |  44.1 | 1171.5
08:25:09:febtest:INFO:	24-07 | XA-000-08-002-002-008-178-08 |  44.1 | 1171.5
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#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_06_12-08_23_17
OPERATOR  : Olga B.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2159| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	23194

MODULE_NAME:	L4DL000161 M4DL0B3001613B2 124 C

MODULE_TYPE:	
MODULE_LADDER:	L7DL300122
MODULE_MODULE:	M7DL3B1001221B2
MODULE_SIZE:	62
MODULE_GRADE:	B
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9740', '1.852', '1.8130']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0790', '1.849', '2.6110']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9780', '1.850', '0.5235']
Comment.txt