
FEB_2160 26.04.24 13:07:12
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13:07:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:07:12:ST3_Shared:INFO: FEB-Microcable 13:07:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:07:12:febtest:INFO: Testing FEB with SN 2160 13:07:15:smx_tester:INFO: Scanning setup 13:07:15:elinks:INFO: Disabling clock on downlink 0 13:07:15:elinks:INFO: Disabling clock on downlink 1 13:07:15:elinks:INFO: Disabling clock on downlink 2 13:07:15:elinks:INFO: Disabling clock on downlink 3 13:07:15:elinks:INFO: Disabling clock on downlink 4 13:07:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:07:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:07:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:07:15:elinks:INFO: Disabling clock on downlink 0 13:07:15:elinks:INFO: Disabling clock on downlink 1 13:07:15:elinks:INFO: Disabling clock on downlink 2 13:07:15:elinks:INFO: Disabling clock on downlink 3 13:07:15:elinks:INFO: Disabling clock on downlink 4 13:07:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:07:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:07:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:07:15:elinks:INFO: Disabling clock on downlink 0 13:07:15:elinks:INFO: Disabling clock on downlink 1 13:07:15:elinks:INFO: Disabling clock on downlink 2 13:07:15:elinks:INFO: Disabling clock on downlink 3 13:07:15:elinks:INFO: Disabling clock on downlink 4 13:07:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:07:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:07:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:07:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:07:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:07:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:07:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:07:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:07:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:07:15:elinks:INFO: Disabling clock on downlink 0 13:07:15:elinks:INFO: Disabling clock on downlink 1 13:07:15:elinks:INFO: Disabling clock on downlink 2 13:07:15:elinks:INFO: Disabling clock on downlink 3 13:07:15:elinks:INFO: Disabling clock on downlink 4 13:07:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:07:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:07:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:07:15:elinks:INFO: Disabling clock on downlink 0 13:07:15:elinks:INFO: Disabling clock on downlink 1 13:07:15:elinks:INFO: Disabling clock on downlink 2 13:07:15:elinks:INFO: Disabling clock on downlink 3 13:07:15:elinks:INFO: Disabling clock on downlink 4 13:07:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:07:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:07:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:07:16:setup_element:INFO: Scanning clock phase 13:07:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:07:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:07:16:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:07:16:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 13:07:16:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 13:07:16:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXX_______ Clock Delay: 29 13:07:16:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXX_______ Clock Delay: 29 13:07:16:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 13:07:16:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 13:07:16:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2 13:07:16:setup_element:INFO: Scanning data phases 13:07:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:07:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:07:21:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:07:21:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________ Data delay found: 30 13:07:21:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________ Data delay found: 32 13:07:21:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________ Data delay found: 34 13:07:21:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________ Data delay found: 36 13:07:21:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXX__________________ Data delay found: 38 13:07:21:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________ Data delay found: 38 13:07:21:setup_element:INFO: Setting the data phase to 30 for uplink 24 13:07:21:setup_element:INFO: Setting the data phase to 32 for uplink 25 13:07:21:setup_element:INFO: Setting the data phase to 34 for uplink 28 13:07:21:setup_element:INFO: Setting the data phase to 36 for uplink 29 13:07:21:setup_element:INFO: Setting the data phase to 38 for uplink 30 13:07:21:setup_element:INFO: Setting the data phase to 38 for uplink 31 13:07:21:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [24, 25, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 31 Window Length: 71 Eye Windows: Uplink 24: ___________________________________________________________________XXXXXXXX_____ Uplink 25: ___________________________________________________________________XXXXXXXX_____ Uplink 28: ___________________________________________________________________XXXXXX_______ Uplink 29: ___________________________________________________________________XXXXXX_______ Uplink 30: _____________________________________________________________________XXXXXXX____ Uplink 31: _____________________________________________________________________XXXXXXX____ Data phase characteristics: Uplink 24: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 25: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 28: Optimal Phase: 34 Window Length: 34 Eye Window: ____________XXXXXX______________________ Uplink 29: Optimal Phase: 36 Window Length: 34 Eye Window: ______________XXXXXX____________________ Uplink 30: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ Uplink 31: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ ] 13:07:21:setup_element:INFO: Beginning SMX ASICs map scan 13:07:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:07:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:07:21:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:07:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:07:21:uplink:INFO: Setting uplinks mask [24, 25, 28, 29, 30, 31] 13:07:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:07:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:07:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:07:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:07:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:07:23:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:07:24:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [24, 25, 28, 29, 30, 31] ASICs Map: ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 31 Window Length: 71 Eye Windows: Uplink 24: ___________________________________________________________________XXXXXXXX_____ Uplink 25: ___________________________________________________________________XXXXXXXX_____ Uplink 28: ___________________________________________________________________XXXXXX_______ Uplink 29: ___________________________________________________________________XXXXXX_______ Uplink 30: _____________________________________________________________________XXXXXXX____ Uplink 31: _____________________________________________________________________XXXXXXX____ Data phase characteristics: Uplink 24: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 25: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 28: Optimal Phase: 34 Window Length: 34 Eye Window: ____________XXXXXX______________________ Uplink 29: Optimal Phase: 36 Window Length: 34 Eye Window: ______________XXXXXX____________________ Uplink 30: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ Uplink 31: Optimal Phase: 38 Window Length: 33 Eye Window: _______________XXXXXXX__________________ 13:07:24:setup_element:INFO: Performing Elink synchronization 13:07:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:07:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:07:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:07:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:07:24:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:07:24:uplink:INFO: Enabling uplinks [24, 25, 28, 29, 30, 31] 13:07:24:ST3_emu:INFO: Number of chips: 3 addr | upli | dwnli | grp | uplinks | uplinks_map 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24 FEB type: B FEB_A: 0 FEB_B: 1 13:07:24:febtest:ERROR: HW addres 1 != 0 13:07:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:07:28:febtest:INFO: 30-01 | XA-000-08-002-000-007-129-12 | 6.1 | 1294.5 13:07:28:febtest:INFO: 28-03 | XA-000-08-002-000-007-138-12 | 44.1 | 1165.6 13:07:29:febtest:INFO: 24-07 | XA-000-08-002-002-008-200-04 | 44.1 | 1159.7 13:07:29:febtest:INFO: Init all SMX (CSA): 30 13:07:34:febtest:INFO: Set all CSA to ZERO 13:07:35:febtest:INFO: ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9758', '1.850', '0.8028'] 13:07:36:ST3_smx:INFO: chip: 30-1 18.745682 C 1218.600960 mV 13:07:36:ST3_smx:INFO: Electrons 13:07:36:ST3_smx:INFO: # loops 0 13:07:38:ST3_smx:INFO: # loops 1 13:07:39:ST3_smx:INFO: # loops 2 13:07:41:ST3_smx:INFO: Total # of broken channels: 0 13:07:41:ST3_smx:INFO: List of broken channels: [] 13:07:41:ST3_smx:INFO: Total # of broken channels: 1 13:07:41:ST3_smx:INFO: List of broken channels: [126] 13:07:43:ST3_smx:INFO: chip: 28-3 44.073563 C 1129.995435 mV 13:07:43:ST3_smx:INFO: Electrons 13:07:43:ST3_smx:INFO: # loops 0 13:07:44:ST3_smx:INFO: # loops 1 13:07:46:ST3_smx:INFO: # loops 2 13:07:48:ST3_smx:INFO: Total # of broken channels: 0 13:07:48:ST3_smx:INFO: List of broken channels: [] 13:07:48:ST3_smx:INFO: Total # of broken channels: 0 13:07:48:ST3_smx:INFO: List of broken channels: [] 13:07:49:ST3_smx:INFO: chip: 24-7 34.556970 C 1165.571835 mV 13:07:49:ST3_smx:INFO: Electrons 13:07:49:ST3_smx:INFO: # loops 0 13:07:51:ST3_smx:INFO: # loops 1 13:07:53:ST3_smx:INFO: # loops 2 13:07:54:ST3_smx:INFO: Total # of broken channels: 0 13:07:54:ST3_smx:INFO: List of broken channels: [] 13:07:54:ST3_smx:INFO: Total # of broken channels: 0 13:07:54:ST3_smx:INFO: List of broken channels: [] 13:07:55:febtest:INFO: SetCSA :30 13:07:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:07:56:febtest:INFO: 30-01 | XA-000-08-002-000-007-129-12 | 18.7 | 1206.9 13:07:56:febtest:INFO: 28-03 | XA-000-08-002-000-007-138-12 | 44.1 | 1124.0 13:07:56:febtest:INFO: 24-07 | XA-000-08-002-002-008-200-04 | 34.6 | 1159.7 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_04_26-13_07_12 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L6DL400120 M6DL4T4001204A2 124 D FEB_SN : 2160 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 0 FEB_B : 1 --------------------------------------- --------------------------------------- VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9549', '1.852', '1.1720'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9903', '1.850', '1.2970'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9888', '1.850', '1.3230']