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FEB_2162 21.05.24 13:16:52
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13:16:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:16:52:ST3_Shared:INFO: FEB-Sensor
13:16:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:16:53:ST3_ModuleSelector:INFO: L4DL000161 M4DL0T1001611A2 62 A
13:16:53:ST3_ModuleSelector:INFO: 25163
13:16:54:febtest:INFO: Testing FEB with SN 2162
13:16:56:smx_tester:INFO: Scanning setup
13:16:56:elinks:INFO: Disabling clock on downlink 0
13:16:56:elinks:INFO: Disabling clock on downlink 1
13:16:56:elinks:INFO: Disabling clock on downlink 2
13:16:56:elinks:INFO: Disabling clock on downlink 3
13:16:56:elinks:INFO: Disabling clock on downlink 4
13:16:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:16:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:57:elinks:INFO: Disabling clock on downlink 0
13:16:57:elinks:INFO: Disabling clock on downlink 1
13:16:57:elinks:INFO: Disabling clock on downlink 2
13:16:57:elinks:INFO: Disabling clock on downlink 3
13:16:57:elinks:INFO: Disabling clock on downlink 4
13:16:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:16:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:57:elinks:INFO: Disabling clock on downlink 0
13:16:57:elinks:INFO: Disabling clock on downlink 1
13:16:57:elinks:INFO: Disabling clock on downlink 2
13:16:57:elinks:INFO: Disabling clock on downlink 3
13:16:57:elinks:INFO: Disabling clock on downlink 4
13:16:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:16:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:16:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:57:elinks:INFO: Disabling clock on downlink 0
13:16:57:elinks:INFO: Disabling clock on downlink 1
13:16:57:elinks:INFO: Disabling clock on downlink 2
13:16:57:elinks:INFO: Disabling clock on downlink 3
13:16:57:elinks:INFO: Disabling clock on downlink 4
13:16:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:16:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:57:elinks:INFO: Disabling clock on downlink 0
13:16:57:elinks:INFO: Disabling clock on downlink 1
13:16:57:elinks:INFO: Disabling clock on downlink 2
13:16:57:elinks:INFO: Disabling clock on downlink 3
13:16:57:elinks:INFO: Disabling clock on downlink 4
13:16:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:16:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:16:57:setup_element:INFO: Scanning clock phase
13:16:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:16:58:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:16:58:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
13:16:58:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
13:16:58:setup_element:INFO: Eye window for uplink 18: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:16:58:setup_element:INFO: Eye window for uplink 19: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:16:58:setup_element:INFO: Eye window for uplink 20: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:16:58:setup_element:INFO: Eye window for uplink 21: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:16:58:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:16:58:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:16:58:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
13:16:58:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
13:16:58:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:16:58:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:16:58:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
13:16:58:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
13:16:58:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:16:58:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:16:58:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
13:16:58:setup_element:INFO: Scanning data phases
13:16:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:16:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:17:03:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:17:03:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX
Data delay found: 20
13:17:03:setup_element:INFO: Eye window for uplink 17: XX__________________________________XXXX
Data delay found: 18
13:17:03:setup_element:INFO: Eye window for uplink 18: _X_________________________________XXXX_
Data delay found: 18
13:17:03:setup_element:INFO: Eye window for uplink 19: _________________________________XXXX___
Data delay found: 14
13:17:03:setup_element:INFO: Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
13:17:03:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
13:17:03:setup_element:INFO: Eye window for uplink 22: XXXX__________________________________XX
Data delay found: 20
13:17:03:setup_element:INFO: Eye window for uplink 23: XXXXXXX_____________________________XXXX
Data delay found: 21
13:17:04:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
13:17:04:setup_element:INFO: Eye window for uplink 25: _________XXXX___________________________
Data delay found: 30
13:17:04:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
13:17:04:setup_element:INFO: Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
13:17:04:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
13:17:04:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
13:17:04:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
13:17:04:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
13:17:04:setup_element:INFO: Setting the data phase to 20 for uplink 16
13:17:04:setup_element:INFO: Setting the data phase to 18 for uplink 17
13:17:04:setup_element:INFO: Setting the data phase to 18 for uplink 18
13:17:04:setup_element:INFO: Setting the data phase to 14 for uplink 19
13:17:04:setup_element:INFO: Setting the data phase to 15 for uplink 20
13:17:04:setup_element:INFO: Setting the data phase to 15 for uplink 21
13:17:04:setup_element:INFO: Setting the data phase to 20 for uplink 22
13:17:04:setup_element:INFO: Setting the data phase to 21 for uplink 23
13:17:04:setup_element:INFO: Setting the data phase to 28 for uplink 24
13:17:04:setup_element:INFO: Setting the data phase to 30 for uplink 25
13:17:04:setup_element:INFO: Setting the data phase to 29 for uplink 26
13:17:04:setup_element:INFO: Setting the data phase to 33 for uplink 27
13:17:04:setup_element:INFO: Setting the data phase to 34 for uplink 28
13:17:04:setup_element:INFO: Setting the data phase to 36 for uplink 29
13:17:04:setup_element:INFO: Setting the data phase to 37 for uplink 30
13:17:04:setup_element:INFO: Setting the data phase to 38 for uplink 31
13:17:04:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 70
Eye Windows:
Uplink 16: ________________________________________________________________________________
Uplink 17: ________________________________________________________________________________
Uplink 18: ___________________________________________________________________XXXXXXXXX____
Uplink 19: ___________________________________________________________________XXXXXXXXX____
Uplink 20: ___________________________________________________________________XXXXXXXX_____
Uplink 21: ___________________________________________________________________XXXXXXXX_____
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: ___________________________________________________________________XXXXXXX______
Uplink 25: ___________________________________________________________________XXXXXXX______
Uplink 26: ___________________________________________________________________XXXXXXXX_____
Uplink 27: ___________________________________________________________________XXXXXXXX_____
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: _____________________________________________________________________XXXXXXX____
Uplink 31: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 17:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 18:
Optimal Phase: 18
Window Length: 33
Eye Window: _X_________________________________XXXX_
Uplink 19:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 20:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 21:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 22:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 23:
Optimal Phase: 21
Window Length: 29
Eye Window: XXXXXXX_____________________________XXXX
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
]
13:17:04:setup_element:INFO: Beginning SMX ASICs map scan
13:17:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:17:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:17:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:17:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:17:04:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:17:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:17:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:17:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:17:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:17:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:17:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:17:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:17:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:17:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:17:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:17:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:17:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:17:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:17:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:17:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:17:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:17:06:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 70
Eye Windows:
Uplink 16: ________________________________________________________________________________
Uplink 17: ________________________________________________________________________________
Uplink 18: ___________________________________________________________________XXXXXXXXX____
Uplink 19: ___________________________________________________________________XXXXXXXXX____
Uplink 20: ___________________________________________________________________XXXXXXXX_____
Uplink 21: ___________________________________________________________________XXXXXXXX_____
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: ___________________________________________________________________XXXXXXX______
Uplink 25: ___________________________________________________________________XXXXXXX______
Uplink 26: ___________________________________________________________________XXXXXXXX_____
Uplink 27: ___________________________________________________________________XXXXXXXX_____
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: _____________________________________________________________________XXXXXXX____
Uplink 31: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 17:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 18:
Optimal Phase: 18
Window Length: 33
Eye Window: _X_________________________________XXXX_
Uplink 19:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 20:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 21:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 22:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 23:
Optimal Phase: 21
Window Length: 29
Eye Window: XXXXXXX_____________________________XXXX
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
13:17:06:setup_element:INFO: Performing Elink synchronization
13:17:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:17:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:17:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:17:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:17:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:17:06:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:17:07:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
13:17:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:17:08:febtest:INFO: 23-00 | XA-000-08-002-002-006-043-12 | 37.7 | 1195.1
13:17:08:febtest:INFO: 30-01 | XA-000-08-002-002-006-199-13 | 40.9 | 1171.5
13:17:08:febtest:INFO: 21-02 | XA-000-08-002-002-006-206-13 | 44.1 | 1165.6
13:17:09:febtest:INFO: 28-03 | XA-000-08-002-002-006-183-01 | 28.2 | 1218.6
13:17:09:febtest:INFO: 19-04 | XA-000-08-002-002-006-202-13 | 34.6 | 1201.0
13:17:09:febtest:INFO: 26-05 | XA-000-08-002-002-006-219-10 | 40.9 | 1183.3
13:17:09:febtest:INFO: 17-06 | XA-000-08-002-002-006-042-12 | 34.6 | 1201.0
13:17:10:febtest:INFO: 24-07 | XA-000-08-002-002-006-185-01 | 56.8 | 1118.1
13:17:10:febtest:INFO: Init all SMX (CSA): 30
13:17:23:febtest:INFO: Set all CSA to ZERO
13:17:24:febtest:INFO: ['2.450', '0.0001', '1.850', '0.0001', '2.450', '2.0080', '1.851', '0.8272']
13:17:25:ST3_smx:INFO: chip: 23-0 44.073563 C 1153.732915 mV
13:17:25:ST3_smx:INFO: Electrons
13:17:25:ST3_smx:INFO: # loops 0
13:17:26:ST3_smx:INFO: # loops 1
13:17:28:ST3_smx:INFO: # loops 2
13:17:29:ST3_smx:INFO: # loops 3
13:17:31:ST3_smx:INFO: # loops 4
13:17:32:ST3_smx:INFO: Total # of broken channels: 0
13:17:32:ST3_smx:INFO: List of broken channels: []
13:17:32:ST3_smx:INFO: Total # of broken channels: 0
13:17:32:ST3_smx:INFO: List of broken channels: []
13:17:34:ST3_smx:INFO: chip: 30-1 44.073563 C 1153.732915 mV
13:17:34:ST3_smx:INFO: Electrons
13:17:34:ST3_smx:INFO: # loops 0
13:17:36:ST3_smx:INFO: # loops 1
13:17:38:ST3_smx:INFO: # loops 2
13:17:39:ST3_smx:INFO: # loops 3
13:17:41:ST3_smx:INFO: # loops 4
13:17:42:ST3_smx:INFO: Total # of broken channels: 0
13:17:42:ST3_smx:INFO: List of broken channels: []
13:17:42:ST3_smx:INFO: Total # of broken channels: 1
13:17:42:ST3_smx:INFO: List of broken channels: [71]
13:17:44:ST3_smx:INFO: chip: 21-2 50.430383 C 1135.937260 mV
13:17:44:ST3_smx:INFO: Electrons
13:17:44:ST3_smx:INFO: # loops 0
13:17:46:ST3_smx:INFO: # loops 1
13:17:47:ST3_smx:INFO: # loops 2
13:17:49:ST3_smx:INFO: # loops 3
13:17:51:ST3_smx:INFO: # loops 4
13:17:52:ST3_smx:INFO: Total # of broken channels: 0
13:17:52:ST3_smx:INFO: List of broken channels: []
13:17:52:ST3_smx:INFO: Total # of broken channels: 0
13:17:52:ST3_smx:INFO: List of broken channels: []
13:17:54:ST3_smx:INFO: chip: 28-3 40.898880 C 1171.483840 mV
13:17:54:ST3_smx:INFO: Electrons
13:17:54:ST3_smx:INFO: # loops 0
13:17:56:ST3_smx:INFO: # loops 1
13:17:57:ST3_smx:INFO: # loops 2
13:17:58:ST3_smx:INFO: # loops 3
13:18:00:ST3_smx:INFO: # loops 4
13:18:02:ST3_smx:INFO: Total # of broken channels: 0
13:18:02:ST3_smx:INFO: List of broken channels: []
13:18:02:ST3_smx:INFO: Total # of broken channels: 0
13:18:02:ST3_smx:INFO: List of broken channels: []
13:18:04:ST3_smx:INFO: chip: 19-4 40.898880 C 1171.483840 mV
13:18:04:ST3_smx:INFO: Electrons
13:18:04:ST3_smx:INFO: # loops 0
13:18:06:ST3_smx:INFO: # loops 1
13:18:08:ST3_smx:INFO: # loops 2
13:18:09:ST3_smx:INFO: # loops 3
13:18:11:ST3_smx:INFO: # loops 4
13:18:12:ST3_smx:INFO: Total # of broken channels: 0
13:18:12:ST3_smx:INFO: List of broken channels: []
13:18:12:ST3_smx:INFO: Total # of broken channels: 0
13:18:12:ST3_smx:INFO: List of broken channels: []
13:18:14:ST3_smx:INFO: chip: 26-5 50.430383 C 1135.937260 mV
13:18:14:ST3_smx:INFO: Electrons
13:18:14:ST3_smx:INFO: # loops 0
13:18:16:ST3_smx:INFO: # loops 1
13:18:17:ST3_smx:INFO: # loops 2
13:18:19:ST3_smx:INFO: # loops 3
13:18:20:ST3_smx:INFO: # loops 4
13:18:22:ST3_smx:INFO: Total # of broken channels: 0
13:18:22:ST3_smx:INFO: List of broken channels: []
13:18:22:ST3_smx:INFO: Total # of broken channels: 0
13:18:22:ST3_smx:INFO: List of broken channels: []
13:18:24:ST3_smx:INFO: chip: 17-6 44.073563 C 1147.806000 mV
13:18:24:ST3_smx:INFO: Electrons
13:18:24:ST3_smx:INFO: # loops 0
13:18:25:ST3_smx:INFO: # loops 1
13:18:27:ST3_smx:INFO: # loops 2
13:18:28:ST3_smx:INFO: # loops 3
13:18:30:ST3_smx:INFO: # loops 4
13:18:31:ST3_smx:INFO: Total # of broken channels: 0
13:18:31:ST3_smx:INFO: List of broken channels: []
13:18:31:ST3_smx:INFO: Total # of broken channels: 0
13:18:31:ST3_smx:INFO: List of broken channels: []
13:18:33:ST3_smx:INFO: chip: 24-7 53.612520 C 1118.096875 mV
13:18:33:ST3_smx:INFO: Electrons
13:18:33:ST3_smx:INFO: # loops 0
13:18:35:ST3_smx:INFO: # loops 1
13:18:36:ST3_smx:INFO: # loops 2
13:18:38:ST3_smx:INFO: # loops 3
13:18:39:ST3_smx:INFO: # loops 4
13:18:41:ST3_smx:INFO: Total # of broken channels: 0
13:18:41:ST3_smx:INFO: List of broken channels: []
13:18:41:ST3_smx:INFO: Total # of broken channels: 0
13:18:41:ST3_smx:INFO: List of broken channels: []
13:18:42:febtest:INFO: SetCSA :30
13:18:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:18:42:febtest:INFO: 23-00 | XA-000-08-002-002-006-043-12 | 44.1 | 1141.9
13:18:42:febtest:INFO: 30-01 | XA-000-08-002-002-006-199-13 | 47.3 | 1135.9
13:18:42:febtest:INFO: 21-02 | XA-000-08-002-002-006-206-13 | 50.4 | 1124.0
13:18:43:febtest:INFO: 28-03 | XA-000-08-002-002-006-183-01 | 40.9 | 1153.7
13:18:43:febtest:INFO: 19-04 | XA-000-08-002-002-006-202-13 | 40.9 | 1153.7
13:18:43:febtest:INFO: 26-05 | XA-000-08-002-002-006-219-10 | 50.4 | 1124.0
13:18:43:febtest:INFO: 17-06 | XA-000-08-002-002-006-042-12 | 44.1 | 1141.9
13:18:44:febtest:INFO: 24-07 | XA-000-08-002-002-006-185-01 | 53.6 | 1106.2
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_05_21-13_16_52
OPERATOR : Robert V.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2162| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID: 25163
MODULE_NAME: L4DL000161 M4DL0T1001611A2 62 A
MODULE_TYPE:
MODULE_LADDER: L4DL000161
MODULE_MODULE: M4DL0T1001611A2
MODULE_SIZE: 62
MODULE_GRADE: A
------------------------------------------------------------
VI_before_Init : ['2.451', '0.0001', '1.850', '0.0002', '2.450', '1.5090', '1.852', '2.4960']
VI_after__Init : ['2.450', '0.0001', '1.850', '0.0001', '2.450', '2.0460', '1.850', '2.6110']
VI_at__the_End : ['2.449', '0.0001', '1.850', '0.0001', '2.450', '2.0570', '1.850', '2.6110']