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FEB_2164 28.05.24 07:58:59
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07:58:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:58:59:ST3_Shared:INFO: FEB-Sensor
07:58:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:59:02:ST3_ModuleSelector:INFO: L4DL000161 M4DL0B2001612B2 124 A
07:59:02:ST3_ModuleSelector:INFO: 12384
07:59:02:febtest:INFO: Testing FEB with SN 2164
07:59:03:smx_tester:INFO: Scanning setup
07:59:03:elinks:INFO: Disabling clock on downlink 0
07:59:03:elinks:INFO: Disabling clock on downlink 1
07:59:03:elinks:INFO: Disabling clock on downlink 2
07:59:03:elinks:INFO: Disabling clock on downlink 3
07:59:03:elinks:INFO: Disabling clock on downlink 4
07:59:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:59:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:59:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:59:03:elinks:INFO: Disabling clock on downlink 0
07:59:03:elinks:INFO: Disabling clock on downlink 1
07:59:03:elinks:INFO: Disabling clock on downlink 2
07:59:03:elinks:INFO: Disabling clock on downlink 3
07:59:03:elinks:INFO: Disabling clock on downlink 4
07:59:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:59:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:59:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:59:04:elinks:INFO: Disabling clock on downlink 0
07:59:04:elinks:INFO: Disabling clock on downlink 1
07:59:04:elinks:INFO: Disabling clock on downlink 2
07:59:04:elinks:INFO: Disabling clock on downlink 3
07:59:04:elinks:INFO: Disabling clock on downlink 4
07:59:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:59:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:59:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:59:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:59:04:elinks:INFO: Disabling clock on downlink 0
07:59:04:elinks:INFO: Disabling clock on downlink 1
07:59:04:elinks:INFO: Disabling clock on downlink 2
07:59:04:elinks:INFO: Disabling clock on downlink 3
07:59:04:elinks:INFO: Disabling clock on downlink 4
07:59:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:59:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:59:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:59:04:elinks:INFO: Disabling clock on downlink 0
07:59:04:elinks:INFO: Disabling clock on downlink 1
07:59:04:elinks:INFO: Disabling clock on downlink 2
07:59:04:elinks:INFO: Disabling clock on downlink 3
07:59:04:elinks:INFO: Disabling clock on downlink 4
07:59:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:59:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:59:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:59:04:setup_element:INFO: Scanning clock phase
07:59:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:59:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:59:04:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:59:04:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
07:59:04:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
07:59:04:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
07:59:04:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
07:59:04:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
07:59:05:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
07:59:05:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:59:05:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:59:05:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
07:59:05:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
07:59:05:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:59:05:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:59:05:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:59:05:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
07:59:05:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:59:05:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:59:05:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
07:59:05:setup_element:INFO: Scanning data phases
07:59:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:59:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:59:10:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:59:10:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX
Data delay found: 20
07:59:10:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX
Data delay found: 17
07:59:10:setup_element:INFO: Eye window for uplink 18: XXX_________________________________XXXX
Data delay found: 19
07:59:10:setup_element:INFO: Eye window for uplink 19: X_________________________________XXXXXX
Data delay found: 17
07:59:10:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX
Data delay found: 18
07:59:10:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXXX
Data delay found: 16
07:59:10:setup_element:INFO: Eye window for uplink 22: XXXXX__________________________________X
Data delay found: 21
07:59:10:setup_element:INFO: Eye window for uplink 23: XXXXXXXX_____________________________XXX
Data delay found: 22
07:59:10:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
07:59:10:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
07:59:10:setup_element:INFO: Eye window for uplink 26: ___________XXXXX____XXXXXXXXXXXXXXXXXXXX
Data delay found: 5
07:59:10:setup_element:INFO: Eye window for uplink 27: _______________XXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
07:59:10:setup_element:INFO: Eye window for uplink 28: ________________XXXXX___XXXXXXXXXXXXXXXX
Data delay found: 7
07:59:10:setup_element:INFO: Eye window for uplink 29: __________________XXXXXXXXXXXXXXXXXXXXXX
Data delay found: 8
07:59:10:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
07:59:10:setup_element:INFO: Eye window for uplink 31: _________________XXXXXX_________________
Data delay found: 39
07:59:10:setup_element:INFO: Setting the data phase to 20 for uplink 16
07:59:10:setup_element:INFO: Setting the data phase to 17 for uplink 17
07:59:10:setup_element:INFO: Setting the data phase to 19 for uplink 18
07:59:10:setup_element:INFO: Setting the data phase to 17 for uplink 19
07:59:10:setup_element:INFO: Setting the data phase to 18 for uplink 20
07:59:10:setup_element:INFO: Setting the data phase to 16 for uplink 21
07:59:10:setup_element:INFO: Setting the data phase to 21 for uplink 22
07:59:10:setup_element:INFO: Setting the data phase to 22 for uplink 23
07:59:10:setup_element:INFO: Setting the data phase to 29 for uplink 24
07:59:10:setup_element:INFO: Setting the data phase to 31 for uplink 25
07:59:10:setup_element:INFO: Setting the data phase to 5 for uplink 26
07:59:10:setup_element:INFO: Setting the data phase to 7 for uplink 27
07:59:10:setup_element:INFO: Setting the data phase to 7 for uplink 28
07:59:10:setup_element:INFO: Setting the data phase to 8 for uplink 29
07:59:10:setup_element:INFO: Setting the data phase to 39 for uplink 30
07:59:10:setup_element:INFO: Setting the data phase to 39 for uplink 31
07:59:10:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 68
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXX____
Uplink 17: _____________________________________________________________________XXXXXXX____
Uplink 18: _____________________________________________________________________XXXXXXX____
Uplink 19: _____________________________________________________________________XXXXXXX____
Uplink 20: ________________________________________________________________________________
Uplink 21: ________________________________________________________________________________
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: __________________________________________________________________XXXXXXXXX_____
Uplink 25: __________________________________________________________________XXXXXXXXX_____
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: _____________________________________________________________________XXXXXXXXX__
Uplink 29: _____________________________________________________________________XXXXXXXXX__
Uplink 30: ____________________________________________________________________XXXXXXXX____
Uplink 31: ____________________________________________________________________XXXXXXXX____
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 17:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 19:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 20:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 22:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 23:
Optimal Phase: 22
Window Length: 29
Eye Window: XXXXXXXX_____________________________XXX
Uplink 24:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 5
Window Length: 11
Eye Window: ___________XXXXX____XXXXXXXXXXXXXXXXXXXX
Uplink 27:
Optimal Phase: 7
Window Length: 15
Eye Window: _______________XXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 28:
Optimal Phase: 7
Window Length: 16
Eye Window: ________________XXXXX___XXXXXXXXXXXXXXXX
Uplink 29:
Optimal Phase: 8
Window Length: 18
Eye Window: __________________XXXXXXXXXXXXXXXXXXXXXX
Uplink 30:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 31:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
]
07:59:10:setup_element:INFO: Beginning SMX ASICs map scan
07:59:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:59:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:59:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:59:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:59:10:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:59:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:59:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:59:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:59:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:59:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:59:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:59:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:59:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:59:11:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:59:11:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:59:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:59:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:59:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:59:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:59:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:59:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:59:13:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 68
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXX____
Uplink 17: _____________________________________________________________________XXXXXXX____
Uplink 18: _____________________________________________________________________XXXXXXX____
Uplink 19: _____________________________________________________________________XXXXXXX____
Uplink 20: ________________________________________________________________________________
Uplink 21: ________________________________________________________________________________
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: __________________________________________________________________XXXXXXXXX_____
Uplink 25: __________________________________________________________________XXXXXXXXX_____
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: _____________________________________________________________________XXXXXXXXX__
Uplink 29: _____________________________________________________________________XXXXXXXXX__
Uplink 30: ____________________________________________________________________XXXXXXXX____
Uplink 31: ____________________________________________________________________XXXXXXXX____
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 17:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 19:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 20:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 22:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 23:
Optimal Phase: 22
Window Length: 29
Eye Window: XXXXXXXX_____________________________XXX
Uplink 24:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 5
Window Length: 11
Eye Window: ___________XXXXX____XXXXXXXXXXXXXXXXXXXX
Uplink 27:
Optimal Phase: 7
Window Length: 15
Eye Window: _______________XXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 28:
Optimal Phase: 7
Window Length: 16
Eye Window: ________________XXXXX___XXXXXXXXXXXXXXXX
Uplink 29:
Optimal Phase: 8
Window Length: 18
Eye Window: __________________XXXXXXXXXXXXXXXXXXXXXX
Uplink 30:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 31:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
07:59:13:setup_element:INFO: Performing Elink synchronization
07:59:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:59:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:59:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:59:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:59:13:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:59:13:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:59:13:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_21 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_2__upli_21
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
07:59:14:febtest:INFO: Init all SMX (CSA): 30
07:59:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:59:28:febtest:INFO: 23-00 | XA-000-08-002-002-006-156-15 | 31.4 | 1165.6
07:59:28:febtest:INFO: 30-01 | XA-000-08-002-002-006-129-08 | 44.1 | 1124.0
07:59:29:febtest:INFO: 21-02 | XA-000-08-002-002-008-180-08 | 28.2 | 1159.7
07:59:29:febtest:INFO: 28-03 | XA-000-08-002-002-008-163-15 | 31.4 | 1159.7
07:59:29:febtest:INFO: 19-04 | XA-000-08-002-002-008-181-08 | 31.4 | 1153.7
07:59:29:febtest:INFO: 26-05 | XA-000-08-002-002-006-151-15 | 25.1 | 1171.5
07:59:30:febtest:INFO: 17-06 | XA-000-08-002-002-006-161-06 | 28.2 | 1147.8
07:59:30:febtest:INFO: 24-07 | XA-000-08-002-002-008-172-15 | 34.6 | 1135.9
07:59:31:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:59:33:ST3_smx:INFO: chip: 23-0 31.389742 C 1177.390875 mV
07:59:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:33:ST3_smx:INFO: Electrons
07:59:33:ST3_smx:INFO: # loops 0
07:59:34:ST3_smx:INFO: # loops 1
07:59:36:ST3_smx:INFO: # loops 2
07:59:38:ST3_smx:INFO: # loops 3
07:59:39:ST3_smx:INFO: # loops 4
07:59:41:ST3_smx:INFO: Total # of broken channels: 0
07:59:41:ST3_smx:INFO: List of broken channels: []
07:59:41:ST3_smx:INFO: Total # of broken channels: 0
07:59:41:ST3_smx:INFO: List of broken channels: []
07:59:43:ST3_smx:INFO: chip: 30-1 44.073563 C 1135.937260 mV
07:59:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:43:ST3_smx:INFO: Electrons
07:59:43:ST3_smx:INFO: # loops 0
07:59:44:ST3_smx:INFO: # loops 1
07:59:46:ST3_smx:INFO: # loops 2
07:59:48:ST3_smx:INFO: # loops 3
07:59:49:ST3_smx:INFO: # loops 4
07:59:51:ST3_smx:INFO: Total # of broken channels: 0
07:59:51:ST3_smx:INFO: List of broken channels: []
07:59:51:ST3_smx:INFO: Total # of broken channels: 0
07:59:51:ST3_smx:INFO: List of broken channels: []
07:59:53:ST3_smx:INFO: chip: 21-2 31.389742 C 1171.483840 mV
07:59:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:53:ST3_smx:INFO: Electrons
07:59:53:ST3_smx:INFO: # loops 0
07:59:54:ST3_smx:INFO: # loops 1
07:59:56:ST3_smx:INFO: # loops 2
07:59:58:ST3_smx:INFO: # loops 3
07:59:59:ST3_smx:INFO: # loops 4
08:00:01:ST3_smx:INFO: Total # of broken channels: 0
08:00:01:ST3_smx:INFO: List of broken channels: []
08:00:01:ST3_smx:INFO: Total # of broken channels: 0
08:00:01:ST3_smx:INFO: List of broken channels: []
08:00:03:ST3_smx:INFO: chip: 28-3 31.389742 C 1171.483840 mV
08:00:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:03:ST3_smx:INFO: Electrons
08:00:03:ST3_smx:INFO: # loops 0
08:00:04:ST3_smx:INFO: # loops 1
08:00:06:ST3_smx:INFO: # loops 2
08:00:07:ST3_smx:INFO: # loops 3
08:00:09:ST3_smx:INFO: # loops 4
08:00:11:ST3_smx:INFO: Total # of broken channels: 0
08:00:11:ST3_smx:INFO: List of broken channels: []
08:00:11:ST3_smx:INFO: Total # of broken channels: 0
08:00:11:ST3_smx:INFO: List of broken channels: []
08:00:12:ST3_smx:INFO: chip: 19-4 31.389742 C 1165.571835 mV
08:00:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:12:ST3_smx:INFO: Electrons
08:00:12:ST3_smx:INFO: # loops 0
08:00:14:ST3_smx:INFO: # loops 1
08:00:16:ST3_smx:INFO: # loops 2
08:00:17:ST3_smx:INFO: # loops 3
08:00:19:ST3_smx:INFO: # loops 4
08:00:21:ST3_smx:INFO: Total # of broken channels: 0
08:00:21:ST3_smx:INFO: List of broken channels: []
08:00:21:ST3_smx:INFO: Total # of broken channels: 0
08:00:21:ST3_smx:INFO: List of broken channels: []
08:00:22:ST3_smx:INFO: chip: 26-5 28.225000 C 1189.190035 mV
08:00:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:22:ST3_smx:INFO: Electrons
08:00:22:ST3_smx:INFO: # loops 0
08:00:24:ST3_smx:INFO: # loops 1
08:00:26:ST3_smx:INFO: # loops 2
08:00:27:ST3_smx:INFO: # loops 3
08:00:29:ST3_smx:INFO: # loops 4
08:00:31:ST3_smx:INFO: Total # of broken channels: 0
08:00:31:ST3_smx:INFO: List of broken channels: []
08:00:31:ST3_smx:INFO: Total # of broken channels: 0
08:00:31:ST3_smx:INFO: List of broken channels: []
08:00:32:ST3_smx:INFO: chip: 17-6 31.389742 C 1159.654860 mV
08:00:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:32:ST3_smx:INFO: Electrons
08:00:32:ST3_smx:INFO: # loops 0
08:00:34:ST3_smx:INFO: # loops 1
08:00:35:ST3_smx:INFO: # loops 2
08:00:37:ST3_smx:INFO: # loops 3
08:00:39:ST3_smx:INFO: # loops 4
08:00:40:ST3_smx:INFO: Total # of broken channels: 0
08:00:40:ST3_smx:INFO: List of broken channels: []
08:00:40:ST3_smx:INFO: Total # of broken channels: 0
08:00:40:ST3_smx:INFO: List of broken channels: []
08:00:42:ST3_smx:INFO: chip: 24-7 37.726682 C 1141.874115 mV
08:00:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:42:ST3_smx:INFO: Electrons
08:00:42:ST3_smx:INFO: # loops 0
08:00:44:ST3_smx:INFO: # loops 1
08:00:45:ST3_smx:INFO: # loops 2
08:00:47:ST3_smx:INFO: # loops 3
08:00:48:ST3_smx:INFO: # loops 4
08:00:50:ST3_smx:INFO: Total # of broken channels: 0
08:00:50:ST3_smx:INFO: List of broken channels: []
08:00:50:ST3_smx:INFO: Total # of broken channels: 0
08:00:50:ST3_smx:INFO: List of broken channels: []
08:00:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:00:50:febtest:INFO: 23-00 | XA-000-08-002-002-006-156-15 | 31.4 | 1201.0
08:00:51:febtest:INFO: 30-01 | XA-000-08-002-002-006-129-08 | 47.3 | 1153.7
08:00:51:febtest:INFO: 21-02 | XA-000-08-002-002-008-180-08 | 31.4 | 1189.2
08:00:51:febtest:INFO: 28-03 | XA-000-08-002-002-008-163-15 | 34.6 | 1189.2
08:00:51:febtest:INFO: 19-04 | XA-000-08-002-002-008-181-08 | 34.6 | 1183.3
08:00:52:febtest:INFO: 26-05 | XA-000-08-002-002-006-151-15 | 28.2 | 1206.9
08:00:52:febtest:INFO: 17-06 | XA-000-08-002-002-006-161-06 | 31.4 | 1177.4
08:00:52:febtest:INFO: 24-07 | XA-000-08-002-002-008-172-15 | 40.9 | 1159.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_05_28-07_58_59
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2164| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID: 12384
MODULE_NAME: L4DL000161 M4DL0B2001612B2 124 A
MODULE_TYPE:
MODULE_LADDER:
MODULE_MODULE:
MODULE_SIZE: 0
MODULE_GRADE:
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9790', '1.852', '2.9390']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.1150', '1.849', '2.6790']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0090', '1.850', '0.5284']