11:52:45:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:52:45:ST3_Shared:INFO:	                       FEB-Microcable                       
11:52:45:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:52:45:febtest:INFO:	Testing FEB with SN 2167
11:52:48:smx_tester:INFO:	Scanning setup
11:52:48:elinks:INFO:	Disabling clock on downlink 0
11:52:48:elinks:INFO:	Disabling clock on downlink 1
11:52:48:elinks:INFO:	Disabling clock on downlink 2
11:52:48:elinks:INFO:	Disabling clock on downlink 3
11:52:48:elinks:INFO:	Disabling clock on downlink 4
11:52:48:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:52:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:52:48:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:52:48:elinks:INFO:	Disabling clock on downlink 0
11:52:48:elinks:INFO:	Disabling clock on downlink 1
11:52:48:elinks:INFO:	Disabling clock on downlink 2
11:52:48:elinks:INFO:	Disabling clock on downlink 3
11:52:48:elinks:INFO:	Disabling clock on downlink 4
11:52:48:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:52:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:52:48:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:52:48:elinks:INFO:	Disabling clock on downlink 0
11:52:48:elinks:INFO:	Disabling clock on downlink 1
11:52:48:elinks:INFO:	Disabling clock on downlink 2
11:52:48:elinks:INFO:	Disabling clock on downlink 3
11:52:48:elinks:INFO:	Disabling clock on downlink 4
11:52:48:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:52:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
11:52:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
11:52:48:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:52:48:elinks:INFO:	Disabling clock on downlink 0
11:52:48:elinks:INFO:	Disabling clock on downlink 1
11:52:48:elinks:INFO:	Disabling clock on downlink 2
11:52:48:elinks:INFO:	Disabling clock on downlink 3
11:52:48:elinks:INFO:	Disabling clock on downlink 4
11:52:48:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:52:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:52:48:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:52:48:elinks:INFO:	Disabling clock on downlink 0
11:52:48:elinks:INFO:	Disabling clock on downlink 1
11:52:48:elinks:INFO:	Disabling clock on downlink 2
11:52:48:elinks:INFO:	Disabling clock on downlink 3
11:52:48:elinks:INFO:	Disabling clock on downlink 4
11:52:48:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:52:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:52:49:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:52:49:setup_element:INFO:	Scanning clock phase
11:52:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:52:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:52:49:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
11:52:49:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:52:49:setup_element:INFO:	Eye window for uplink 17: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:52:49:setup_element:INFO:	Eye window for uplink 18: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:52:49:setup_element:INFO:	Eye window for uplink 19: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:52:49:setup_element:INFO:	Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:52:49:setup_element:INFO:	Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:52:49:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:52:49:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:52:49:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:52:49:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:52:49:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:52:49:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:52:49:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:52:49:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:52:49:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
11:52:49:setup_element:INFO:	Scanning data phases
11:52:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:52:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:52:55:setup_element:INFO:	Data phase scan results for group 0, downlink 2
11:52:55:setup_element:INFO:	Eye window for uplink 16: _XXXX___________________________________
Data delay found: 22
11:52:55:setup_element:INFO:	Eye window for uplink 17: XXX___________________________________XX
Data delay found: 20
11:52:55:setup_element:INFO:	Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
11:52:55:setup_element:INFO:	Eye window for uplink 19: XX_________________________________XXXXX
Data delay found: 18
11:52:55:setup_element:INFO:	Eye window for uplink 20: XXX____________________________________X
Data delay found: 20
11:52:55:setup_element:INFO:	Eye window for uplink 21: XX___________________________________XXX
Data delay found: 19
11:52:55:setup_element:INFO:	Eye window for uplink 24: _________XXXXXX_________________________
Data delay found: 31
11:52:55:setup_element:INFO:	Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
11:52:55:setup_element:INFO:	Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
11:52:55:setup_element:INFO:	Eye window for uplink 27: _________XXXXXX_________________________
Data delay found: 31
11:52:55:setup_element:INFO:	Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
11:52:55:setup_element:INFO:	Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
11:52:55:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
11:52:55:setup_element:INFO:	Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
11:52:55:setup_element:INFO:	Setting the data phase to 22 for uplink 16
11:52:55:setup_element:INFO:	Setting the data phase to 20 for uplink 17
11:52:55:setup_element:INFO:	Setting the data phase to 18 for uplink 18
11:52:55:setup_element:INFO:	Setting the data phase to 18 for uplink 19
11:52:55:setup_element:INFO:	Setting the data phase to 20 for uplink 20
11:52:55:setup_element:INFO:	Setting the data phase to 19 for uplink 21
11:52:55:setup_element:INFO:	Setting the data phase to 31 for uplink 24
11:52:55:setup_element:INFO:	Setting the data phase to 33 for uplink 25
11:52:55:setup_element:INFO:	Setting the data phase to 28 for uplink 26
11:52:55:setup_element:INFO:	Setting the data phase to 31 for uplink 27
11:52:55:setup_element:INFO:	Setting the data phase to 33 for uplink 28
11:52:55:setup_element:INFO:	Setting the data phase to 35 for uplink 29
11:52:55:setup_element:INFO:	Setting the data phase to 37 for uplink 30
11:52:55:setup_element:INFO:	Setting the data phase to 37 for uplink 31
11:52:55:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXXX___
      Uplink 17: ______________________________________________________________________XXXXXXX___
      Uplink 18: ______________________________________________________________________XXXXXX____
      Uplink 19: ______________________________________________________________________XXXXXX____
      Uplink 20: _____________________________________________________________________XXXXXXXXX__
      Uplink 21: _____________________________________________________________________XXXXXXXXX__
      Uplink 24: _____________________________________________________________________XXXXXXXX___
      Uplink 25: _____________________________________________________________________XXXXXXXX___
      Uplink 26: ____________________________________________________________________XXXXXXXX____
      Uplink 27: ____________________________________________________________________XXXXXXXX____
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXXXXX__
      Uplink 31: _____________________________________________________________________XXXXXXXXX__
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________
    Uplink 17:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 20:
      Optimal Phase: 20
      Window Length: 36
      Eye Window: XXX____________________________________X
    Uplink 21:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 24:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 25:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 28:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 31:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
]
11:52:55:setup_element:INFO:	Beginning SMX ASICs map scan
11:52:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:52:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:52:55:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:52:55:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:52:55:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
11:52:55:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:52:55:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:52:55:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:52:55:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:52:55:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:52:55:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:52:55:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:52:56:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:52:56:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:52:56:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:52:56:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:52:56:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:52:56:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:52:56:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:52:57:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXXX___
      Uplink 17: ______________________________________________________________________XXXXXXX___
      Uplink 18: ______________________________________________________________________XXXXXX____
      Uplink 19: ______________________________________________________________________XXXXXX____
      Uplink 20: _____________________________________________________________________XXXXXXXXX__
      Uplink 21: _____________________________________________________________________XXXXXXXXX__
      Uplink 24: _____________________________________________________________________XXXXXXXX___
      Uplink 25: _____________________________________________________________________XXXXXXXX___
      Uplink 26: ____________________________________________________________________XXXXXXXX____
      Uplink 27: ____________________________________________________________________XXXXXXXX____
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXXXXX__
      Uplink 31: _____________________________________________________________________XXXXXXXXX__
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________
    Uplink 17:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 20:
      Optimal Phase: 20
      Window Length: 36
      Eye Window: XXX____________________________________X
    Uplink 21:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 24:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 25:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 28:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 31:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________

11:52:57:setup_element:INFO:	Performing Elink synchronization
11:52:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:52:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:52:58:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:52:58:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:52:58:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
11:52:58:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
11:52:58:ST3_emu:INFO:	Number of chips: 7
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
FEB type: B FEB_A: 0 FEB_B: 1
11:52:58:febtest:ERROR:	HW addres 1 != 0
11:53:01:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:53:01:febtest:INFO:	30-01 | XA-000-08-002-002-008-170-15 |  25.1 | 1236.2
11:53:02:febtest:INFO:	21-02 | XA-000-08-002-002-008-158-06 |  60.0 | 1112.1
11:53:02:febtest:INFO:	28-03 | XA-000-08-002-002-008-166-15 |  47.3 | 1159.7
11:53:02:febtest:INFO:	19-04 | XA-000-08-002-002-008-148-06 |  40.9 | 1189.2
11:53:02:febtest:INFO:	26-05 | XA-000-08-002-002-008-165-15 |  18.7 | 1253.7
11:53:03:febtest:INFO:	17-06 | XA-000-08-002-002-008-151-06 |  34.6 | 1230.3
11:53:03:febtest:INFO:	24-07 | XA-000-08-002-002-008-149-06 |  47.3 | 1159.7
11:53:03:febtest:INFO:	Init all SMX (CSA): 30
11:53:14:febtest:INFO:	Set all CSA to ZERO
11:53:15:febtest:INFO:	['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9810', '1.850', '0.9558']
11:53:16:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1177.390875 mV
11:53:16:ST3_smx:INFO:		Electrons
11:53:16:ST3_smx:INFO:	# loops 0
11:53:18:ST3_smx:INFO:	# loops 1
11:53:19:ST3_smx:INFO:	# loops 2
11:53:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:53:21:ST3_smx:INFO:	Total # of broken channels: 24
11:53:21:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 105, 107, 109, 113, 121]
11:53:21:ST3_smx:INFO:	Total # of broken channels: 64
11:53:21:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
11:53:23:ST3_smx:INFO:	chip: 21-2 	 56.797143 C 	 1100.211760 mV
11:53:23:ST3_smx:INFO:		Electrons
11:53:23:ST3_smx:INFO:	# loops 0
11:53:25:ST3_smx:INFO:	# loops 1
11:53:26:ST3_smx:INFO:	# loops 2
11:53:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:53:28:ST3_smx:INFO:	Total # of broken channels: 52
11:53:28:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 55, 57, 61, 65, 69, 71, 73, 75, 77, 79, 81, 83, 87, 89, 91, 95, 99, 101, 103, 105, 107, 109, 111, 115, 119, 121]
11:53:28:ST3_smx:INFO:	Total # of broken channels: 64
11:53:28:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
11:53:29:ST3_smx:INFO:	chip: 28-3 	 47.250730 C 	 1129.995435 mV
11:53:29:ST3_smx:INFO:		Electrons
11:53:29:ST3_smx:INFO:	# loops 0
11:53:31:ST3_smx:INFO:	# loops 1
11:53:33:ST3_smx:INFO:	# loops 2
11:53:34:ST3_smx:INFO:	Total # of broken channels: 24
11:53:34:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 47, 49, 55]
11:53:34:ST3_smx:INFO:	Total # of broken channels: 64
11:53:34:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
11:53:36:ST3_smx:INFO:	chip: 19-4 	 34.556970 C 	 1189.190035 mV
11:53:36:ST3_smx:INFO:		Electrons
11:53:36:ST3_smx:INFO:	# loops 0
11:53:38:ST3_smx:INFO:	# loops 1
11:53:39:ST3_smx:INFO:	# loops 2
11:53:41:ST3_smx:INFO:	Total # of broken channels: 28
11:53:41:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55]
11:53:41:ST3_smx:INFO:	Total # of broken channels: 81
11:53:41:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 90, 91, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 127]
11:53:42:ST3_smx:INFO:	chip: 26-5 	 18.745682 C 	 1230.330540 mV
11:53:42:ST3_smx:INFO:		Electrons
11:53:42:ST3_smx:INFO:	# loops 0
11:53:44:ST3_smx:INFO:	# loops 1
11:53:46:ST3_smx:INFO:	# loops 2
11:53:47:ST3_smx:INFO:	Total # of broken channels: 11
11:53:47:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 15, 17, 21, 23, 25]
11:53:47:ST3_smx:INFO:	Total # of broken channels: 64
11:53:47:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 16, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 121, 123, 125, 127]
11:53:49:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1189.190035 mV
11:53:49:ST3_smx:INFO:		Electrons
11:53:49:ST3_smx:INFO:	# loops 0
11:53:51:ST3_smx:INFO:	# loops 1
11:53:52:ST3_smx:INFO:	# loops 2
11:53:54:ST3_smx:INFO:	Total # of broken channels: 0
11:53:54:ST3_smx:INFO:	List of broken channels: []
11:53:54:ST3_smx:INFO:	Total # of broken channels: 60
11:53:54:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119]
11:53:55:ST3_smx:INFO:	chip: 24-7 	 44.073563 C 	 1153.732915 mV
11:53:55:ST3_smx:INFO:		Electrons
11:53:55:ST3_smx:INFO:	# loops 0
11:53:57:ST3_smx:INFO:	# loops 1
11:53:59:ST3_smx:INFO:	# loops 2
11:54:00:ST3_smx:INFO:	Total # of broken channels: 0
11:54:00:ST3_smx:INFO:	List of broken channels: []
11:54:00:ST3_smx:INFO:	Total # of broken channels: 0
11:54:00:ST3_smx:INFO:	List of broken channels: []
11:54:01:febtest:INFO:	SetCSA :30
11:54:01:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:54:01:febtest:INFO:	30-01 | XA-000-08-002-002-008-170-15 |  34.6 | 1159.7
11:54:02:febtest:INFO:	21-02 | XA-000-08-002-002-008-158-06 |  56.8 | 1094.2
11:54:02:febtest:INFO:	28-03 | XA-000-08-002-002-008-166-15 |  47.3 | 1112.1
11:54:02:febtest:INFO:	19-04 | XA-000-08-002-002-008-148-06 |  37.7 | 1177.4
11:54:02:febtest:INFO:	26-05 | XA-000-08-002-002-008-165-15 |  18.7 | 1218.6
11:54:03:febtest:INFO:	17-06 | XA-000-08-002-002-008-151-06 |  37.7 | 1183.3
11:54:03:febtest:INFO:	24-07 | XA-000-08-002-002-008-149-06 |  44.1 | 1141.9
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_05_16-11_52_45
OPERATOR  : Oleksandr S.; Ralf K.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2167| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0040', '1.852', '2.3540']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0040', '1.850', '2.6710']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0070', '1.850', '2.6710']