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FEB_2168 16.05.24 08:21:30
Info
08:21:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:21:30:ST3_Shared:INFO: FEB-ASIC
08:21:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:21:31:febtest:INFO: Testing FEB with SN 2168
08:21:33:smx_tester:INFO: Scanning setup
08:21:33:elinks:INFO: Disabling clock on downlink 0
08:21:33:elinks:INFO: Disabling clock on downlink 1
08:21:33:elinks:INFO: Disabling clock on downlink 2
08:21:33:elinks:INFO: Disabling clock on downlink 3
08:21:33:elinks:INFO: Disabling clock on downlink 4
08:21:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:21:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:21:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:21:34:elinks:INFO: Disabling clock on downlink 0
08:21:34:elinks:INFO: Disabling clock on downlink 1
08:21:34:elinks:INFO: Disabling clock on downlink 2
08:21:34:elinks:INFO: Disabling clock on downlink 3
08:21:34:elinks:INFO: Disabling clock on downlink 4
08:21:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:21:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:21:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:21:34:elinks:INFO: Disabling clock on downlink 0
08:21:34:elinks:INFO: Disabling clock on downlink 1
08:21:34:elinks:INFO: Disabling clock on downlink 2
08:21:34:elinks:INFO: Disabling clock on downlink 3
08:21:34:elinks:INFO: Disabling clock on downlink 4
08:21:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:21:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:21:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:21:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:21:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:21:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:21:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:21:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:21:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:21:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:21:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:21:34:elinks:INFO: Disabling clock on downlink 0
08:21:34:elinks:INFO: Disabling clock on downlink 1
08:21:34:elinks:INFO: Disabling clock on downlink 2
08:21:34:elinks:INFO: Disabling clock on downlink 3
08:21:34:elinks:INFO: Disabling clock on downlink 4
08:21:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:21:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:21:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:21:34:elinks:INFO: Disabling clock on downlink 0
08:21:34:elinks:INFO: Disabling clock on downlink 1
08:21:34:elinks:INFO: Disabling clock on downlink 2
08:21:34:elinks:INFO: Disabling clock on downlink 3
08:21:34:elinks:INFO: Disabling clock on downlink 4
08:21:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:21:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:21:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:21:34:setup_element:INFO: Scanning clock phase
08:21:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:21:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:21:35:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:21:35:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:21:35:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:21:35:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:21:35:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:21:35:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:21:35:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:21:35:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:21:35:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:21:35:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
08:21:35:setup_element:INFO: Scanning data phases
08:21:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:21:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:21:40:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:21:40:setup_element:INFO: Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
08:21:40:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
08:21:40:setup_element:INFO: Eye window for uplink 26: _________XXXXX__________________________
Data delay found: 31
08:21:40:setup_element:INFO: Eye window for uplink 27: ____________XXXXX_______________________
Data delay found: 34
08:21:40:setup_element:INFO: Eye window for uplink 28: _____________XXXXXX_____________________
Data delay found: 35
08:21:40:setup_element:INFO: Eye window for uplink 29: ________________XXXXXX__________________
Data delay found: 38
08:21:40:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
08:21:40:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXX___________________
Data delay found: 37
08:21:40:setup_element:INFO: Setting the data phase to 31 for uplink 24
08:21:40:setup_element:INFO: Setting the data phase to 33 for uplink 25
08:21:40:setup_element:INFO: Setting the data phase to 31 for uplink 26
08:21:40:setup_element:INFO: Setting the data phase to 34 for uplink 27
08:21:40:setup_element:INFO: Setting the data phase to 35 for uplink 28
08:21:40:setup_element:INFO: Setting the data phase to 38 for uplink 29
08:21:40:setup_element:INFO: Setting the data phase to 36 for uplink 30
08:21:40:setup_element:INFO: Setting the data phase to 37 for uplink 31
08:21:40:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 71
Eye Windows:
Uplink 24: ___________________________________________________________________XXXXXXXXX____
Uplink 25: ___________________________________________________________________XXXXXXXXX____
Uplink 26: ___________________________________________________________________XXXXXXXX_____
Uplink 27: ___________________________________________________________________XXXXXXXX_____
Uplink 28: ___________________________________________________________________XXXXXXXXX____
Uplink 29: ___________________________________________________________________XXXXXXXXX____
Uplink 30: ___________________________________________________________________XXXXXXXXX____
Uplink 31: ___________________________________________________________________XXXXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 25:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 26:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 27:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 28:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 29:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
]
08:21:40:setup_element:INFO: Beginning SMX ASICs map scan
08:21:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:21:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:21:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:21:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:21:40:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:21:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:21:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:21:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:21:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:21:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:21:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:21:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:21:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:21:43:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 71
Eye Windows:
Uplink 24: ___________________________________________________________________XXXXXXXXX____
Uplink 25: ___________________________________________________________________XXXXXXXXX____
Uplink 26: ___________________________________________________________________XXXXXXXX_____
Uplink 27: ___________________________________________________________________XXXXXXXX_____
Uplink 28: ___________________________________________________________________XXXXXXXXX____
Uplink 29: ___________________________________________________________________XXXXXXXXX____
Uplink 30: ___________________________________________________________________XXXXXXXXX____
Uplink 31: ___________________________________________________________________XXXXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 25:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 26:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 27:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 28:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 29:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
08:21:43:setup_element:INFO: Performing Elink synchronization
08:21:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:21:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:21:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:21:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:21:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:21:43:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
08:21:43:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
FEB type: B FEB_A: 0 FEB_B: 1
08:21:43:febtest:WARNING: Chip address is 0!!!
08:21:43:febtest:ERROR: addres 0
08:21:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:21:47:febtest:INFO: 30-01 | -000-00-000-000-000-000-00 | 34.6 | 1165.6
08:21:47:febtest:INFO: 28-03 | XA-000-08-002-000-007-078-03 | 21.9 | 1195.1
08:21:48:febtest:INFO: 26-05 | XA-000-08-002-000-007-079-03 | 28.2 | 1183.3
08:21:48:febtest:INFO: 24-07 | XA-000-08-002-000-007-082-04 | 28.2 | 1183.3
08:21:50:ST3_smx:INFO: chip: 30-1 25.062742 C 1177.390875 mV
08:21:50:ST3_smx:INFO: Electrons
08:21:50:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:21:52:ST3_smx:INFO: ----> Checking Analog response
08:21:52:ST3_smx:INFO: ----> Checking broken channels
08:21:52:ST3_smx:INFO: Total # broken ch: 5
08:21:52:ST3_smx:INFO: List FAST: [53, 64, 86, 113, 116]
08:21:52:ST3_smx:INFO: List SLOW: []
08:21:52:ST3_smx:INFO: Holes
08:21:52:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:21:55:ST3_smx:INFO: ----> Checking Analog response
08:21:55:ST3_smx:INFO: ----> Checking broken channels
08:21:55:ST3_smx:INFO: Total # broken ch: 5
08:21:55:ST3_smx:INFO: List FAST: [53, 64, 86, 113, 116]
08:21:55:ST3_smx:INFO: List SLOW: []
08:21:57:ST3_smx:INFO: chip: 28-3 25.062742 C 1159.654860 mV
08:21:58:ST3_smx:INFO: Electrons
08:21:58:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:22:00:ST3_smx:INFO: ----> Checking Analog response
08:22:00:ST3_smx:INFO: ----> Checking broken channels
08:22:00:ST3_smx:INFO: Total # broken ch: 3
08:22:00:ST3_smx:INFO: List FAST: [57, 97, 118]
08:22:00:ST3_smx:INFO: List SLOW: []
08:22:00:ST3_smx:INFO: Holes
08:22:00:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:22:02:ST3_smx:INFO: ----> Checking Analog response
08:22:02:ST3_smx:INFO: ----> Checking broken channels
08:22:03:ST3_smx:INFO: Total # broken ch: 3
08:22:03:ST3_smx:INFO: List FAST: [57, 97, 118]
08:22:03:ST3_smx:INFO: List SLOW: []
08:22:05:ST3_smx:INFO: chip: 26-5 28.225000 C 1159.654860 mV
08:22:05:ST3_smx:INFO: Electrons
08:22:05:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:22:07:ST3_smx:INFO: ----> Checking Analog response
08:22:07:ST3_smx:INFO: ----> Checking broken channels
08:22:08:ST3_smx:INFO: Total # broken ch: 2
08:22:08:ST3_smx:INFO: List FAST: [48, 125]
08:22:08:ST3_smx:INFO: List SLOW: []
08:22:08:ST3_smx:INFO: Holes
08:22:08:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:22:10:ST3_smx:INFO: ----> Checking Analog response
08:22:10:ST3_smx:INFO: ----> Checking broken channels
08:22:10:ST3_smx:INFO: Total # broken ch: 2
08:22:10:ST3_smx:INFO: List FAST: [48, 125]
08:22:10:ST3_smx:INFO: List SLOW: []
08:22:13:ST3_smx:INFO: chip: 24-7 25.062742 C 1183.292940 mV
08:22:13:ST3_smx:INFO: Electrons
08:22:13:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:22:15:ST3_smx:INFO: ----> Checking Analog response
08:22:15:ST3_smx:INFO: ----> Checking broken channels
08:22:15:ST3_smx:INFO: Total # broken ch: 4
08:22:15:ST3_smx:INFO: List FAST: [31, 53, 101, 104]
08:22:15:ST3_smx:INFO: List SLOW: []
08:22:15:ST3_smx:INFO: Holes
08:22:15:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:22:18:ST3_smx:INFO: ----> Checking Analog response
08:22:18:ST3_smx:INFO: ----> Checking broken channels
08:22:18:ST3_smx:INFO: Total # broken ch: 4
08:22:18:ST3_smx:INFO: List FAST: [31, 53, 101, 104]
08:22:18:ST3_smx:INFO: List SLOW: []
08:22:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:22:19:febtest:INFO: 30-01 | -000-00-000-000-000-000-00 | 25.1 | 1201.0
08:22:19:febtest:INFO: 28-03 | XA-000-08-002-000-007-078-03 | 28.2 | 1183.3
08:22:19:febtest:INFO: 26-05 | XA-000-08-002-000-007-079-03 | 31.4 | 1177.4
08:22:20:febtest:INFO: 24-07 | XA-000-08-002-000-007-082-04 | 28.2 | 1195.1
############################################################
# S U M M A R Y #
############################################################
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_05_16-08_21_30
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2168| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
MODULE_NAME
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0340', '1.852', '1.3420']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0170', '1.850', '0.1611']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0170', '1.850', '0.1611']