Go Back
FEB_2169 29.05.24 10:30:17
TextEdit.txt
10:30:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:30:17:ST3_Shared:INFO: FEB-Microcable
10:30:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:30:17:febtest:INFO: Testing FEB with SN 2169
10:30:18:smx_tester:INFO: Scanning setup
10:30:18:elinks:INFO: Disabling clock on downlink 0
10:30:18:elinks:INFO: Disabling clock on downlink 1
10:30:18:elinks:INFO: Disabling clock on downlink 2
10:30:18:elinks:INFO: Disabling clock on downlink 3
10:30:18:elinks:INFO: Disabling clock on downlink 4
10:30:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:30:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:30:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:30:19:elinks:INFO: Disabling clock on downlink 0
10:30:19:elinks:INFO: Disabling clock on downlink 1
10:30:19:elinks:INFO: Disabling clock on downlink 2
10:30:19:elinks:INFO: Disabling clock on downlink 3
10:30:19:elinks:INFO: Disabling clock on downlink 4
10:30:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:30:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:30:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:30:19:elinks:INFO: Disabling clock on downlink 0
10:30:19:elinks:INFO: Disabling clock on downlink 1
10:30:19:elinks:INFO: Disabling clock on downlink 2
10:30:19:elinks:INFO: Disabling clock on downlink 3
10:30:19:elinks:INFO: Disabling clock on downlink 4
10:30:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:30:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:30:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:30:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:30:19:elinks:INFO: Disabling clock on downlink 0
10:30:19:elinks:INFO: Disabling clock on downlink 1
10:30:19:elinks:INFO: Disabling clock on downlink 2
10:30:19:elinks:INFO: Disabling clock on downlink 3
10:30:19:elinks:INFO: Disabling clock on downlink 4
10:30:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:30:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:30:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:30:19:elinks:INFO: Disabling clock on downlink 0
10:30:19:elinks:INFO: Disabling clock on downlink 1
10:30:19:elinks:INFO: Disabling clock on downlink 2
10:30:19:elinks:INFO: Disabling clock on downlink 3
10:30:19:elinks:INFO: Disabling clock on downlink 4
10:30:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:30:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:30:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:30:19:setup_element:INFO: Scanning clock phase
10:30:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:30:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:30:20:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:30:20:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:30:20:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:30:20:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:30:20:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:30:20:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:30:20:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:30:20:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:30:20:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:30:20:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:30:20:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:30:20:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:30:20:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:30:20:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:30:20:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:30:20:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:30:20:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:30:20:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
10:30:20:setup_element:INFO: Scanning data phases
10:30:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:30:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:30:25:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:30:25:setup_element:INFO: Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
10:30:25:setup_element:INFO: Eye window for uplink 17: ___________________________________XXXXX
Data delay found: 17
10:30:25:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
10:30:25:setup_element:INFO: Eye window for uplink 19: X_________________________________XXXXX_
Data delay found: 17
10:30:25:setup_element:INFO: Eye window for uplink 20: ____________________________________XXXX
Data delay found: 17
10:30:25:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXXX
Data delay found: 16
10:30:25:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
10:30:25:setup_element:INFO: Eye window for uplink 23: XXXX_____________________________XXXXXXX
Data delay found: 18
10:30:25:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
10:30:25:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
10:30:25:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
10:30:25:setup_element:INFO: Eye window for uplink 27: ______________XXXXX_____________________
Data delay found: 36
10:30:25:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
10:30:25:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
10:30:25:setup_element:INFO: Eye window for uplink 30: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 0
10:30:25:setup_element:INFO: Eye window for uplink 31: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 0
10:30:25:setup_element:INFO: Setting the data phase to 19 for uplink 16
10:30:25:setup_element:INFO: Setting the data phase to 17 for uplink 17
10:30:25:setup_element:INFO: Setting the data phase to 19 for uplink 18
10:30:25:setup_element:INFO: Setting the data phase to 17 for uplink 19
10:30:25:setup_element:INFO: Setting the data phase to 17 for uplink 20
10:30:25:setup_element:INFO: Setting the data phase to 16 for uplink 21
10:30:25:setup_element:INFO: Setting the data phase to 17 for uplink 22
10:30:25:setup_element:INFO: Setting the data phase to 18 for uplink 23
10:30:25:setup_element:INFO: Setting the data phase to 29 for uplink 24
10:30:25:setup_element:INFO: Setting the data phase to 31 for uplink 25
10:30:25:setup_element:INFO: Setting the data phase to 32 for uplink 26
10:30:25:setup_element:INFO: Setting the data phase to 36 for uplink 27
10:30:25:setup_element:INFO: Setting the data phase to 35 for uplink 28
10:30:25:setup_element:INFO: Setting the data phase to 37 for uplink 29
10:30:25:setup_element:INFO: Setting the data phase to 0 for uplink 30
10:30:25:setup_element:INFO: Setting the data phase to 0 for uplink 31
10:30:25:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 70
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: ____________________________________________________________________XXXXXXXX____
Uplink 21: ____________________________________________________________________XXXXXXXX____
Uplink 22: ____________________________________________________________________XXXXXXXX____
Uplink 23: ____________________________________________________________________XXXXXXXX____
Uplink 24: ___________________________________________________________________XXXXXXXX_____
Uplink 25: ___________________________________________________________________XXXXXXXX_____
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: ____________________________________________________________________XXXXXXXX____
Uplink 29: ____________________________________________________________________XXXXXXXX____
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 17:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 19:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 20:
Optimal Phase: 17
Window Length: 36
Eye Window: ____________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 23:
Optimal Phase: 18
Window Length: 29
Eye Window: XXXX_____________________________XXXXXXX
Uplink 24:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 30:
Optimal Phase: 0
Window Length: 2
Eye Window: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 31:
Optimal Phase: 0
Window Length: 2
Eye Window: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
]
10:30:25:setup_element:INFO: Beginning SMX ASICs map scan
10:30:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:30:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:30:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:30:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:30:26:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:30:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:30:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:30:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:30:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:30:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:30:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:30:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:30:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:30:26:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:30:26:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:30:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:30:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:30:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:30:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:30:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:30:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:30:28:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 70
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: ____________________________________________________________________XXXXXXXX____
Uplink 21: ____________________________________________________________________XXXXXXXX____
Uplink 22: ____________________________________________________________________XXXXXXXX____
Uplink 23: ____________________________________________________________________XXXXXXXX____
Uplink 24: ___________________________________________________________________XXXXXXXX_____
Uplink 25: ___________________________________________________________________XXXXXXXX_____
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: ____________________________________________________________________XXXXXXXX____
Uplink 29: ____________________________________________________________________XXXXXXXX____
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 17:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 19:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 20:
Optimal Phase: 17
Window Length: 36
Eye Window: ____________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 23:
Optimal Phase: 18
Window Length: 29
Eye Window: XXXX_____________________________XXXXXXX
Uplink 24:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 30:
Optimal Phase: 0
Window Length: 2
Eye Window: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 31:
Optimal Phase: 0
Window Length: 2
Eye Window: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
10:30:28:setup_element:INFO: Performing Elink synchronization
10:30:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:30:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:30:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:30:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:30:28:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:30:28:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:30:29:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
10:30:29:febtest:INFO: Init all SMX (CSA): 30
10:30:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:30:43:febtest:INFO: 23-00 | XA-000-08-002-000-007-202-09 | 60.0 | 1094.2
10:30:43:febtest:INFO: 30-01 | XA-000-08-002-000-007-212-14 | 50.4 | 1130.0
10:30:44:febtest:INFO: 21-02 | XA-000-08-002-000-007-193-09 | 40.9 | 1159.7
10:30:44:febtest:INFO: 28-03 | XA-000-08-002-000-007-206-09 | 44.1 | 1147.8
10:30:44:febtest:INFO: 19-04 | XA-000-08-002-000-007-208-14 | 37.7 | 1165.6
10:30:44:febtest:INFO: 26-05 | XA-000-08-002-001-006-018-04 | 44.1 | 1135.9
10:30:45:febtest:INFO: 17-06 | XA-000-08-002-000-007-204-09 | 47.3 | 1130.0
10:30:45:febtest:INFO: 24-07 | XA-000-08-002-001-006-056-10 | 47.3 | 1124.0
10:30:46:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:30:48:ST3_smx:INFO: chip: 23-0 59.984250 C 1106.178435 mV
10:30:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:48:ST3_smx:INFO: Electrons
10:30:48:ST3_smx:INFO: # loops 0
10:30:49:ST3_smx:INFO: # loops 1
10:30:51:ST3_smx:INFO: # loops 2
10:30:53:ST3_smx:INFO: Total # of broken channels: 0
10:30:53:ST3_smx:INFO: List of broken channels: []
10:30:53:ST3_smx:INFO: Total # of broken channels: 0
10:30:53:ST3_smx:INFO: List of broken channels: []
10:30:54:ST3_smx:INFO: chip: 30-1 50.430383 C 1147.806000 mV
10:30:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:54:ST3_smx:INFO: Electrons
10:30:54:ST3_smx:INFO: # loops 0
10:30:56:ST3_smx:INFO: # loops 1
10:30:58:ST3_smx:INFO: # loops 2
10:30:59:ST3_smx:INFO: Total # of broken channels: 0
10:30:59:ST3_smx:INFO: List of broken channels: []
10:30:59:ST3_smx:INFO: Total # of broken channels: 0
10:30:59:ST3_smx:INFO: List of broken channels: []
10:31:01:ST3_smx:INFO: chip: 21-2 40.898880 C 1171.483840 mV
10:31:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:01:ST3_smx:INFO: Electrons
10:31:01:ST3_smx:INFO: # loops 0
10:31:02:ST3_smx:INFO: # loops 1
10:31:04:ST3_smx:INFO: # loops 2
10:31:05:ST3_smx:INFO: Total # of broken channels: 0
10:31:05:ST3_smx:INFO: List of broken channels: []
10:31:05:ST3_smx:INFO: Total # of broken channels: 8
10:31:05:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10, 12, 14, 16, 18]
10:31:07:ST3_smx:INFO: chip: 28-3 44.073563 C 1159.654860 mV
10:31:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:07:ST3_smx:INFO: Electrons
10:31:07:ST3_smx:INFO: # loops 0
10:31:09:ST3_smx:INFO: # loops 1
10:31:10:ST3_smx:INFO: # loops 2
10:31:12:ST3_smx:INFO: Total # of broken channels: 0
10:31:12:ST3_smx:INFO: List of broken channels: []
10:31:12:ST3_smx:INFO: Total # of broken channels: 0
10:31:12:ST3_smx:INFO: List of broken channels: []
10:31:14:ST3_smx:INFO: chip: 19-4 37.726682 C 1177.390875 mV
10:31:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:14:ST3_smx:INFO: Electrons
10:31:14:ST3_smx:INFO: # loops 0
10:31:15:ST3_smx:INFO: # loops 1
10:31:17:ST3_smx:INFO: # loops 2
10:31:18:ST3_smx:INFO: Total # of broken channels: 0
10:31:18:ST3_smx:INFO: List of broken channels: []
10:31:18:ST3_smx:INFO: Total # of broken channels: 0
10:31:18:ST3_smx:INFO: List of broken channels: []
10:31:20:ST3_smx:INFO: chip: 26-5 44.073563 C 1147.806000 mV
10:31:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:20:ST3_smx:INFO: Electrons
10:31:20:ST3_smx:INFO: # loops 0
10:31:22:ST3_smx:INFO: # loops 1
10:31:23:ST3_smx:INFO: # loops 2
10:31:25:ST3_smx:INFO: Total # of broken channels: 0
10:31:25:ST3_smx:INFO: List of broken channels: []
10:31:25:ST3_smx:INFO: Total # of broken channels: 0
10:31:25:ST3_smx:INFO: List of broken channels: []
10:31:27:ST3_smx:INFO: chip: 17-6 47.250730 C 1135.937260 mV
10:31:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:27:ST3_smx:INFO: Electrons
10:31:27:ST3_smx:INFO: # loops 0
10:31:28:ST3_smx:INFO: # loops 1
10:31:30:ST3_smx:INFO: # loops 2
10:31:31:ST3_smx:INFO: Total # of broken channels: 0
10:31:31:ST3_smx:INFO: List of broken channels: []
10:31:31:ST3_smx:INFO: Total # of broken channels: 0
10:31:31:ST3_smx:INFO: List of broken channels: []
10:31:33:ST3_smx:INFO: chip: 24-7 47.250730 C 1135.937260 mV
10:31:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:31:33:ST3_smx:INFO: Electrons
10:31:33:ST3_smx:INFO: # loops 0
10:31:35:ST3_smx:INFO: # loops 1
10:31:36:ST3_smx:INFO: # loops 2
10:31:38:ST3_smx:INFO: Total # of broken channels: 0
10:31:38:ST3_smx:INFO: List of broken channels: []
10:31:38:ST3_smx:INFO: Total # of broken channels: 0
10:31:38:ST3_smx:INFO: List of broken channels: []
10:31:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:31:38:febtest:INFO: 23-00 | XA-000-08-002-000-007-202-09 | 60.0 | 1124.0
10:31:39:febtest:INFO: 30-01 | XA-000-08-002-000-007-212-14 | 50.4 | 1165.6
10:31:39:febtest:INFO: 21-02 | XA-000-08-002-000-007-193-09 | 40.9 | 1195.1
10:31:39:febtest:INFO: 28-03 | XA-000-08-002-000-007-206-09 | 47.3 | 1183.3
10:31:39:febtest:INFO: 19-04 | XA-000-08-002-000-007-208-14 | 37.7 | 1201.0
10:31:40:febtest:INFO: 26-05 | XA-000-08-002-001-006-018-04 | 47.3 | 1171.5
10:31:40:febtest:INFO: 17-06 | XA-000-08-002-000-007-204-09 | 50.4 | 1159.7
10:31:40:febtest:INFO: 24-07 | XA-000-08-002-001-006-056-10 | 50.4 | 1153.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_05_29-10_30_17
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2169| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5480', '1.852', '2.7020']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0250', '1.850', '2.6130']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9950', '1.850', '0.5298']