Go Back
FEB_2171 24.05.24 12:18:25
Info
12:18:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:18:25:ST3_Shared:INFO: FEB-Microcable
12:18:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:18:25:febtest:INFO: Testing FEB with SN 2171
12:18:27:smx_tester:INFO: Scanning setup
12:18:27:elinks:INFO: Disabling clock on downlink 0
12:18:27:elinks:INFO: Disabling clock on downlink 1
12:18:27:elinks:INFO: Disabling clock on downlink 2
12:18:27:elinks:INFO: Disabling clock on downlink 3
12:18:27:elinks:INFO: Disabling clock on downlink 4
12:18:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:18:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:18:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:18:27:elinks:INFO: Disabling clock on downlink 0
12:18:27:elinks:INFO: Disabling clock on downlink 1
12:18:27:elinks:INFO: Disabling clock on downlink 2
12:18:27:elinks:INFO: Disabling clock on downlink 3
12:18:27:elinks:INFO: Disabling clock on downlink 4
12:18:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:18:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:18:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:18:27:elinks:INFO: Disabling clock on downlink 0
12:18:27:elinks:INFO: Disabling clock on downlink 1
12:18:27:elinks:INFO: Disabling clock on downlink 2
12:18:27:elinks:INFO: Disabling clock on downlink 3
12:18:27:elinks:INFO: Disabling clock on downlink 4
12:18:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:18:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:18:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
12:18:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
12:18:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
12:18:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
12:18:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
12:18:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
12:18:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
12:18:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
12:18:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:18:28:elinks:INFO: Disabling clock on downlink 0
12:18:28:elinks:INFO: Disabling clock on downlink 1
12:18:28:elinks:INFO: Disabling clock on downlink 2
12:18:28:elinks:INFO: Disabling clock on downlink 3
12:18:28:elinks:INFO: Disabling clock on downlink 4
12:18:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:18:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:18:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:18:28:elinks:INFO: Disabling clock on downlink 0
12:18:28:elinks:INFO: Disabling clock on downlink 1
12:18:28:elinks:INFO: Disabling clock on downlink 2
12:18:28:elinks:INFO: Disabling clock on downlink 3
12:18:28:elinks:INFO: Disabling clock on downlink 4
12:18:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:18:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:18:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:18:28:setup_element:INFO: Scanning clock phase
12:18:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:18:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:18:28:setup_element:INFO: Clock phase scan results for group 0, downlink 2
12:18:28:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
12:18:28:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
12:18:28:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
12:18:28:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
12:18:28:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:18:28:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:18:28:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
12:18:28:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
12:18:28:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
12:18:28:setup_element:INFO: Scanning data phases
12:18:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:18:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:18:34:setup_element:INFO: Data phase scan results for group 0, downlink 2
12:18:34:setup_element:INFO: Eye window for uplink 24: __________XXXXXX________________________
Data delay found: 32
12:18:34:setup_element:INFO: Eye window for uplink 25: _____________XXXXX______________________
Data delay found: 35
12:18:34:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
12:18:34:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
12:18:34:setup_element:INFO: Eye window for uplink 28: __________________XXXXX_________________
Data delay found: 0
12:18:34:setup_element:INFO: Eye window for uplink 29: ____________________XXXXX_______________
Data delay found: 2
12:18:34:setup_element:INFO: Eye window for uplink 30: __________________XXXXXX________________
Data delay found: 0
12:18:34:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXX_______________
Data delay found: 1
12:18:34:setup_element:INFO: Setting the data phase to 32 for uplink 24
12:18:34:setup_element:INFO: Setting the data phase to 35 for uplink 25
12:18:34:setup_element:INFO: Setting the data phase to 32 for uplink 26
12:18:34:setup_element:INFO: Setting the data phase to 35 for uplink 27
12:18:34:setup_element:INFO: Setting the data phase to 0 for uplink 28
12:18:34:setup_element:INFO: Setting the data phase to 2 for uplink 29
12:18:34:setup_element:INFO: Setting the data phase to 0 for uplink 30
12:18:34:setup_element:INFO: Setting the data phase to 1 for uplink 31
12:18:34:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 70
Eye Windows:
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: ___________________________________________________________________XXXXXXXXX____
Uplink 27: ___________________________________________________________________XXXXXXXXX____
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXX____
Uplink 31: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 25:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 29:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 30:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 31:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
]
12:18:34:setup_element:INFO: Beginning SMX ASICs map scan
12:18:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:18:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:18:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:18:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:18:34:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
12:18:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:18:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:18:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:18:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:18:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:18:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:18:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:18:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:18:36:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 70
Eye Windows:
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: ___________________________________________________________________XXXXXXXXX____
Uplink 27: ___________________________________________________________________XXXXXXXXX____
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXX____
Uplink 31: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 25:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 29:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 30:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 31:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
12:18:36:setup_element:INFO: Performing Elink synchronization
12:18:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:18:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:18:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:18:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:18:36:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
12:18:36:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
12:18:36:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
12:18:37:febtest:INFO: Init all SMX (CSA): 30
12:18:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:18:45:febtest:INFO: 30-01 | XA-000-08-002-002-008-141-01 | 28.2 | 1153.7
12:18:45:febtest:INFO: 28-03 | XA-000-08-002-002-008-140-01 | 28.2 | 1153.7
12:18:45:febtest:INFO: 26-05 | XA-000-08-002-002-008-136-01 | 25.1 | 1153.7
12:18:45:febtest:INFO: 24-07 | XA-000-08-002-002-008-137-01 | 28.2 | 1147.8
12:18:46:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:18:48:ST3_smx:INFO: chip: 30-1 28.225000 C 1165.571835 mV
12:18:48:ST3_smx:INFO: Electrons
12:18:48:ST3_smx:INFO: # loops 0
12:18:50:ST3_smx:INFO: # loops 1
12:18:52:ST3_smx:INFO: # loops 2
12:18:53:ST3_smx:INFO: Total # of broken channels: 0
12:18:53:ST3_smx:INFO: List of broken channels: []
12:18:53:ST3_smx:INFO: Total # of broken channels: 0
12:18:53:ST3_smx:INFO: List of broken channels: []
12:18:55:ST3_smx:INFO: chip: 28-3 28.225000 C 1165.571835 mV
12:18:55:ST3_smx:INFO: Electrons
12:18:55:ST3_smx:INFO: # loops 0
12:18:57:ST3_smx:INFO: # loops 1
12:18:58:ST3_smx:INFO: # loops 2
12:19:00:ST3_smx:INFO: Total # of broken channels: 0
12:19:00:ST3_smx:INFO: List of broken channels: []
12:19:00:ST3_smx:INFO: Total # of broken channels: 0
12:19:00:ST3_smx:INFO: List of broken channels: []
12:19:02:ST3_smx:INFO: chip: 26-5 25.062742 C 1171.483840 mV
12:19:02:ST3_smx:INFO: Electrons
12:19:02:ST3_smx:INFO: # loops 0
12:19:04:ST3_smx:INFO: # loops 1
12:19:05:ST3_smx:INFO: # loops 2
12:19:07:ST3_smx:INFO: Total # of broken channels: 0
12:19:07:ST3_smx:INFO: List of broken channels: []
12:19:07:ST3_smx:INFO: Total # of broken channels: 0
12:19:07:ST3_smx:INFO: List of broken channels: []
12:19:09:ST3_smx:INFO: chip: 24-7 28.225000 C 1159.654860 mV
12:19:09:ST3_smx:INFO: Electrons
12:19:09:ST3_smx:INFO: # loops 0
12:19:10:ST3_smx:INFO: # loops 1
12:19:12:ST3_smx:INFO: # loops 2
12:19:13:ST3_smx:INFO: Total # of broken channels: 0
12:19:13:ST3_smx:INFO: List of broken channels: []
12:19:13:ST3_smx:INFO: Total # of broken channels: 0
12:19:13:ST3_smx:INFO: List of broken channels: []
12:19:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:19:14:febtest:INFO: 30-01 | XA-000-08-002-002-008-141-01 | 28.2 | 1189.2
12:19:14:febtest:INFO: 28-03 | XA-000-08-002-002-008-140-01 | 28.2 | 1189.2
12:19:14:febtest:INFO: 26-05 | XA-000-08-002-002-008-136-01 | 25.1 | 1195.1
12:19:15:febtest:INFO: 24-07 | XA-000-08-002-002-008-137-01 | 28.2 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_05_24-12_18_25
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2171| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8391', '1.852', '1.3710']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0070', '1.850', '1.2750']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9797', '1.850', '0.1169']