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FEB_2172 24.05.24 12:20:54
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12:20:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:20:54:ST3_Shared:INFO: FEB-Microcable
12:20:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:20:54:febtest:INFO: Testing FEB with SN 2172
12:20:56:smx_tester:INFO: Scanning setup
12:20:56:elinks:INFO: Disabling clock on downlink 0
12:20:56:elinks:INFO: Disabling clock on downlink 1
12:20:56:elinks:INFO: Disabling clock on downlink 2
12:20:56:elinks:INFO: Disabling clock on downlink 3
12:20:56:elinks:INFO: Disabling clock on downlink 4
12:20:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:20:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:20:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:20:56:elinks:INFO: Disabling clock on downlink 0
12:20:56:elinks:INFO: Disabling clock on downlink 1
12:20:56:elinks:INFO: Disabling clock on downlink 2
12:20:56:elinks:INFO: Disabling clock on downlink 3
12:20:56:elinks:INFO: Disabling clock on downlink 4
12:20:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:20:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:20:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:20:56:elinks:INFO: Disabling clock on downlink 0
12:20:56:elinks:INFO: Disabling clock on downlink 1
12:20:56:elinks:INFO: Disabling clock on downlink 2
12:20:56:elinks:INFO: Disabling clock on downlink 3
12:20:56:elinks:INFO: Disabling clock on downlink 4
12:20:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:20:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:20:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
12:20:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
12:20:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
12:20:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
12:20:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
12:20:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
12:20:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
12:20:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
12:20:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:20:56:elinks:INFO: Disabling clock on downlink 0
12:20:56:elinks:INFO: Disabling clock on downlink 1
12:20:56:elinks:INFO: Disabling clock on downlink 2
12:20:56:elinks:INFO: Disabling clock on downlink 3
12:20:56:elinks:INFO: Disabling clock on downlink 4
12:20:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:20:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:20:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:20:56:elinks:INFO: Disabling clock on downlink 0
12:20:56:elinks:INFO: Disabling clock on downlink 1
12:20:56:elinks:INFO: Disabling clock on downlink 2
12:20:56:elinks:INFO: Disabling clock on downlink 3
12:20:56:elinks:INFO: Disabling clock on downlink 4
12:20:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:20:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:20:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:20:56:setup_element:INFO: Scanning clock phase
12:20:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:20:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:20:57:setup_element:INFO: Clock phase scan results for group 0, downlink 2
12:20:57:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
12:20:57:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
12:20:57:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
12:20:57:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
12:20:57:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:20:57:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:20:57:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:20:57:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
12:20:57:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
12:20:57:setup_element:INFO: Scanning data phases
12:20:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:20:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:21:02:setup_element:INFO: Data phase scan results for group 0, downlink 2
12:21:02:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
12:21:02:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
12:21:02:setup_element:INFO: Eye window for uplink 26: _________XXXXX__________________________
Data delay found: 31
12:21:02:setup_element:INFO: Eye window for uplink 27: ____________XXXXXX______________________
Data delay found: 34
12:21:02:setup_element:INFO: Eye window for uplink 28: ________________XXXXX___________________
Data delay found: 38
12:21:02:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
12:21:02:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
12:21:02:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
12:21:02:setup_element:INFO: Setting the data phase to 30 for uplink 24
12:21:02:setup_element:INFO: Setting the data phase to 32 for uplink 25
12:21:02:setup_element:INFO: Setting the data phase to 31 for uplink 26
12:21:02:setup_element:INFO: Setting the data phase to 34 for uplink 27
12:21:02:setup_element:INFO: Setting the data phase to 38 for uplink 28
12:21:02:setup_element:INFO: Setting the data phase to 0 for uplink 29
12:21:02:setup_element:INFO: Setting the data phase to 38 for uplink 30
12:21:02:setup_element:INFO: Setting the data phase to 38 for uplink 31
12:21:02:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 71
Eye Windows:
Uplink 24: ___________________________________________________________________XXXXXXXX_____
Uplink 25: ___________________________________________________________________XXXXXXXX_____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: ____________________________________________________________________XXXXXXXX____
Uplink 29: ____________________________________________________________________XXXXXXXX____
Uplink 30: ____________________________________________________________________XXXXXXXX____
Uplink 31: ____________________________________________________________________XXXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 25:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 26:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 27:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 28:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 29:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 30:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 31:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
]
12:21:02:setup_element:INFO: Beginning SMX ASICs map scan
12:21:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:21:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:21:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:21:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:21:02:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
12:21:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:21:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:21:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:21:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:21:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:21:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:21:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:21:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:21:05:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 71
Eye Windows:
Uplink 24: ___________________________________________________________________XXXXXXXX_____
Uplink 25: ___________________________________________________________________XXXXXXXX_____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: ____________________________________________________________________XXXXXXXX____
Uplink 29: ____________________________________________________________________XXXXXXXX____
Uplink 30: ____________________________________________________________________XXXXXXXX____
Uplink 31: ____________________________________________________________________XXXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 25:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 26:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 27:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 28:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 29:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 30:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 31:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
12:21:05:setup_element:INFO: Performing Elink synchronization
12:21:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:21:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:21:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:21:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:21:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
12:21:05:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
12:21:05:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
12:21:05:febtest:INFO: Init all SMX (CSA): 30
12:21:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:21:13:febtest:INFO: 30-01 | XA-000-08-002-000-007-050-15 | 34.6 | 1147.8
12:21:13:febtest:INFO: 28-03 | XA-000-08-002-000-007-045-08 | 21.9 | 1183.3
12:21:14:febtest:INFO: 26-05 | XA-000-08-002-000-007-051-15 | 40.9 | 1118.1
12:21:14:febtest:INFO: 24-07 | XA-000-08-002-000-007-037-08 | 25.1 | 1165.6
12:21:15:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:21:17:ST3_smx:INFO: chip: 30-1 34.556970 C 1153.732915 mV
12:21:17:ST3_smx:INFO: Electrons
12:21:17:ST3_smx:INFO: # loops 0
12:21:18:ST3_smx:INFO: # loops 1
12:21:20:ST3_smx:INFO: # loops 2
12:21:22:ST3_smx:INFO: Total # of broken channels: 0
12:21:22:ST3_smx:INFO: List of broken channels: []
12:21:22:ST3_smx:INFO: Total # of broken channels: 0
12:21:22:ST3_smx:INFO: List of broken channels: []
12:21:24:ST3_smx:INFO: chip: 28-3 21.902970 C 1195.082160 mV
12:21:24:ST3_smx:INFO: Electrons
12:21:24:ST3_smx:INFO: # loops 0
12:21:25:ST3_smx:INFO: # loops 1
12:21:27:ST3_smx:INFO: # loops 2
12:21:29:ST3_smx:INFO: Total # of broken channels: 0
12:21:29:ST3_smx:INFO: List of broken channels: []
12:21:29:ST3_smx:INFO: Total # of broken channels: 0
12:21:29:ST3_smx:INFO: List of broken channels: []
12:21:30:ST3_smx:INFO: chip: 26-5 40.898880 C 1129.995435 mV
12:21:30:ST3_smx:INFO: Electrons
12:21:30:ST3_smx:INFO: # loops 0
12:21:32:ST3_smx:INFO: # loops 1
12:21:34:ST3_smx:INFO: # loops 2
12:21:35:ST3_smx:INFO: Total # of broken channels: 0
12:21:35:ST3_smx:INFO: List of broken channels: []
12:21:35:ST3_smx:INFO: Total # of broken channels: 0
12:21:35:ST3_smx:INFO: List of broken channels: []
12:21:37:ST3_smx:INFO: chip: 24-7 25.062742 C 1171.483840 mV
12:21:37:ST3_smx:INFO: Electrons
12:21:37:ST3_smx:INFO: # loops 0
12:21:39:ST3_smx:INFO: # loops 1
12:21:40:ST3_smx:INFO: # loops 2
12:21:42:ST3_smx:INFO: Total # of broken channels: 0
12:21:42:ST3_smx:INFO: List of broken channels: []
12:21:42:ST3_smx:INFO: Total # of broken channels: 0
12:21:42:ST3_smx:INFO: List of broken channels: []
12:21:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:21:43:febtest:INFO: 30-01 | XA-000-08-002-000-007-050-15 | 34.6 | 1183.3
12:21:43:febtest:INFO: 28-03 | XA-000-08-002-000-007-045-08 | 25.1 | 1218.6
12:21:43:febtest:INFO: 26-05 | XA-000-08-002-000-007-051-15 | 40.9 | 1153.7
12:21:43:febtest:INFO: 24-07 | XA-000-08-002-000-007-037-08 | 28.2 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_05_24-12_20_54
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2172| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9922', '1.852', '1.1200']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0270', '1.850', '1.1840']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9809', '1.850', '0.1171']