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FEB_2175 24.05.24 12:23:24
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12:23:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:23:24:ST3_Shared:INFO: FEB-Microcable
12:23:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:23:24:febtest:INFO: Testing FEB with SN 2175
12:23:26:smx_tester:INFO: Scanning setup
12:23:26:elinks:INFO: Disabling clock on downlink 0
12:23:26:elinks:INFO: Disabling clock on downlink 1
12:23:26:elinks:INFO: Disabling clock on downlink 2
12:23:26:elinks:INFO: Disabling clock on downlink 3
12:23:26:elinks:INFO: Disabling clock on downlink 4
12:23:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:23:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:23:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:23:26:elinks:INFO: Disabling clock on downlink 0
12:23:26:elinks:INFO: Disabling clock on downlink 1
12:23:26:elinks:INFO: Disabling clock on downlink 2
12:23:26:elinks:INFO: Disabling clock on downlink 3
12:23:26:elinks:INFO: Disabling clock on downlink 4
12:23:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:23:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:23:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:23:26:elinks:INFO: Disabling clock on downlink 0
12:23:26:elinks:INFO: Disabling clock on downlink 1
12:23:26:elinks:INFO: Disabling clock on downlink 2
12:23:26:elinks:INFO: Disabling clock on downlink 3
12:23:26:elinks:INFO: Disabling clock on downlink 4
12:23:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:23:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:23:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
12:23:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
12:23:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
12:23:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
12:23:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
12:23:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
12:23:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
12:23:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
12:23:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:23:26:elinks:INFO: Disabling clock on downlink 0
12:23:26:elinks:INFO: Disabling clock on downlink 1
12:23:26:elinks:INFO: Disabling clock on downlink 2
12:23:26:elinks:INFO: Disabling clock on downlink 3
12:23:26:elinks:INFO: Disabling clock on downlink 4
12:23:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:23:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:23:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:23:26:elinks:INFO: Disabling clock on downlink 0
12:23:26:elinks:INFO: Disabling clock on downlink 1
12:23:26:elinks:INFO: Disabling clock on downlink 2
12:23:26:elinks:INFO: Disabling clock on downlink 3
12:23:26:elinks:INFO: Disabling clock on downlink 4
12:23:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:23:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:23:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:23:27:setup_element:INFO: Scanning clock phase
12:23:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:23:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:23:27:setup_element:INFO: Clock phase scan results for group 0, downlink 2
12:23:27:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
12:23:27:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
12:23:27:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
12:23:27:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
12:23:27:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
12:23:27:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
12:23:27:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
12:23:27:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
12:23:27:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
12:23:27:setup_element:INFO: Scanning data phases
12:23:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:23:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:23:33:setup_element:INFO: Data phase scan results for group 0, downlink 2
12:23:33:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
12:23:33:setup_element:INFO: Eye window for uplink 25: ___________XXXX_________________________
Data delay found: 32
12:23:33:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
12:23:33:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
12:23:33:setup_element:INFO: Eye window for uplink 28: _______________XXXX_____________________
Data delay found: 36
12:23:33:setup_element:INFO: Eye window for uplink 29: _________________XXXXX__________________
Data delay found: 39
12:23:33:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
12:23:33:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
12:23:33:setup_element:INFO: Setting the data phase to 30 for uplink 24
12:23:33:setup_element:INFO: Setting the data phase to 32 for uplink 25
12:23:33:setup_element:INFO: Setting the data phase to 32 for uplink 26
12:23:33:setup_element:INFO: Setting the data phase to 35 for uplink 27
12:23:33:setup_element:INFO: Setting the data phase to 36 for uplink 28
12:23:33:setup_element:INFO: Setting the data phase to 39 for uplink 29
12:23:33:setup_element:INFO: Setting the data phase to 37 for uplink 30
12:23:33:setup_element:INFO: Setting the data phase to 38 for uplink 31
12:23:33:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 30
Window Length: 71
Eye Windows:
Uplink 24: __________________________________________________________________XXXXXXXXX_____
Uplink 25: __________________________________________________________________XXXXXXXXX_____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: ___________________________________________________________________XXXXXXXX_____
Uplink 29: ___________________________________________________________________XXXXXXXX_____
Uplink 30: ___________________________________________________________________XXXXXXXX_____
Uplink 31: ___________________________________________________________________XXXXXXXX_____
Data phase characteristics:
Uplink 24:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 25:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 36
Window Length: 36
Eye Window: _______________XXXX_____________________
Uplink 29:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
]
12:23:33:setup_element:INFO: Beginning SMX ASICs map scan
12:23:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:23:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:23:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:23:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:23:33:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
12:23:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:23:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:23:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:23:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:23:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:23:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:23:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:23:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:23:35:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 30
Window Length: 71
Eye Windows:
Uplink 24: __________________________________________________________________XXXXXXXXX_____
Uplink 25: __________________________________________________________________XXXXXXXXX_____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: ___________________________________________________________________XXXXXXXX_____
Uplink 29: ___________________________________________________________________XXXXXXXX_____
Uplink 30: ___________________________________________________________________XXXXXXXX_____
Uplink 31: ___________________________________________________________________XXXXXXXX_____
Data phase characteristics:
Uplink 24:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 25:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 36
Window Length: 36
Eye Window: _______________XXXX_____________________
Uplink 29:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
12:23:35:setup_element:INFO: Performing Elink synchronization
12:23:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:23:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:23:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:23:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:23:35:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
12:23:35:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
12:23:36:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
12:23:36:febtest:INFO: Init all SMX (CSA): 30
12:23:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:23:43:febtest:INFO: 30-01 | XA-000-08-002-000-007-213-14 | 31.4 | 1153.7
12:23:43:febtest:INFO: 28-03 | XA-000-08-002-000-007-207-09 | 44.1 | 1118.1
12:23:44:febtest:INFO: 26-05 | XA-000-08-002-000-007-205-09 | 37.7 | 1135.9
12:23:44:febtest:INFO: 24-07 | XA-000-08-002-000-007-183-05 | 37.7 | 1130.0
12:23:45:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:23:47:ST3_smx:INFO: chip: 30-1 31.389742 C 1171.483840 mV
12:23:47:ST3_smx:INFO: Electrons
12:23:47:ST3_smx:INFO: # loops 0
12:23:49:ST3_smx:INFO: # loops 1
12:23:50:ST3_smx:INFO: # loops 2
12:23:52:ST3_smx:INFO: Total # of broken channels: 0
12:23:52:ST3_smx:INFO: List of broken channels: []
12:23:52:ST3_smx:INFO: Total # of broken channels: 0
12:23:52:ST3_smx:INFO: List of broken channels: []
12:23:54:ST3_smx:INFO: chip: 28-3 40.898880 C 1129.995435 mV
12:23:54:ST3_smx:INFO: Electrons
12:23:54:ST3_smx:INFO: # loops 0
12:23:55:ST3_smx:INFO: # loops 1
12:23:57:ST3_smx:INFO: # loops 2
12:23:58:ST3_smx:INFO: Total # of broken channels: 0
12:23:58:ST3_smx:INFO: List of broken channels: []
12:23:58:ST3_smx:INFO: Total # of broken channels: 0
12:23:58:ST3_smx:INFO: List of broken channels: []
12:24:00:ST3_smx:INFO: chip: 26-5 37.726682 C 1147.806000 mV
12:24:00:ST3_smx:INFO: Electrons
12:24:00:ST3_smx:INFO: # loops 0
12:24:02:ST3_smx:INFO: # loops 1
12:24:03:ST3_smx:INFO: # loops 2
12:24:05:ST3_smx:INFO: Total # of broken channels: 0
12:24:05:ST3_smx:INFO: List of broken channels: []
12:24:05:ST3_smx:INFO: Total # of broken channels: 0
12:24:05:ST3_smx:INFO: List of broken channels: []
12:24:07:ST3_smx:INFO: chip: 24-7 37.726682 C 1135.937260 mV
12:24:07:ST3_smx:INFO: Electrons
12:24:07:ST3_smx:INFO: # loops 0
12:24:08:ST3_smx:INFO: # loops 1
12:24:10:ST3_smx:INFO: # loops 2
12:24:11:ST3_smx:INFO: Total # of broken channels: 0
12:24:11:ST3_smx:INFO: List of broken channels: []
12:24:11:ST3_smx:INFO: Total # of broken channels: 0
12:24:11:ST3_smx:INFO: List of broken channels: []
12:24:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:24:12:febtest:INFO: 30-01 | XA-000-08-002-000-007-213-14 | 31.4 | 1195.1
12:24:12:febtest:INFO: 28-03 | XA-000-08-002-000-007-207-09 | 44.1 | 1147.8
12:24:12:febtest:INFO: 26-05 | XA-000-08-002-000-007-205-09 | 37.7 | 1165.6
12:24:13:febtest:INFO: 24-07 | XA-000-08-002-000-007-183-05 | 40.9 | 1159.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_05_24-12_23_24
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2175| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0140', '1.852', '1.1540']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0450', '1.850', '1.3060']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0130', '1.850', '0.1215']