DTL-STS tests database

FEB_2176 21.06.24 10:24:22

Ladder: L6DL000158
Module: M6DL0T1001581A2
Sensor: 22312
link: XA-000-08-002-000-008-009-02
...SMX_0.root
link: XA-000-08-002-000-007-248-00
...SMX_2.root
link: XA-000-08-002-000-007-254-00
...SMX_4.root
link: XA-000-08-002-000-007-252-00
...SMX_6.root
link: XA-000-08-002-000-007-244-00
...SMX_1.root
link: XA-000-08-002-000-007-249-00
...SMX_3.root
link: XA-000-08-002-000-008-012-02
...SMX_5.root
link: XA-000-08-002-000-008-006-02
...SMX_7.root
link: XA-000-08-002-000-008-006-02
...VddmCSAstatus.root
TextEdit.txt
            10:24:22:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:24:22:ST3_Shared:INFO:	                         FEB-Sensor                         
10:24:22:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:24:32:ST3_ModuleSelector:INFO:	New Sensor ID: 2231
10:24:32:ST3_ModuleSelector:INFO:	New Sensor ID: 22312
10:24:34:ST3_ModuleSelector:INFO:	L6DL000158 M6DL0T1001581A2 42 A

10:24:34:ST3_ModuleSelector:INFO:	22312
10:24:34:febtest:INFO:	Testing FEB with SN 2176
10:24:36:smx_tester:INFO:	Scanning setup
10:24:36:elinks:INFO:	Disabling clock on downlink 0
10:24:36:elinks:INFO:	Disabling clock on downlink 1
10:24:36:elinks:INFO:	Disabling clock on downlink 2
10:24:36:elinks:INFO:	Disabling clock on downlink 3
10:24:36:elinks:INFO:	Disabling clock on downlink 4
10:24:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:24:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:24:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:24:36:elinks:INFO:	Disabling clock on downlink 0
10:24:36:elinks:INFO:	Disabling clock on downlink 1
10:24:36:elinks:INFO:	Disabling clock on downlink 2
10:24:36:elinks:INFO:	Disabling clock on downlink 3
10:24:36:elinks:INFO:	Disabling clock on downlink 4
10:24:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:24:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:24:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:24:36:elinks:INFO:	Disabling clock on downlink 0
10:24:36:elinks:INFO:	Disabling clock on downlink 1
10:24:36:elinks:INFO:	Disabling clock on downlink 2
10:24:36:elinks:INFO:	Disabling clock on downlink 3
10:24:36:elinks:INFO:	Disabling clock on downlink 4
10:24:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:24:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:24:36:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:24:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:24:36:elinks:INFO:	Disabling clock on downlink 0
10:24:36:elinks:INFO:	Disabling clock on downlink 1
10:24:36:elinks:INFO:	Disabling clock on downlink 2
10:24:36:elinks:INFO:	Disabling clock on downlink 3
10:24:36:elinks:INFO:	Disabling clock on downlink 4
10:24:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:24:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:24:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:24:36:elinks:INFO:	Disabling clock on downlink 0
10:24:36:elinks:INFO:	Disabling clock on downlink 1
10:24:36:elinks:INFO:	Disabling clock on downlink 2
10:24:36:elinks:INFO:	Disabling clock on downlink 3
10:24:36:elinks:INFO:	Disabling clock on downlink 4
10:24:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:24:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:24:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:24:37:setup_element:INFO:	Scanning clock phase
10:24:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:24:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:37:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:24:37:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:24:37:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:24:37:setup_element:INFO:	Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:37:setup_element:INFO:	Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:37:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:37:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:37:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:37:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:37:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:37:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:37:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
10:24:37:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
10:24:37:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:24:37:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:24:37:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:24:37:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:24:37:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
10:24:37:setup_element:INFO:	Scanning data phases
10:24:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:24:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:43:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:24:43:setup_element:INFO:	Eye window for uplink 16: XX___________________________________XX_
Data delay found: 19
10:24:43:setup_element:INFO:	Eye window for uplink 17: ___________________________________XXX__
Data delay found: 16
10:24:43:setup_element:INFO:	Eye window for uplink 18: X_________________________________XXXXX_
Data delay found: 17
10:24:43:setup_element:INFO:	Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
10:24:43:setup_element:INFO:	Eye window for uplink 20: __________________________________XXXXX_
Data delay found: 16
10:24:43:setup_element:INFO:	Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
10:24:43:setup_element:INFO:	Eye window for uplink 22: X___________________________________XXXX
Data delay found: 18
10:24:43:setup_element:INFO:	Eye window for uplink 23: XXX______________________________XXXXXXX
Data delay found: 17
10:24:43:setup_element:INFO:	Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
10:24:43:setup_element:INFO:	Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
10:24:43:setup_element:INFO:	Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
10:24:43:setup_element:INFO:	Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
10:24:43:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
10:24:43:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
10:24:43:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
10:24:43:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
10:24:43:setup_element:INFO:	Setting the data phase to 19 for uplink 16
10:24:43:setup_element:INFO:	Setting the data phase to 16 for uplink 17
10:24:43:setup_element:INFO:	Setting the data phase to 17 for uplink 18
10:24:43:setup_element:INFO:	Setting the data phase to 14 for uplink 19
10:24:43:setup_element:INFO:	Setting the data phase to 16 for uplink 20
10:24:43:setup_element:INFO:	Setting the data phase to 15 for uplink 21
10:24:43:setup_element:INFO:	Setting the data phase to 18 for uplink 22
10:24:43:setup_element:INFO:	Setting the data phase to 17 for uplink 23
10:24:43:setup_element:INFO:	Setting the data phase to 29 for uplink 24
10:24:43:setup_element:INFO:	Setting the data phase to 31 for uplink 25
10:24:43:setup_element:INFO:	Setting the data phase to 29 for uplink 26
10:24:43:setup_element:INFO:	Setting the data phase to 32 for uplink 27
10:24:43:setup_element:INFO:	Setting the data phase to 35 for uplink 28
10:24:43:setup_element:INFO:	Setting the data phase to 37 for uplink 29
10:24:43:setup_element:INFO:	Setting the data phase to 38 for uplink 30
10:24:43:setup_element:INFO:	Setting the data phase to 38 for uplink 31
10:24:43:setup_element:INFO:	Beginning SMX ASICs map scan
10:24:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:24:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:43:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:24:43:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:24:43:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:24:43:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:24:43:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:24:43:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:24:43:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:24:43:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:24:43:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:24:43:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:24:43:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:24:44:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:24:44:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:24:44:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:24:44:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:24:44:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:24:44:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:24:44:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:24:44:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:24:45:setup_element:INFO:	Performing Elink synchronization
10:24:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:24:45:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:46:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:24:46:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:24:46:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:24:46:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:24:46:febtest:INFO:	Init all SMX (CSA): 30
10:25:00:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:25:01:febtest:INFO:	23-00 | XA-000-08-002-000-008-009-02 |  47.3 | 1118.1
10:25:01:febtest:INFO:	30-01 | XA-000-08-002-000-007-244-00 |  44.1 | 1124.0
10:25:01:febtest:INFO:	21-02 | XA-000-08-002-000-007-248-00 |  47.3 | 1124.0
10:25:01:febtest:INFO:	28-03 | XA-000-08-002-000-007-249-00 |  40.9 | 1130.0
10:25:01:febtest:INFO:	19-04 | XA-000-08-002-000-007-254-00 |  44.1 | 1135.9
10:25:02:febtest:INFO:	26-05 | XA-000-08-002-000-008-012-02 |  47.3 | 1106.2
10:25:02:febtest:INFO:	17-06 | XA-000-08-002-000-007-252-00 |  53.6 | 1100.2
10:25:02:febtest:INFO:	24-07 | XA-000-08-002-000-008-006-02 |  60.0 | 1064.3
10:25:03:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:25:05:ST3_smx:INFO:	chip: 23-0 	 47.250730 C 	 1129.995435 mV
10:25:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:05:ST3_smx:INFO:		Electrons
10:25:05:ST3_smx:INFO:	# loops 0
10:25:07:ST3_smx:INFO:	# loops 1
10:25:09:ST3_smx:INFO:	# loops 2
10:25:10:ST3_smx:INFO:	# loops 3
10:25:12:ST3_smx:INFO:	# loops 4
10:25:13:ST3_smx:INFO:	Total # of broken channels: 0
10:25:13:ST3_smx:INFO:	List of broken channels: []
10:25:13:ST3_smx:INFO:	Total # of broken channels: 0
10:25:13:ST3_smx:INFO:	List of broken channels: []
10:25:15:ST3_smx:INFO:	chip: 30-1 	 44.073563 C 	 1135.937260 mV
10:25:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:15:ST3_smx:INFO:		Electrons
10:25:15:ST3_smx:INFO:	# loops 0
10:25:17:ST3_smx:INFO:	# loops 1
10:25:18:ST3_smx:INFO:	# loops 2
10:25:20:ST3_smx:INFO:	# loops 3
10:25:22:ST3_smx:INFO:	# loops 4
10:25:23:ST3_smx:INFO:	Total # of broken channels: 0
10:25:23:ST3_smx:INFO:	List of broken channels: []
10:25:23:ST3_smx:INFO:	Total # of broken channels: 0
10:25:23:ST3_smx:INFO:	List of broken channels: []
10:25:25:ST3_smx:INFO:	chip: 21-2 	 47.250730 C 	 1135.937260 mV
10:25:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:25:ST3_smx:INFO:		Electrons
10:25:25:ST3_smx:INFO:	# loops 0
10:25:27:ST3_smx:INFO:	# loops 1
10:25:28:ST3_smx:INFO:	# loops 2
10:25:30:ST3_smx:INFO:	# loops 3
10:25:31:ST3_smx:INFO:	# loops 4
10:25:33:ST3_smx:INFO:	Total # of broken channels: 0
10:25:33:ST3_smx:INFO:	List of broken channels: []
10:25:33:ST3_smx:INFO:	Total # of broken channels: 1
10:25:33:ST3_smx:INFO:	List of broken channels: [17]
10:25:35:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1141.874115 mV
10:25:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:35:ST3_smx:INFO:		Electrons
10:25:35:ST3_smx:INFO:	# loops 0
10:25:36:ST3_smx:INFO:	# loops 1
10:25:38:ST3_smx:INFO:	# loops 2
10:25:40:ST3_smx:INFO:	# loops 3
10:25:41:ST3_smx:INFO:	# loops 4
10:25:43:ST3_smx:INFO:	Total # of broken channels: 0
10:25:43:ST3_smx:INFO:	List of broken channels: []
10:25:43:ST3_smx:INFO:	Total # of broken channels: 1
10:25:43:ST3_smx:INFO:	List of broken channels: [127]
10:25:44:ST3_smx:INFO:	chip: 19-4 	 44.073563 C 	 1141.874115 mV
10:25:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:45:ST3_smx:INFO:		Electrons
10:25:45:ST3_smx:INFO:	# loops 0
10:25:46:ST3_smx:INFO:	# loops 1
10:25:48:ST3_smx:INFO:	# loops 2
10:25:49:ST3_smx:INFO:	# loops 3
10:25:51:ST3_smx:INFO:	# loops 4
10:25:52:ST3_smx:INFO:	Total # of broken channels: 0
10:25:52:ST3_smx:INFO:	List of broken channels: []
10:25:52:ST3_smx:INFO:	Total # of broken channels: 0
10:25:52:ST3_smx:INFO:	List of broken channels: []
10:25:54:ST3_smx:INFO:	chip: 26-5 	 50.430383 C 	 1118.096875 mV
10:25:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:54:ST3_smx:INFO:		Electrons
10:25:54:ST3_smx:INFO:	# loops 0
10:25:56:ST3_smx:INFO:	# loops 1
10:25:57:ST3_smx:INFO:	# loops 2
10:25:59:ST3_smx:INFO:	# loops 3
10:26:00:ST3_smx:INFO:	# loops 4
10:26:02:ST3_smx:INFO:	Total # of broken channels: 0
10:26:02:ST3_smx:INFO:	List of broken channels: []
10:26:02:ST3_smx:INFO:	Total # of broken channels: 0
10:26:02:ST3_smx:INFO:	List of broken channels: []
10:26:04:ST3_smx:INFO:	chip: 17-6 	 56.797143 C 	 1112.140140 mV
10:26:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:04:ST3_smx:INFO:		Electrons
10:26:04:ST3_smx:INFO:	# loops 0
10:26:05:ST3_smx:INFO:	# loops 1
10:26:07:ST3_smx:INFO:	# loops 2
10:26:09:ST3_smx:INFO:	# loops 3
10:26:10:ST3_smx:INFO:	# loops 4
10:26:12:ST3_smx:INFO:	Total # of broken channels: 0
10:26:12:ST3_smx:INFO:	List of broken channels: []
10:26:12:ST3_smx:INFO:	Total # of broken channels: 0
10:26:12:ST3_smx:INFO:	List of broken channels: []
10:26:14:ST3_smx:INFO:	chip: 24-7 	 63.173842 C 	 1076.295360 mV
10:26:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:14:ST3_smx:INFO:		Electrons
10:26:14:ST3_smx:INFO:	# loops 0
10:26:15:ST3_smx:INFO:	# loops 1
10:26:17:ST3_smx:INFO:	# loops 2
10:26:18:ST3_smx:INFO:	# loops 3
10:26:20:ST3_smx:INFO:	# loops 4
10:26:22:ST3_smx:INFO:	Total # of broken channels: 0
10:26:22:ST3_smx:INFO:	List of broken channels: []
10:26:22:ST3_smx:INFO:	Total # of broken channels: 0
10:26:22:ST3_smx:INFO:	List of broken channels: []
10:26:22:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:26:22:febtest:INFO:	23-00 | XA-000-08-002-000-008-009-02 |  47.3 | 1153.7
10:26:22:febtest:INFO:	30-01 | XA-000-08-002-000-007-244-00 |  47.3 | 1159.7
10:26:23:febtest:INFO:	21-02 | XA-000-08-002-000-007-248-00 |  47.3 | 1153.7
10:26:23:febtest:INFO:	28-03 | XA-000-08-002-000-007-249-00 |  40.9 | 1165.6
10:26:23:febtest:INFO:	19-04 | XA-000-08-002-000-007-254-00 |  47.3 | 1165.6
10:26:23:febtest:INFO:	26-05 | XA-000-08-002-000-008-012-02 |  50.4 | 1135.9
10:26:23:febtest:INFO:	17-06 | XA-000-08-002-000-007-252-00 |  56.8 | 1130.0
10:26:24:febtest:INFO:	24-07 | XA-000-08-002-000-008-006-02 |  63.2 | 1094.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_06_21-10_24_22
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2176| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	22312
MODULE_NAME:	L6DL000158 M6DL0T1001581A2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L6DL000158
MODULE_MODULE:	M6DL0T1001581A2
MODULE_SIZE:	42
MODULE_GRADE:	A
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9350', '1.852', '1.8520']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0540', '1.850', '2.6290']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0250', '1.850', '0.5430']
10:26:35:ST3_Shared:INFO:	Listo of operators:Olga B.; 
10:26:37:ST3_Shared:INFO:	Listo of operators:Olga B.;
Comment.txt