09:52:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:52:41:ST3_Shared:INFO:	                         FEB-Sensor                         
09:52:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:53:01:ST3_ModuleSelector:INFO:	New Sensor ID: 2803
09:53:02:ST3_ModuleSelector:INFO:	New Sensor ID: 28034
09:53:04:ST3_ModuleSelector:INFO:	L7DL700126 M7DL7T0001260A2 124 C

09:53:04:ST3_ModuleSelector:INFO:	28034
09:53:04:febtest:INFO:	Testing FEB with SN 2177
09:53:05:smx_tester:INFO:	Scanning setup
09:53:05:elinks:INFO:	Disabling clock on downlink 0
09:53:05:elinks:INFO:	Disabling clock on downlink 1
09:53:05:elinks:INFO:	Disabling clock on downlink 2
09:53:05:elinks:INFO:	Disabling clock on downlink 3
09:53:05:elinks:INFO:	Disabling clock on downlink 4
09:53:05:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:53:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:53:05:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:53:05:elinks:INFO:	Disabling clock on downlink 0
09:53:05:elinks:INFO:	Disabling clock on downlink 1
09:53:05:elinks:INFO:	Disabling clock on downlink 2
09:53:05:elinks:INFO:	Disabling clock on downlink 3
09:53:05:elinks:INFO:	Disabling clock on downlink 4
09:53:05:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:53:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:53:05:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:53:05:elinks:INFO:	Disabling clock on downlink 0
09:53:06:elinks:INFO:	Disabling clock on downlink 1
09:53:06:elinks:INFO:	Disabling clock on downlink 2
09:53:06:elinks:INFO:	Disabling clock on downlink 3
09:53:06:elinks:INFO:	Disabling clock on downlink 4
09:53:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:53:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:53:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:53:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:53:06:elinks:INFO:	Disabling clock on downlink 0
09:53:06:elinks:INFO:	Disabling clock on downlink 1
09:53:06:elinks:INFO:	Disabling clock on downlink 2
09:53:06:elinks:INFO:	Disabling clock on downlink 3
09:53:06:elinks:INFO:	Disabling clock on downlink 4
09:53:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:53:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:53:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:53:06:elinks:INFO:	Disabling clock on downlink 0
09:53:06:elinks:INFO:	Disabling clock on downlink 1
09:53:06:elinks:INFO:	Disabling clock on downlink 2
09:53:06:elinks:INFO:	Disabling clock on downlink 3
09:53:06:elinks:INFO:	Disabling clock on downlink 4
09:53:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:53:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:53:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:53:06:setup_element:INFO:	Scanning clock phase
09:53:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:53:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:53:06:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:53:06:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:53:06:setup_element:INFO:	Eye window for uplink 17: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:53:06:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:53:06:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:53:06:setup_element:INFO:	Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:53:06:setup_element:INFO:	Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:53:06:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
09:53:06:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
09:53:06:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:53:06:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:53:06:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
09:53:06:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
09:53:06:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:53:06:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:53:06:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:53:06:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:53:06:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
09:53:06:setup_element:INFO:	Scanning data phases
09:53:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:53:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:53:12:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:53:12:setup_element:INFO:	Eye window for uplink 16: XXXXX___________________________________
Data delay found: 22
09:53:12:setup_element:INFO:	Eye window for uplink 17: XXX___________________________________XX
Data delay found: 20
09:53:12:setup_element:INFO:	Eye window for uplink 18: XXXXX_________________________________XX
Data delay found: 21
09:53:12:setup_element:INFO:	Eye window for uplink 19: XXX_________________________________XXXX
Data delay found: 19
09:53:12:setup_element:INFO:	Eye window for uplink 20: X__________________________________XXXXX
Data delay found: 17
09:53:12:setup_element:INFO:	Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
09:53:12:setup_element:INFO:	Eye window for uplink 22: XXXX__________________________________XX
Data delay found: 20
09:53:12:setup_element:INFO:	Eye window for uplink 23: XXXXXXX______________________________XXX
Data delay found: 21
09:53:12:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
09:53:12:setup_element:INFO:	Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
09:53:12:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
09:53:12:setup_element:INFO:	Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
09:53:12:setup_element:INFO:	Eye window for uplink 28: _______________XXXXXX___________________
Data delay found: 37
09:53:12:setup_element:INFO:	Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
09:53:12:setup_element:INFO:	Eye window for uplink 30: ________________XXXXX___________________
Data delay found: 38
09:53:12:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
09:53:12:setup_element:INFO:	Setting the data phase to 22 for uplink 16
09:53:12:setup_element:INFO:	Setting the data phase to 20 for uplink 17
09:53:12:setup_element:INFO:	Setting the data phase to 21 for uplink 18
09:53:12:setup_element:INFO:	Setting the data phase to 19 for uplink 19
09:53:12:setup_element:INFO:	Setting the data phase to 17 for uplink 20
09:53:12:setup_element:INFO:	Setting the data phase to 16 for uplink 21
09:53:12:setup_element:INFO:	Setting the data phase to 20 for uplink 22
09:53:12:setup_element:INFO:	Setting the data phase to 21 for uplink 23
09:53:12:setup_element:INFO:	Setting the data phase to 28 for uplink 24
09:53:12:setup_element:INFO:	Setting the data phase to 30 for uplink 25
09:53:12:setup_element:INFO:	Setting the data phase to 30 for uplink 26
09:53:12:setup_element:INFO:	Setting the data phase to 33 for uplink 27
09:53:12:setup_element:INFO:	Setting the data phase to 37 for uplink 28
09:53:12:setup_element:INFO:	Setting the data phase to 0 for uplink 29
09:53:12:setup_element:INFO:	Setting the data phase to 38 for uplink 30
09:53:12:setup_element:INFO:	Setting the data phase to 38 for uplink 31
09:53:12:setup_element:INFO:	Beginning SMX ASICs map scan
09:53:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:53:12:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:53:12:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:53:12:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:53:12:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:53:12:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:53:12:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:53:12:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:53:13:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:53:13:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:53:13:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:53:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:53:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:53:13:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:53:13:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:53:13:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:53:13:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:53:13:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:53:13:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:53:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:53:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:53:15:setup_element:INFO:	Performing Elink synchronization
09:53:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:53:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:53:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:53:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:53:15:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:53:15:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:53:16:febtest:INFO:	Init all SMX (CSA): 30
09:53:30:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:53:30:febtest:INFO:	23-00 | XA-000-08-002-000-008-174-06 |  28.2 | 1153.7
09:53:30:febtest:INFO:	30-01 | XA-000-08-002-000-008-063-11 |  25.1 | 1147.8
09:53:30:febtest:INFO:	21-02 | XA-000-08-002-000-008-213-10 |  25.1 | 1165.6
09:53:31:febtest:INFO:	28-03 | XA-000-08-002-000-008-135-08 |  18.7 | 1165.6
09:53:31:febtest:INFO:	19-04 | XA-000-08-002-000-008-192-13 |  28.2 | 1159.7
09:53:31:febtest:INFO:	26-05 | XA-000-08-002-000-008-059-11 |  18.7 | 1177.4
09:53:31:febtest:INFO:	17-06 | XA-000-08-002-000-008-215-10 |  28.2 | 1153.7
09:53:31:febtest:INFO:	24-07 | XA-000-08-002-000-008-047-12 |  18.7 | 1171.5
09:53:32:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:53:35:ST3_smx:INFO:	chip: 23-0 	 28.225000 C 	 1159.654860 mV
09:53:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:35:ST3_smx:INFO:		Electrons
09:53:35:ST3_smx:INFO:	# loops 0
09:53:36:ST3_smx:INFO:	# loops 1
09:53:38:ST3_smx:INFO:	# loops 2
09:53:39:ST3_smx:INFO:	# loops 3
09:53:41:ST3_smx:INFO:	# loops 4
09:53:43:ST3_smx:INFO:	Total # of broken channels: 0
09:53:43:ST3_smx:INFO:	List of broken channels: []
09:53:43:ST3_smx:INFO:	Total # of broken channels: 0
09:53:43:ST3_smx:INFO:	List of broken channels: []
09:53:44:ST3_smx:INFO:	chip: 30-1 	 25.062742 C 	 1159.654860 mV
09:53:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:44:ST3_smx:INFO:		Electrons
09:53:44:ST3_smx:INFO:	# loops 0
09:53:46:ST3_smx:INFO:	# loops 1
09:53:48:ST3_smx:INFO:	# loops 2
09:53:49:ST3_smx:INFO:	# loops 3
09:53:51:ST3_smx:INFO:	# loops 4
09:53:52:ST3_smx:INFO:	Total # of broken channels: 0
09:53:52:ST3_smx:INFO:	List of broken channels: []
09:53:52:ST3_smx:INFO:	Total # of broken channels: 0
09:53:52:ST3_smx:INFO:	List of broken channels: []
09:53:54:ST3_smx:INFO:	chip: 21-2 	 25.062742 C 	 1177.390875 mV
09:53:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:53:54:ST3_smx:INFO:		Electrons
09:53:54:ST3_smx:INFO:	# loops 0
09:53:56:ST3_smx:INFO:	# loops 1
09:53:57:ST3_smx:INFO:	# loops 2
09:53:59:ST3_smx:INFO:	# loops 3
09:54:00:ST3_smx:INFO:	# loops 4
09:54:02:ST3_smx:INFO:	Total # of broken channels: 0
09:54:02:ST3_smx:INFO:	List of broken channels: []
09:54:02:ST3_smx:INFO:	Total # of broken channels: 0
09:54:02:ST3_smx:INFO:	List of broken channels: []
09:54:04:ST3_smx:INFO:	chip: 28-3 	 18.745682 C 	 1177.390875 mV
09:54:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:04:ST3_smx:INFO:		Electrons
09:54:04:ST3_smx:INFO:	# loops 0
09:54:05:ST3_smx:INFO:	# loops 1
09:54:07:ST3_smx:INFO:	# loops 2
09:54:09:ST3_smx:INFO:	# loops 3
09:54:10:ST3_smx:INFO:	# loops 4
09:54:12:ST3_smx:INFO:	Total # of broken channels: 0
09:54:12:ST3_smx:INFO:	List of broken channels: []
09:54:12:ST3_smx:INFO:	Total # of broken channels: 0
09:54:12:ST3_smx:INFO:	List of broken channels: []
09:54:14:ST3_smx:INFO:	chip: 19-4 	 28.225000 C 	 1171.483840 mV
09:54:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:14:ST3_smx:INFO:		Electrons
09:54:14:ST3_smx:INFO:	# loops 0
09:54:15:ST3_smx:INFO:	# loops 1
09:54:17:ST3_smx:INFO:	# loops 2
09:54:18:ST3_smx:INFO:	# loops 3
09:54:20:ST3_smx:INFO:	# loops 4
09:54:21:ST3_smx:INFO:	Total # of broken channels: 0
09:54:21:ST3_smx:INFO:	List of broken channels: []
09:54:21:ST3_smx:INFO:	Total # of broken channels: 0
09:54:21:ST3_smx:INFO:	List of broken channels: []
09:54:23:ST3_smx:INFO:	chip: 26-5 	 18.745682 C 	 1183.292940 mV
09:54:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:23:ST3_smx:INFO:		Electrons
09:54:23:ST3_smx:INFO:	# loops 0
09:54:25:ST3_smx:INFO:	# loops 1
09:54:26:ST3_smx:INFO:	# loops 2
09:54:28:ST3_smx:INFO:	# loops 3
09:54:29:ST3_smx:INFO:	# loops 4
09:54:31:ST3_smx:INFO:	Total # of broken channels: 0
09:54:31:ST3_smx:INFO:	List of broken channels: []
09:54:31:ST3_smx:INFO:	Total # of broken channels: 0
09:54:31:ST3_smx:INFO:	List of broken channels: []
09:54:33:ST3_smx:INFO:	chip: 17-6 	 31.389742 C 	 1165.571835 mV
09:54:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:33:ST3_smx:INFO:		Electrons
09:54:33:ST3_smx:INFO:	# loops 0
09:54:34:ST3_smx:INFO:	# loops 1
09:54:36:ST3_smx:INFO:	# loops 2
09:54:37:ST3_smx:INFO:	# loops 3
09:54:39:ST3_smx:INFO:	# loops 4
09:54:41:ST3_smx:INFO:	Total # of broken channels: 0
09:54:41:ST3_smx:INFO:	List of broken channels: []
09:54:41:ST3_smx:INFO:	Total # of broken channels: 1
09:54:41:ST3_smx:INFO:	List of broken channels: [121]
09:54:42:ST3_smx:INFO:	chip: 24-7 	 21.902970 C 	 1177.390875 mV
09:54:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:54:42:ST3_smx:INFO:		Electrons
09:54:42:ST3_smx:INFO:	# loops 0
09:54:44:ST3_smx:INFO:	# loops 1
09:54:46:ST3_smx:INFO:	# loops 2
09:54:47:ST3_smx:INFO:	# loops 3
09:54:49:ST3_smx:INFO:	# loops 4
09:54:50:ST3_smx:INFO:	Total # of broken channels: 0
09:54:50:ST3_smx:INFO:	List of broken channels: []
09:54:50:ST3_smx:INFO:	Total # of broken channels: 0
09:54:50:ST3_smx:INFO:	List of broken channels: []
09:54:51:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:54:51:febtest:INFO:	23-00 | XA-000-08-002-000-008-174-06 |  31.4 | 1183.3
09:54:51:febtest:INFO:	30-01 | XA-000-08-002-000-008-063-11 |  28.2 | 1177.4
09:54:51:febtest:INFO:	21-02 | XA-000-08-002-000-008-213-10 |  28.2 | 1195.1
09:54:51:febtest:INFO:	28-03 | XA-000-08-002-000-008-135-08 |  21.9 | 1201.0
09:54:52:febtest:INFO:	19-04 | XA-000-08-002-000-008-192-13 |  31.4 | 1189.2
09:54:52:febtest:INFO:	26-05 | XA-000-08-002-000-008-059-11 |  21.9 | 1206.9
09:54:52:febtest:INFO:	17-06 | XA-000-08-002-000-008-215-10 |  31.4 | 1183.3
09:54:52:febtest:INFO:	24-07 | XA-000-08-002-000-008-047-12 |  21.9 | 1201.0
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_06_14-09_52_41
OPERATOR  : Olga B.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2177| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	28034
MODULE_NAME:	L7DL700126 M7DL7T0001260A2 124 C

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.6060', '1.853', '2.0410']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0470', '1.850', '2.6300']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '0.5183']