DTL-STS tests database

FEB_2180 20.06.24 10:24:32

Ladder: L6DL000158
Module: M6DL0T0001580A2
Sensor: 15132
link: XA-000-08-002-002-008-031-12
...SMX_0.root
link: XA-000-08-002-000-007-253-00
...SMX_2.root
link: XA-000-08-002-000-007-227-07
...SMX_4.root
link: XA-000-08-002-002-008-080-09
...SMX_6.root
link: XA-000-08-002-002-008-032-05
...SMX_1.root
link: XA-000-08-002-000-008-015-02
...SMX_3.root
link: XA-000-08-002-002-008-023-12
...SMX_5.root
link: XA-000-08-002-000-008-017-05
...SMX_7.root
link: XA-000-08-002-000-008-017-05
...VddmCSAstatus.root
TextEdit.txt
            10:24:32:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:24:32:ST3_Shared:INFO:	                         FEB-Sensor                         
10:24:32:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:24:52:ST3_ModuleSelector:INFO:	New Sensor ID: 1513
10:24:52:ST3_ModuleSelector:INFO:	New Sensor ID: 15132
10:24:53:ST3_ModuleSelector:INFO:	L6DL000158 M6DL0T0001580A2 42 A

10:24:53:ST3_ModuleSelector:INFO:	15132
10:24:53:febtest:INFO:	Testing FEB with SN 2180
10:24:55:smx_tester:INFO:	Scanning setup
10:24:55:elinks:INFO:	Disabling clock on downlink 0
10:24:55:elinks:INFO:	Disabling clock on downlink 1
10:24:55:elinks:INFO:	Disabling clock on downlink 2
10:24:55:elinks:INFO:	Disabling clock on downlink 3
10:24:55:elinks:INFO:	Disabling clock on downlink 4
10:24:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:24:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:24:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:24:55:elinks:INFO:	Disabling clock on downlink 0
10:24:55:elinks:INFO:	Disabling clock on downlink 1
10:24:55:elinks:INFO:	Disabling clock on downlink 2
10:24:55:elinks:INFO:	Disabling clock on downlink 3
10:24:55:elinks:INFO:	Disabling clock on downlink 4
10:24:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:24:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:24:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:24:55:elinks:INFO:	Disabling clock on downlink 0
10:24:55:elinks:INFO:	Disabling clock on downlink 1
10:24:55:elinks:INFO:	Disabling clock on downlink 2
10:24:55:elinks:INFO:	Disabling clock on downlink 3
10:24:55:elinks:INFO:	Disabling clock on downlink 4
10:24:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:24:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:24:55:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
10:24:55:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
10:24:55:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
10:24:55:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
10:24:55:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
10:24:55:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
10:24:55:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
10:24:55:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
10:24:55:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:24:55:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:24:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:24:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:24:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:24:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:24:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:24:56:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:24:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:24:56:elinks:INFO:	Disabling clock on downlink 0
10:24:56:elinks:INFO:	Disabling clock on downlink 1
10:24:56:elinks:INFO:	Disabling clock on downlink 2
10:24:56:elinks:INFO:	Disabling clock on downlink 3
10:24:56:elinks:INFO:	Disabling clock on downlink 4
10:24:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:24:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:24:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:24:56:elinks:INFO:	Disabling clock on downlink 0
10:24:56:elinks:INFO:	Disabling clock on downlink 1
10:24:56:elinks:INFO:	Disabling clock on downlink 2
10:24:56:elinks:INFO:	Disabling clock on downlink 3
10:24:56:elinks:INFO:	Disabling clock on downlink 4
10:24:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:24:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:24:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:24:56:setup_element:INFO:	Scanning clock phase
10:24:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:24:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:56:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:24:56:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
10:24:56:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
10:24:56:setup_element:INFO:	Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:56:setup_element:INFO:	Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:56:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:56:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:56:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:24:56:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:24:56:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:56:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:24:56:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:24:56:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:24:56:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:24:56:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:24:56:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:24:56:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:24:56:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
10:24:56:setup_element:INFO:	Scanning data phases
10:24:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:24:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:25:02:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:25:02:setup_element:INFO:	Eye window for uplink 16: XX_________________________________XXXXX
Data delay found: 18
10:25:02:setup_element:INFO:	Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
10:25:02:setup_element:INFO:	Eye window for uplink 18: __________________________________XXXXX_
Data delay found: 16
10:25:02:setup_element:INFO:	Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
10:25:02:setup_element:INFO:	Eye window for uplink 20: __________________________________XXXXX_
Data delay found: 16
10:25:02:setup_element:INFO:	Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
10:25:02:setup_element:INFO:	Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
10:25:02:setup_element:INFO:	Eye window for uplink 23: XXXXX______________________________XXXXX
Data delay found: 19
10:25:02:setup_element:INFO:	Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
10:25:02:setup_element:INFO:	Eye window for uplink 25: _________XXXX___________________________
Data delay found: 30
10:25:02:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
10:25:02:setup_element:INFO:	Eye window for uplink 27: ____________XXXXX_______________________
Data delay found: 34
10:25:02:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
10:25:02:setup_element:INFO:	Eye window for uplink 29: _______________XXXXX____________________
Data delay found: 37
10:25:02:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
10:25:02:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
10:25:02:setup_element:INFO:	Setting the data phase to 18 for uplink 16
10:25:02:setup_element:INFO:	Setting the data phase to 16 for uplink 17
10:25:02:setup_element:INFO:	Setting the data phase to 16 for uplink 18
10:25:02:setup_element:INFO:	Setting the data phase to 14 for uplink 19
10:25:02:setup_element:INFO:	Setting the data phase to 16 for uplink 20
10:25:02:setup_element:INFO:	Setting the data phase to 15 for uplink 21
10:25:02:setup_element:INFO:	Setting the data phase to 18 for uplink 22
10:25:02:setup_element:INFO:	Setting the data phase to 19 for uplink 23
10:25:02:setup_element:INFO:	Setting the data phase to 28 for uplink 24
10:25:02:setup_element:INFO:	Setting the data phase to 30 for uplink 25
10:25:02:setup_element:INFO:	Setting the data phase to 30 for uplink 26
10:25:02:setup_element:INFO:	Setting the data phase to 34 for uplink 27
10:25:02:setup_element:INFO:	Setting the data phase to 35 for uplink 28
10:25:02:setup_element:INFO:	Setting the data phase to 37 for uplink 29
10:25:02:setup_element:INFO:	Setting the data phase to 38 for uplink 30
10:25:02:setup_element:INFO:	Setting the data phase to 39 for uplink 31
10:25:02:setup_element:INFO:	Beginning SMX ASICs map scan
10:25:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:25:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:25:02:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:25:02:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:25:02:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:25:02:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:25:02:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:25:02:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:25:02:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:25:02:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:25:02:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:25:02:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:25:02:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:25:02:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:25:03:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:25:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:25:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:25:03:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:25:03:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:25:03:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:25:03:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:25:04:setup_element:INFO:	Performing Elink synchronization
10:25:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:25:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:25:04:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:25:04:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:25:04:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:25:04:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:25:05:febtest:INFO:	Init all SMX (CSA): 30
10:25:20:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:25:20:febtest:INFO:	23-00 | XA-000-08-002-002-008-031-12 |  31.4 | 1171.5
10:25:20:febtest:INFO:	30-01 | XA-000-08-002-002-008-032-05 |  34.6 | 1153.7
10:25:20:febtest:INFO:	21-02 | XA-000-08-002-000-007-253-00 |  44.1 | 1130.0
10:25:20:febtest:INFO:	28-03 | XA-000-08-002-000-008-015-02 |  37.7 | 1147.8
10:25:21:febtest:INFO:	19-04 | XA-000-08-002-000-007-227-07 |  40.9 | 1147.8
10:25:21:febtest:INFO:	26-05 | XA-000-08-002-002-008-023-12 |  34.6 | 1153.7
10:25:21:febtest:INFO:	17-06 | XA-000-08-002-002-008-080-09 |  31.4 | 1183.3
10:25:21:febtest:INFO:	24-07 | XA-000-08-002-000-008-017-05 |  37.7 | 1153.7
10:25:22:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:25:24:ST3_smx:INFO:	chip: 23-0 	 31.389742 C 	 1189.190035 mV
10:25:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:24:ST3_smx:INFO:		Electrons
10:25:24:ST3_smx:INFO:	# loops 0
10:25:26:ST3_smx:INFO:	# loops 1
10:25:28:ST3_smx:INFO:	# loops 2
10:25:29:ST3_smx:INFO:	# loops 3
10:25:31:ST3_smx:INFO:	# loops 4
10:25:33:ST3_smx:INFO:	Total # of broken channels: 0
10:25:33:ST3_smx:INFO:	List of broken channels: []
10:25:33:ST3_smx:INFO:	Total # of broken channels: 0
10:25:33:ST3_smx:INFO:	List of broken channels: []
10:25:35:ST3_smx:INFO:	chip: 30-1 	 31.389742 C 	 1165.571835 mV
10:25:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:35:ST3_smx:INFO:		Electrons
10:25:35:ST3_smx:INFO:	# loops 0
10:25:36:ST3_smx:INFO:	# loops 1
10:25:38:ST3_smx:INFO:	# loops 2
10:25:39:ST3_smx:INFO:	# loops 3
10:25:41:ST3_smx:INFO:	# loops 4
10:25:43:ST3_smx:INFO:	Total # of broken channels: 0
10:25:43:ST3_smx:INFO:	List of broken channels: []
10:25:43:ST3_smx:INFO:	Total # of broken channels: 0
10:25:43:ST3_smx:INFO:	List of broken channels: []
10:25:44:ST3_smx:INFO:	chip: 21-2 	 44.073563 C 	 1141.874115 mV
10:25:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:44:ST3_smx:INFO:		Electrons
10:25:44:ST3_smx:INFO:	# loops 0
10:25:46:ST3_smx:INFO:	# loops 1
10:25:48:ST3_smx:INFO:	# loops 2
10:25:49:ST3_smx:INFO:	# loops 3
10:25:51:ST3_smx:INFO:	# loops 4
10:25:53:ST3_smx:INFO:	Total # of broken channels: 1
10:25:53:ST3_smx:INFO:	List of broken channels: [127]
10:25:53:ST3_smx:INFO:	Total # of broken channels: 1
10:25:53:ST3_smx:INFO:	List of broken channels: [127]
10:25:54:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1159.654860 mV
10:25:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:25:54:ST3_smx:INFO:		Electrons
10:25:54:ST3_smx:INFO:	# loops 0
10:25:56:ST3_smx:INFO:	# loops 1
10:25:58:ST3_smx:INFO:	# loops 2
10:25:59:ST3_smx:INFO:	# loops 3
10:26:01:ST3_smx:INFO:	# loops 4
10:26:03:ST3_smx:INFO:	Total # of broken channels: 0
10:26:03:ST3_smx:INFO:	List of broken channels: []
10:26:03:ST3_smx:INFO:	Total # of broken channels: 1
10:26:03:ST3_smx:INFO:	List of broken channels: [108]
10:26:04:ST3_smx:INFO:	chip: 19-4 	 40.898880 C 	 1159.654860 mV
10:26:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:04:ST3_smx:INFO:		Electrons
10:26:04:ST3_smx:INFO:	# loops 0
10:26:06:ST3_smx:INFO:	# loops 1
10:26:08:ST3_smx:INFO:	# loops 2
10:26:09:ST3_smx:INFO:	# loops 3
10:26:11:ST3_smx:INFO:	# loops 4
10:26:12:ST3_smx:INFO:	Total # of broken channels: 0
10:26:12:ST3_smx:INFO:	List of broken channels: []
10:26:12:ST3_smx:INFO:	Total # of broken channels: 0
10:26:12:ST3_smx:INFO:	List of broken channels: []
10:26:14:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1165.571835 mV
10:26:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:14:ST3_smx:INFO:		Electrons
10:26:14:ST3_smx:INFO:	# loops 0
10:26:16:ST3_smx:INFO:	# loops 1
10:26:18:ST3_smx:INFO:	# loops 2
10:26:19:ST3_smx:INFO:	# loops 3
10:26:21:ST3_smx:INFO:	# loops 4
10:26:22:ST3_smx:INFO:	Total # of broken channels: 0
10:26:22:ST3_smx:INFO:	List of broken channels: []
10:26:22:ST3_smx:INFO:	Total # of broken channels: 0
10:26:22:ST3_smx:INFO:	List of broken channels: []
10:26:24:ST3_smx:INFO:	chip: 17-6 	 31.389742 C 	 1195.082160 mV
10:26:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:24:ST3_smx:INFO:		Electrons
10:26:24:ST3_smx:INFO:	# loops 0
10:26:26:ST3_smx:INFO:	# loops 1
10:26:27:ST3_smx:INFO:	# loops 2
10:26:29:ST3_smx:INFO:	# loops 3
10:26:31:ST3_smx:INFO:	# loops 4
10:26:32:ST3_smx:INFO:	Total # of broken channels: 0
10:26:32:ST3_smx:INFO:	List of broken channels: []
10:26:32:ST3_smx:INFO:	Total # of broken channels: 0
10:26:32:ST3_smx:INFO:	List of broken channels: []
10:26:34:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1165.571835 mV
10:26:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:26:34:ST3_smx:INFO:		Electrons
10:26:34:ST3_smx:INFO:	# loops 0
10:26:36:ST3_smx:INFO:	# loops 1
10:26:37:ST3_smx:INFO:	# loops 2
10:26:39:ST3_smx:INFO:	# loops 3
10:26:41:ST3_smx:INFO:	# loops 4
10:26:42:ST3_smx:INFO:	Total # of broken channels: 0
10:26:42:ST3_smx:INFO:	List of broken channels: []
10:26:42:ST3_smx:INFO:	Total # of broken channels: 0
10:26:42:ST3_smx:INFO:	List of broken channels: []
10:26:43:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:26:43:febtest:INFO:	23-00 | XA-000-08-002-002-008-031-12 |  31.4 | 1206.9
10:26:43:febtest:INFO:	30-01 | XA-000-08-002-002-008-032-05 |  34.6 | 1183.3
10:26:43:febtest:INFO:	21-02 | XA-000-08-002-000-007-253-00 |  47.3 | 1159.7
10:26:43:febtest:INFO:	28-03 | XA-000-08-002-000-008-015-02 |  37.7 | 1183.3
10:26:44:febtest:INFO:	19-04 | XA-000-08-002-000-007-227-07 |  40.9 | 1189.2
10:26:44:febtest:INFO:	26-05 | XA-000-08-002-002-008-023-12 |  34.6 | 1189.2
10:26:44:febtest:INFO:	17-06 | XA-000-08-002-002-008-080-09 |  34.6 | 1212.7
10:26:44:febtest:INFO:	24-07 | XA-000-08-002-000-008-017-05 |  40.9 | 1183.3
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_06_20-10_24_32
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2180| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	15132
MODULE_NAME:	L6DL000158 M6DL0T0001580A2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L6DL000158
MODULE_MODULE:	M6DL0T0001580A2
MODULE_SIZE:	42
MODULE_GRADE:	A
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4930', '1.852', '2.3710']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0330', '1.850', '2.5920']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9800', '1.850', '0.5324']
10:27:53:ST3_Shared:INFO:	Listo of operators:Olga B.;
Comment.txt