Go Back
FEB_2180 11.06.24 13:06:53
TextEdit.txt
13:06:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:06:53:ST3_Shared:INFO: FEB-Microcable
13:06:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:06:53:febtest:INFO: Testing FEB with SN 2180
13:06:55:smx_tester:INFO: Scanning setup
13:06:55:elinks:INFO: Disabling clock on downlink 0
13:06:55:elinks:INFO: Disabling clock on downlink 1
13:06:55:elinks:INFO: Disabling clock on downlink 2
13:06:55:elinks:INFO: Disabling clock on downlink 3
13:06:55:elinks:INFO: Disabling clock on downlink 4
13:06:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:06:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:06:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:06:55:elinks:INFO: Disabling clock on downlink 0
13:06:55:elinks:INFO: Disabling clock on downlink 1
13:06:55:elinks:INFO: Disabling clock on downlink 2
13:06:55:elinks:INFO: Disabling clock on downlink 3
13:06:55:elinks:INFO: Disabling clock on downlink 4
13:06:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:06:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:06:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:06:55:elinks:INFO: Disabling clock on downlink 0
13:06:55:elinks:INFO: Disabling clock on downlink 1
13:06:55:elinks:INFO: Disabling clock on downlink 2
13:06:55:elinks:INFO: Disabling clock on downlink 3
13:06:55:elinks:INFO: Disabling clock on downlink 4
13:06:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:06:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:06:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:06:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:06:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:06:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:06:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:06:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:06:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:06:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:06:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:06:55:elinks:INFO: Disabling clock on downlink 0
13:06:55:elinks:INFO: Disabling clock on downlink 1
13:06:55:elinks:INFO: Disabling clock on downlink 2
13:06:55:elinks:INFO: Disabling clock on downlink 3
13:06:55:elinks:INFO: Disabling clock on downlink 4
13:06:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:06:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:06:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:06:56:elinks:INFO: Disabling clock on downlink 0
13:06:56:elinks:INFO: Disabling clock on downlink 1
13:06:56:elinks:INFO: Disabling clock on downlink 2
13:06:56:elinks:INFO: Disabling clock on downlink 3
13:06:56:elinks:INFO: Disabling clock on downlink 4
13:06:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:06:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:06:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:06:56:setup_element:INFO: Scanning clock phase
13:06:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:06:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:06:56:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:06:56:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:06:56:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:06:56:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:06:56:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:06:56:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
13:06:56:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
13:06:56:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:06:56:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:06:56:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
13:06:56:setup_element:INFO: Scanning data phases
13:06:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:06:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:07:01:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:07:01:setup_element:INFO: Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
13:07:01:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
13:07:01:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
13:07:01:setup_element:INFO: Eye window for uplink 27: ______________XXXXX_____________________
Data delay found: 36
13:07:01:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
13:07:01:setup_element:INFO: Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
13:07:01:setup_element:INFO: Eye window for uplink 30: _________________XXXXX__________________
Data delay found: 39
13:07:01:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
13:07:01:setup_element:INFO: Setting the data phase to 31 for uplink 24
13:07:01:setup_element:INFO: Setting the data phase to 33 for uplink 25
13:07:01:setup_element:INFO: Setting the data phase to 32 for uplink 26
13:07:01:setup_element:INFO: Setting the data phase to 36 for uplink 27
13:07:01:setup_element:INFO: Setting the data phase to 36 for uplink 28
13:07:01:setup_element:INFO: Setting the data phase to 38 for uplink 29
13:07:01:setup_element:INFO: Setting the data phase to 39 for uplink 30
13:07:01:setup_element:INFO: Setting the data phase to 39 for uplink 31
13:07:01:setup_element:INFO: Beginning SMX ASICs map scan
13:07:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:07:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:07:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:07:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:07:02:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:07:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:07:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:07:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:07:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:07:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:07:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:07:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:07:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:07:04:setup_element:INFO: Performing Elink synchronization
13:07:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:07:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:07:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:07:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:07:04:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:07:04:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:07:05:febtest:INFO: Init all SMX (CSA): 30
13:07:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:07:12:febtest:INFO: 30-01 | XA-000-08-002-002-008-032-05 | 28.2 | 1153.7
13:07:13:febtest:INFO: 28-03 | XA-000-08-002-000-008-015-02 | 31.4 | 1147.8
13:07:13:febtest:INFO: 26-05 | XA-000-08-002-002-008-023-12 | 28.2 | 1159.7
13:07:13:febtest:INFO: 24-07 | XA-000-08-002-000-008-017-05 | 31.4 | 1147.8
13:07:14:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:07:16:ST3_smx:INFO: chip: 30-1 28.225000 C 1165.571835 mV
13:07:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:16:ST3_smx:INFO: Electrons
13:07:16:ST3_smx:INFO: # loops 0
13:07:18:ST3_smx:INFO: # loops 1
13:07:19:ST3_smx:INFO: # loops 2
13:07:21:ST3_smx:INFO: Total # of broken channels: 0
13:07:21:ST3_smx:INFO: List of broken channels: []
13:07:21:ST3_smx:INFO: Total # of broken channels: 0
13:07:21:ST3_smx:INFO: List of broken channels: []
13:07:23:ST3_smx:INFO: chip: 28-3 31.389742 C 1153.732915 mV
13:07:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:23:ST3_smx:INFO: Electrons
13:07:23:ST3_smx:INFO: # loops 0
13:07:25:ST3_smx:INFO: # loops 1
13:07:26:ST3_smx:INFO: # loops 2
13:07:28:ST3_smx:INFO: Total # of broken channels: 0
13:07:28:ST3_smx:INFO: List of broken channels: []
13:07:28:ST3_smx:INFO: Total # of broken channels: 0
13:07:28:ST3_smx:INFO: List of broken channels: []
13:07:30:ST3_smx:INFO: chip: 26-5 28.225000 C 1171.483840 mV
13:07:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:30:ST3_smx:INFO: Electrons
13:07:30:ST3_smx:INFO: # loops 0
13:07:31:ST3_smx:INFO: # loops 1
13:07:33:ST3_smx:INFO: # loops 2
13:07:35:ST3_smx:INFO: Total # of broken channels: 0
13:07:35:ST3_smx:INFO: List of broken channels: []
13:07:35:ST3_smx:INFO: Total # of broken channels: 0
13:07:35:ST3_smx:INFO: List of broken channels: []
13:07:36:ST3_smx:INFO: chip: 24-7 31.389742 C 1153.732915 mV
13:07:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:36:ST3_smx:INFO: Electrons
13:07:36:ST3_smx:INFO: # loops 0
13:07:38:ST3_smx:INFO: # loops 1
13:07:40:ST3_smx:INFO: # loops 2
13:07:41:ST3_smx:INFO: Total # of broken channels: 0
13:07:41:ST3_smx:INFO: List of broken channels: []
13:07:41:ST3_smx:INFO: Total # of broken channels: 0
13:07:41:ST3_smx:INFO: List of broken channels: []
13:07:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:07:42:febtest:INFO: 30-01 | XA-000-08-002-002-008-032-05 | 28.2 | 1189.2
13:07:42:febtest:INFO: 28-03 | XA-000-08-002-000-008-015-02 | 31.4 | 1177.4
13:07:42:febtest:INFO: 26-05 | XA-000-08-002-002-008-023-12 | 28.2 | 1189.2
13:07:43:febtest:INFO: 24-07 | XA-000-08-002-000-008-017-05 | 34.6 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_11-13_06_53
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2180| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9699', '1.853', '1.1980']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0310', '1.850', '1.2310']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9936', '1.850', '0.2664']