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FEB_2184 05.06.24 14:21:14
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14:21:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:21:14:ST3_Shared:INFO: FEB-Microcable
14:21:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:21:14:febtest:INFO: Testing FEB with SN 2184
14:21:16:smx_tester:INFO: Scanning setup
14:21:16:elinks:INFO: Disabling clock on downlink 0
14:21:16:elinks:INFO: Disabling clock on downlink 1
14:21:16:elinks:INFO: Disabling clock on downlink 2
14:21:16:elinks:INFO: Disabling clock on downlink 3
14:21:16:elinks:INFO: Disabling clock on downlink 4
14:21:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:21:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:21:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:21:16:elinks:INFO: Disabling clock on downlink 0
14:21:16:elinks:INFO: Disabling clock on downlink 1
14:21:16:elinks:INFO: Disabling clock on downlink 2
14:21:16:elinks:INFO: Disabling clock on downlink 3
14:21:16:elinks:INFO: Disabling clock on downlink 4
14:21:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:21:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:21:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:21:16:elinks:INFO: Disabling clock on downlink 0
14:21:16:elinks:INFO: Disabling clock on downlink 1
14:21:16:elinks:INFO: Disabling clock on downlink 2
14:21:16:elinks:INFO: Disabling clock on downlink 3
14:21:16:elinks:INFO: Disabling clock on downlink 4
14:21:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:21:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:21:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:21:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:21:16:elinks:INFO: Disabling clock on downlink 0
14:21:16:elinks:INFO: Disabling clock on downlink 1
14:21:16:elinks:INFO: Disabling clock on downlink 2
14:21:16:elinks:INFO: Disabling clock on downlink 3
14:21:16:elinks:INFO: Disabling clock on downlink 4
14:21:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:21:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:21:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:21:16:elinks:INFO: Disabling clock on downlink 0
14:21:16:elinks:INFO: Disabling clock on downlink 1
14:21:16:elinks:INFO: Disabling clock on downlink 2
14:21:16:elinks:INFO: Disabling clock on downlink 3
14:21:16:elinks:INFO: Disabling clock on downlink 4
14:21:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:21:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:21:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:21:17:setup_element:INFO: Scanning clock phase
14:21:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:21:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:21:17:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:21:17:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:21:17:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:21:17:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:21:17:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:21:17:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
14:21:17:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
14:21:17:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________X___________
Clock Delay: 28
14:21:17:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________X___________
Clock Delay: 28
14:21:17:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
14:21:17:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
14:21:17:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
14:21:17:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
14:21:17:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:21:17:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:21:17:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:21:17:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:21:17:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
14:21:17:setup_element:INFO: Scanning data phases
14:21:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:21:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:21:22:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:21:22:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
14:21:22:setup_element:INFO: Eye window for uplink 17: ___________________________________XXXX_
Data delay found: 16
14:21:22:setup_element:INFO: Eye window for uplink 18: XXXX_________________________________XXX
Data delay found: 20
14:21:22:setup_element:INFO: Eye window for uplink 19: XXX________________________________XXXXX
Data delay found: 18
14:21:22:setup_element:INFO: Eye window for uplink 20: XX___________________________________XXX
Data delay found: 19
14:21:22:setup_element:INFO: Eye window for uplink 21: X____________________________________XXX
Data delay found: 18
14:21:22:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
14:21:22:setup_element:INFO: Eye window for uplink 23: XXXXXXX____________________________XXXXX
Data delay found: 20
14:21:22:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
14:21:22:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
14:21:22:setup_element:INFO: Eye window for uplink 26: _________XXXXX__________________________
Data delay found: 31
14:21:22:setup_element:INFO: Eye window for uplink 27: ____________XXXXX_______________________
Data delay found: 34
14:21:22:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
14:21:22:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXX___________________
Data delay found: 37
14:21:22:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXXXX________________
Data delay found: 39
14:21:22:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXXXX________________
Data delay found: 39
14:21:22:setup_element:INFO: Setting the data phase to 19 for uplink 16
14:21:22:setup_element:INFO: Setting the data phase to 16 for uplink 17
14:21:22:setup_element:INFO: Setting the data phase to 20 for uplink 18
14:21:22:setup_element:INFO: Setting the data phase to 18 for uplink 19
14:21:22:setup_element:INFO: Setting the data phase to 19 for uplink 20
14:21:22:setup_element:INFO: Setting the data phase to 18 for uplink 21
14:21:22:setup_element:INFO: Setting the data phase to 19 for uplink 22
14:21:22:setup_element:INFO: Setting the data phase to 20 for uplink 23
14:21:22:setup_element:INFO: Setting the data phase to 29 for uplink 24
14:21:22:setup_element:INFO: Setting the data phase to 31 for uplink 25
14:21:22:setup_element:INFO: Setting the data phase to 31 for uplink 26
14:21:22:setup_element:INFO: Setting the data phase to 34 for uplink 27
14:21:22:setup_element:INFO: Setting the data phase to 34 for uplink 28
14:21:22:setup_element:INFO: Setting the data phase to 37 for uplink 29
14:21:23:setup_element:INFO: Setting the data phase to 39 for uplink 30
14:21:23:setup_element:INFO: Setting the data phase to 39 for uplink 31
14:21:23:setup_element:INFO: Beginning SMX ASICs map scan
14:21:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:21:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:21:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:21:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:21:23:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:21:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:21:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:21:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:21:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:21:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:21:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:21:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:21:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:21:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:21:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:21:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:21:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:21:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:21:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:21:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:21:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:21:25:setup_element:INFO: Performing Elink synchronization
14:21:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:21:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:21:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:21:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:21:25:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:21:25:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:21:26:febtest:INFO: Init all SMX (CSA): 30
14:21:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:21:40:febtest:INFO: 23-00 | XA-000-08-002-000-008-055-11 | 28.2 | 1171.5
14:21:40:febtest:INFO: 30-01 | XA-000-08-002-002-006-103-09 | 44.1 | 1124.0
14:21:40:febtest:INFO: 21-02 | XA-000-08-002-000-008-064-07 | 31.4 | 1171.5
14:21:41:febtest:INFO: 28-03 | XA-000-08-002-002-006-112-14 | 31.4 | 1171.5
14:21:41:febtest:INFO: 19-04 | XA-000-08-002-000-008-068-07 | 31.4 | 1171.5
14:21:41:febtest:INFO: 26-05 | XA-000-08-002-002-006-109-09 | 37.7 | 1147.8
14:21:41:febtest:INFO: 17-06 | XA-000-08-002-000-008-050-11 | 28.2 | 1189.2
14:21:42:febtest:INFO: 24-07 | XA-000-08-002-002-006-105-09 | 44.1 | 1135.9
14:21:43:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:21:45:ST3_smx:INFO: chip: 23-0 31.389742 C 1183.292940 mV
14:21:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:21:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:21:45:ST3_smx:INFO: Electrons
14:21:45:ST3_smx:INFO: # loops 0
14:21:46:ST3_smx:INFO: # loops 1
14:21:48:ST3_smx:INFO: # loops 2
14:21:49:ST3_smx:INFO: Total # of broken channels: 0
14:21:49:ST3_smx:INFO: List of broken channels: []
14:21:49:ST3_smx:INFO: Total # of broken channels: 0
14:21:49:ST3_smx:INFO: List of broken channels: []
14:21:51:ST3_smx:INFO: chip: 30-1 40.898880 C 1135.937260 mV
14:21:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:21:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:21:51:ST3_smx:INFO: Electrons
14:21:51:ST3_smx:INFO: # loops 0
14:21:53:ST3_smx:INFO: # loops 1
14:21:54:ST3_smx:INFO: # loops 2
14:21:56:ST3_smx:INFO: Total # of broken channels: 0
14:21:56:ST3_smx:INFO: List of broken channels: []
14:21:56:ST3_smx:INFO: Total # of broken channels: 0
14:21:56:ST3_smx:INFO: List of broken channels: []
14:21:58:ST3_smx:INFO: chip: 21-2 31.389742 C 1183.292940 mV
14:21:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:21:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:21:58:ST3_smx:INFO: Electrons
14:21:58:ST3_smx:INFO: # loops 0
14:22:00:ST3_smx:INFO: # loops 1
14:22:01:ST3_smx:INFO: # loops 2
14:22:03:ST3_smx:INFO: Total # of broken channels: 0
14:22:03:ST3_smx:INFO: List of broken channels: []
14:22:03:ST3_smx:INFO: Total # of broken channels: 0
14:22:03:ST3_smx:INFO: List of broken channels: []
14:22:04:ST3_smx:INFO: chip: 28-3 31.389742 C 1183.292940 mV
14:22:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:04:ST3_smx:INFO: Electrons
14:22:04:ST3_smx:INFO: # loops 0
14:22:06:ST3_smx:INFO: # loops 1
14:22:08:ST3_smx:INFO: # loops 2
14:22:09:ST3_smx:INFO: Total # of broken channels: 0
14:22:09:ST3_smx:INFO: List of broken channels: []
14:22:09:ST3_smx:INFO: Total # of broken channels: 0
14:22:09:ST3_smx:INFO: List of broken channels: []
14:22:11:ST3_smx:INFO: chip: 19-4 31.389742 C 1183.292940 mV
14:22:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:11:ST3_smx:INFO: Electrons
14:22:11:ST3_smx:INFO: # loops 0
14:22:13:ST3_smx:INFO: # loops 1
14:22:14:ST3_smx:INFO: # loops 2
14:22:16:ST3_smx:INFO: Total # of broken channels: 0
14:22:16:ST3_smx:INFO: List of broken channels: []
14:22:16:ST3_smx:INFO: Total # of broken channels: 0
14:22:16:ST3_smx:INFO: List of broken channels: []
14:22:18:ST3_smx:INFO: chip: 26-5 37.726682 C 1159.654860 mV
14:22:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:18:ST3_smx:INFO: Electrons
14:22:18:ST3_smx:INFO: # loops 0
14:22:20:ST3_smx:INFO: # loops 1
14:22:21:ST3_smx:INFO: # loops 2
14:22:23:ST3_smx:INFO: Total # of broken channels: 0
14:22:23:ST3_smx:INFO: List of broken channels: []
14:22:23:ST3_smx:INFO: Total # of broken channels: 0
14:22:23:ST3_smx:INFO: List of broken channels: []
14:22:24:ST3_smx:INFO: chip: 17-6 28.225000 C 1200.969315 mV
14:22:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:24:ST3_smx:INFO: Electrons
14:22:24:ST3_smx:INFO: # loops 0
14:22:26:ST3_smx:INFO: # loops 1
14:22:27:ST3_smx:INFO: # loops 2
14:22:29:ST3_smx:INFO: Total # of broken channels: 0
14:22:29:ST3_smx:INFO: List of broken channels: []
14:22:29:ST3_smx:INFO: Total # of broken channels: 0
14:22:29:ST3_smx:INFO: List of broken channels: []
14:22:31:ST3_smx:INFO: chip: 24-7 44.073563 C 1141.874115 mV
14:22:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:31:ST3_smx:INFO: Electrons
14:22:31:ST3_smx:INFO: # loops 0
14:22:32:ST3_smx:INFO: # loops 1
14:22:34:ST3_smx:INFO: # loops 2
14:22:36:ST3_smx:INFO: Total # of broken channels: 0
14:22:36:ST3_smx:INFO: List of broken channels: []
14:22:36:ST3_smx:INFO: Total # of broken channels: 0
14:22:36:ST3_smx:INFO: List of broken channels: []
14:22:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:22:36:febtest:INFO: 23-00 | XA-000-08-002-000-008-055-11 | 31.4 | 1206.9
14:22:36:febtest:INFO: 30-01 | XA-000-08-002-002-006-103-09 | 44.1 | 1159.7
14:22:37:febtest:INFO: 21-02 | XA-000-08-002-000-008-064-07 | 31.4 | 1206.9
14:22:37:febtest:INFO: 28-03 | XA-000-08-002-002-006-112-14 | 31.4 | 1201.0
14:22:37:febtest:INFO: 19-04 | XA-000-08-002-000-008-068-07 | 34.6 | 1201.0
14:22:37:febtest:INFO: 26-05 | XA-000-08-002-002-006-109-09 | 40.9 | 1177.4
14:22:38:febtest:INFO: 17-06 | XA-000-08-002-000-008-050-11 | 31.4 | 1224.5
14:22:38:febtest:INFO: 24-07 | XA-000-08-002-002-006-105-09 | 47.3 | 1165.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_05-14_21_14
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2184| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9120', '1.852', '2.2480']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9640', '1.850', '2.5450']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9420', '1.850', '0.5149']