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FEB_2186 17.06.24 10:34:36
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10:34:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:34:36:ST3_Shared:INFO: FEB-Microcable
10:34:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:34:36:febtest:INFO: Testing FEB with SN 2186
10:34:37:smx_tester:INFO: Scanning setup
10:34:37:elinks:INFO: Disabling clock on downlink 0
10:34:37:elinks:INFO: Disabling clock on downlink 1
10:34:37:elinks:INFO: Disabling clock on downlink 2
10:34:37:elinks:INFO: Disabling clock on downlink 3
10:34:37:elinks:INFO: Disabling clock on downlink 4
10:34:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:34:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:37:elinks:INFO: Disabling clock on downlink 0
10:34:37:elinks:INFO: Disabling clock on downlink 1
10:34:37:elinks:INFO: Disabling clock on downlink 2
10:34:37:elinks:INFO: Disabling clock on downlink 3
10:34:37:elinks:INFO: Disabling clock on downlink 4
10:34:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:38:elinks:INFO: Disabling clock on downlink 0
10:34:38:elinks:INFO: Disabling clock on downlink 1
10:34:38:elinks:INFO: Disabling clock on downlink 2
10:34:38:elinks:INFO: Disabling clock on downlink 3
10:34:38:elinks:INFO: Disabling clock on downlink 4
10:34:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:34:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:34:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:34:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:34:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:34:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:34:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:34:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:34:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:38:elinks:INFO: Disabling clock on downlink 0
10:34:38:elinks:INFO: Disabling clock on downlink 1
10:34:38:elinks:INFO: Disabling clock on downlink 2
10:34:38:elinks:INFO: Disabling clock on downlink 3
10:34:38:elinks:INFO: Disabling clock on downlink 4
10:34:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:34:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:38:elinks:INFO: Disabling clock on downlink 0
10:34:38:elinks:INFO: Disabling clock on downlink 1
10:34:38:elinks:INFO: Disabling clock on downlink 2
10:34:38:elinks:INFO: Disabling clock on downlink 3
10:34:38:elinks:INFO: Disabling clock on downlink 4
10:34:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:34:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:38:setup_element:INFO: Scanning clock phase
10:34:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:34:38:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:34:38:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:34:38:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:34:38:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:34:38:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:34:38:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:34:38:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:34:38:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:34:38:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:34:38:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
10:34:38:setup_element:INFO: Scanning data phases
10:34:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:34:44:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:34:44:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
10:34:44:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
10:34:44:setup_element:INFO: Eye window for uplink 26: _________XXXX_______________________XXXX
Data delay found: 24
10:34:44:setup_element:INFO: Eye window for uplink 27: _____________XXXX___________________XXXX
Data delay found: 26
10:34:44:setup_element:INFO: Eye window for uplink 28: _____________XXXXXX_____________________
Data delay found: 35
10:34:44:setup_element:INFO: Eye window for uplink 29: ________________XXXXXX__________________
Data delay found: 38
10:34:44:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXX__________________
Data delay found: 38
10:34:44:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
10:34:44:setup_element:INFO: Setting the data phase to 30 for uplink 24
10:34:44:setup_element:INFO: Setting the data phase to 33 for uplink 25
10:34:44:setup_element:INFO: Setting the data phase to 24 for uplink 26
10:34:44:setup_element:INFO: Setting the data phase to 26 for uplink 27
10:34:44:setup_element:INFO: Setting the data phase to 35 for uplink 28
10:34:44:setup_element:INFO: Setting the data phase to 38 for uplink 29
10:34:44:setup_element:INFO: Setting the data phase to 38 for uplink 30
10:34:44:setup_element:INFO: Setting the data phase to 38 for uplink 31
10:34:44:setup_element:INFO: Beginning SMX ASICs map scan
10:34:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:34:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:34:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:34:44:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:34:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:34:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:34:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:34:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:34:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:34:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:34:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:34:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:34:47:setup_element:INFO: Performing Elink synchronization
10:34:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:34:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:34:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:34:47:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:34:47:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:34:47:febtest:INFO: Init all SMX (CSA): 30
10:34:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:34:54:febtest:INFO: 30-01 | XA-000-08-002-000-008-018-05 | 25.1 | 1177.4
10:34:55:febtest:INFO: 28-03 | XA-000-08-002-000-008-037-12 | 40.9 | 1124.0
10:34:55:febtest:INFO: 26-05 | XA-000-08-002-000-008-031-05 | 31.4 | 1165.6
10:34:55:febtest:INFO: 24-07 | XA-000-08-002-000-008-041-12 | 28.2 | 1171.5
10:34:56:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:34:58:ST3_smx:INFO: chip: 30-1 25.062742 C 1189.190035 mV
10:34:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:58:ST3_smx:INFO: Electrons
10:34:58:ST3_smx:INFO: # loops 0
10:35:00:ST3_smx:INFO: # loops 1
10:35:01:ST3_smx:INFO: # loops 2
10:35:03:ST3_smx:INFO: Total # of broken channels: 0
10:35:03:ST3_smx:INFO: List of broken channels: []
10:35:03:ST3_smx:INFO: Total # of broken channels: 0
10:35:03:ST3_smx:INFO: List of broken channels: []
10:35:05:ST3_smx:INFO: chip: 28-3 40.898880 C 1135.937260 mV
10:35:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:05:ST3_smx:INFO: Electrons
10:35:05:ST3_smx:INFO: # loops 0
10:35:06:ST3_smx:INFO: # loops 1
10:35:08:ST3_smx:INFO: # loops 2
10:35:09:ST3_smx:INFO: Total # of broken channels: 0
10:35:09:ST3_smx:INFO: List of broken channels: []
10:35:09:ST3_smx:INFO: Total # of broken channels: 1
10:35:09:ST3_smx:INFO: List of broken channels: [51]
10:35:11:ST3_smx:INFO: chip: 26-5 28.225000 C 1177.390875 mV
10:35:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:11:ST3_smx:INFO: Electrons
10:35:11:ST3_smx:INFO: # loops 0
10:35:13:ST3_smx:INFO: # loops 1
10:35:14:ST3_smx:INFO: # loops 2
10:35:16:ST3_smx:INFO: Total # of broken channels: 0
10:35:16:ST3_smx:INFO: List of broken channels: []
10:35:16:ST3_smx:INFO: Total # of broken channels: 0
10:35:16:ST3_smx:INFO: List of broken channels: []
10:35:18:ST3_smx:INFO: chip: 24-7 28.225000 C 1183.292940 mV
10:35:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:18:ST3_smx:INFO: Electrons
10:35:18:ST3_smx:INFO: # loops 0
10:35:19:ST3_smx:INFO: # loops 1
10:35:21:ST3_smx:INFO: # loops 2
10:35:22:ST3_smx:INFO: Total # of broken channels: 0
10:35:22:ST3_smx:INFO: List of broken channels: []
10:35:22:ST3_smx:INFO: Total # of broken channels: 0
10:35:22:ST3_smx:INFO: List of broken channels: []
10:35:23:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:35:23:febtest:INFO: 30-01 | XA-000-08-002-000-008-018-05 | 25.1 | 1212.7
10:35:23:febtest:INFO: 28-03 | XA-000-08-002-000-008-037-12 | 40.9 | 1153.7
10:35:23:febtest:INFO: 26-05 | XA-000-08-002-000-008-031-05 | 31.4 | 1195.1
10:35:24:febtest:INFO: 24-07 | XA-000-08-002-000-008-041-12 | 31.4 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_17-10_34_36
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2186| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7997', '1.852', '1.4120']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0200', '1.850', '1.2940']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9982', '1.850', '0.2734']