FEB_2187 07.06.24 09:55:12
Info
09:55:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:55:12:ST3_Shared:INFO: FEB-Microcable
09:55:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:55:12:febtest:INFO: Testing FEB with SN 2187
09:55:14:smx_tester:INFO: Scanning setup
09:55:14:elinks:INFO: Disabling clock on downlink 0
09:55:14:elinks:INFO: Disabling clock on downlink 1
09:55:14:elinks:INFO: Disabling clock on downlink 2
09:55:14:elinks:INFO: Disabling clock on downlink 3
09:55:14:elinks:INFO: Disabling clock on downlink 4
09:55:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:55:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:55:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:55:14:elinks:INFO: Disabling clock on downlink 0
09:55:14:elinks:INFO: Disabling clock on downlink 1
09:55:14:elinks:INFO: Disabling clock on downlink 2
09:55:14:elinks:INFO: Disabling clock on downlink 3
09:55:14:elinks:INFO: Disabling clock on downlink 4
09:55:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:55:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:55:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:55:14:elinks:INFO: Disabling clock on downlink 0
09:55:14:elinks:INFO: Disabling clock on downlink 1
09:55:14:elinks:INFO: Disabling clock on downlink 2
09:55:14:elinks:INFO: Disabling clock on downlink 3
09:55:14:elinks:INFO: Disabling clock on downlink 4
09:55:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:55:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:55:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:55:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:55:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:55:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:55:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:55:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:55:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:55:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:55:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:55:14:elinks:INFO: Disabling clock on downlink 0
09:55:14:elinks:INFO: Disabling clock on downlink 1
09:55:14:elinks:INFO: Disabling clock on downlink 2
09:55:14:elinks:INFO: Disabling clock on downlink 3
09:55:15:elinks:INFO: Disabling clock on downlink 4
09:55:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:55:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:55:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:55:15:elinks:INFO: Disabling clock on downlink 0
09:55:15:elinks:INFO: Disabling clock on downlink 1
09:55:15:elinks:INFO: Disabling clock on downlink 2
09:55:15:elinks:INFO: Disabling clock on downlink 3
09:55:15:elinks:INFO: Disabling clock on downlink 4
09:55:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:55:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:55:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:55:15:setup_element:INFO: Scanning clock phase
09:55:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:55:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:55:15:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:55:15:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:55:15:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:55:15:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:55:15:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:55:15:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:55:15:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:55:15:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:55:15:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:55:15:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
09:55:15:setup_element:INFO: Scanning data phases
09:55:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:55:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:55:20:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:55:20:setup_element:INFO: Eye window for uplink 24: _________XXXXXX_________________________
Data delay found: 31
09:55:20:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
09:55:20:setup_element:INFO: Eye window for uplink 26: ____________XXXXX_______________________
Data delay found: 34
09:55:20:setup_element:INFO: Eye window for uplink 27: ________________XXXXX___________________
Data delay found: 38
09:55:20:setup_element:INFO: Eye window for uplink 28: ______________XXXXXX____________________
Data delay found: 36
09:55:20:setup_element:INFO: Eye window for uplink 29: ________________XXXXXXX_________________
Data delay found: 39
09:55:20:setup_element:INFO: Eye window for uplink 30: __________________XXXXXX________________
Data delay found: 0
09:55:20:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXX_______________
Data delay found: 1
09:55:20:setup_element:INFO: Setting the data phase to 31 for uplink 24
09:55:20:setup_element:INFO: Setting the data phase to 33 for uplink 25
09:55:20:setup_element:INFO: Setting the data phase to 34 for uplink 26
09:55:20:setup_element:INFO: Setting the data phase to 38 for uplink 27
09:55:20:setup_element:INFO: Setting the data phase to 36 for uplink 28
09:55:20:setup_element:INFO: Setting the data phase to 39 for uplink 29
09:55:20:setup_element:INFO: Setting the data phase to 0 for uplink 30
09:55:21:setup_element:INFO: Setting the data phase to 1 for uplink 31
09:55:21:setup_element:INFO: Beginning SMX ASICs map scan
09:55:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:55:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:55:21:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:55:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:55:21:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:55:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:55:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:55:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:55:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:55:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:55:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:55:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:55:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:55:23:setup_element:INFO: Performing Elink synchronization
09:55:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:55:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:55:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:55:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:55:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:55:23:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:55:24:febtest:INFO: Init all SMX (CSA): 30
09:55:31:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:55:31:febtest:INFO: 30-01 | XA-000-08-002-000-008-181-01 | 28.2 | 1165.6
09:55:32:febtest:INFO: 28-03 | XA-000-08-002-000-008-105-09 | 25.1 | 1177.4
09:55:32:febtest:INFO: 26-05 | XA-000-08-002-000-008-167-06 | 44.1 | 1118.1
09:55:32:febtest:INFO: 24-07 | XA-000-08-002-000-008-217-10 | 44.1 | 1124.0
09:55:33:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:55:35:ST3_smx:INFO: chip: 30-1 28.225000 C 1177.390875 mV
09:55:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:55:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:55:35:ST3_smx:INFO: Electrons
09:55:35:ST3_smx:INFO: # loops 0
09:55:37:ST3_smx:INFO: # loops 1
09:55:39:ST3_smx:INFO: # loops 2
09:55:40:ST3_smx:INFO: Total # of broken channels: 0
09:55:40:ST3_smx:INFO: List of broken channels: []
09:55:40:ST3_smx:INFO: Total # of broken channels: 0
09:55:40:ST3_smx:INFO: List of broken channels: []
09:55:42:ST3_smx:INFO: chip: 28-3 25.062742 C 1195.082160 mV
09:55:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:55:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:55:42:ST3_smx:INFO: Electrons
09:55:42:ST3_smx:INFO: # loops 0
09:55:44:ST3_smx:INFO: # loops 1
09:55:45:ST3_smx:INFO: # loops 2
09:55:47:ST3_smx:INFO: Total # of broken channels: 0
09:55:47:ST3_smx:INFO: List of broken channels: []
09:55:47:ST3_smx:INFO: Total # of broken channels: 0
09:55:47:ST3_smx:INFO: List of broken channels: []
09:55:49:ST3_smx:INFO: chip: 26-5 44.073563 C 1124.048640 mV
09:55:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:55:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:55:49:ST3_smx:INFO: Electrons
09:55:49:ST3_smx:INFO: # loops 0
09:55:51:ST3_smx:INFO: # loops 1
09:55:52:ST3_smx:INFO: # loops 2
09:55:54:ST3_smx:INFO: Total # of broken channels: 0
09:55:54:ST3_smx:INFO: List of broken channels: []
09:55:54:ST3_smx:INFO: Total # of broken channels: 0
09:55:54:ST3_smx:INFO: List of broken channels: []
09:55:55:ST3_smx:INFO: chip: 24-7 44.073563 C 1129.995435 mV
09:55:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:55:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:55:55:ST3_smx:INFO: Electrons
09:55:55:ST3_smx:INFO: # loops 0
09:55:57:ST3_smx:INFO: # loops 1
09:55:59:ST3_smx:INFO: # loops 2
09:56:00:ST3_smx:INFO: Total # of broken channels: 0
09:56:00:ST3_smx:INFO: List of broken channels: []
09:56:00:ST3_smx:INFO: Total # of broken channels: 0
09:56:00:ST3_smx:INFO: List of broken channels: []
09:56:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:56:01:febtest:INFO: 30-01 | XA-000-08-002-000-008-181-01 | 28.2 | 1201.0
09:56:01:febtest:INFO: 28-03 | XA-000-08-002-000-008-105-09 | 25.1 | 1212.7
09:56:01:febtest:INFO: 26-05 | XA-000-08-002-000-008-167-06 | 44.1 | 1147.8
09:56:02:febtest:INFO: 24-07 | XA-000-08-002-000-008-217-10 | 44.1 | 1147.8
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_07-09_55_12
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2187| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9795', '1.852', '1.2320']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0320', '1.850', '1.3030']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0100', '1.850', '0.2703']