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FEB_2187 07.06.24 13:34:02
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13:34:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:02:ST3_Shared:INFO: FEB-Microcable
13:34:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:02:febtest:INFO: Testing FEB with SN 2187
13:34:03:smx_tester:INFO: Scanning setup
13:34:03:elinks:INFO: Disabling clock on downlink 0
13:34:03:elinks:INFO: Disabling clock on downlink 1
13:34:03:elinks:INFO: Disabling clock on downlink 2
13:34:03:elinks:INFO: Disabling clock on downlink 3
13:34:03:elinks:INFO: Disabling clock on downlink 4
13:34:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:34:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:04:elinks:INFO: Disabling clock on downlink 0
13:34:04:elinks:INFO: Disabling clock on downlink 1
13:34:04:elinks:INFO: Disabling clock on downlink 2
13:34:04:elinks:INFO: Disabling clock on downlink 3
13:34:04:elinks:INFO: Disabling clock on downlink 4
13:34:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:34:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:04:elinks:INFO: Disabling clock on downlink 0
13:34:04:elinks:INFO: Disabling clock on downlink 1
13:34:04:elinks:INFO: Disabling clock on downlink 2
13:34:04:elinks:INFO: Disabling clock on downlink 3
13:34:04:elinks:INFO: Disabling clock on downlink 4
13:34:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:34:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:34:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:04:elinks:INFO: Disabling clock on downlink 0
13:34:04:elinks:INFO: Disabling clock on downlink 1
13:34:04:elinks:INFO: Disabling clock on downlink 2
13:34:04:elinks:INFO: Disabling clock on downlink 3
13:34:04:elinks:INFO: Disabling clock on downlink 4
13:34:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:34:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:04:elinks:INFO: Disabling clock on downlink 0
13:34:04:elinks:INFO: Disabling clock on downlink 1
13:34:04:elinks:INFO: Disabling clock on downlink 2
13:34:04:elinks:INFO: Disabling clock on downlink 3
13:34:04:elinks:INFO: Disabling clock on downlink 4
13:34:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:34:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:04:setup_element:INFO: Scanning clock phase
13:34:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:05:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:34:05:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:34:05:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:34:05:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:34:05:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:34:05:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:34:05:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:34:05:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:34:05:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:34:05:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:34:05:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:34:05:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
13:34:05:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
13:34:05:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:34:05:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:34:05:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:34:05:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:34:05:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
13:34:05:setup_element:INFO: Scanning data phases
13:34:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:10:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:34:10:setup_element:INFO: Eye window for uplink 16: XXXX__________________________________XX
Data delay found: 20
13:34:10:setup_element:INFO: Eye window for uplink 17: XX__________________________________XXXX
Data delay found: 18
13:34:10:setup_element:INFO: Eye window for uplink 18: X__________________________________XXXXX
Data delay found: 17
13:34:10:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
13:34:10:setup_element:INFO: Eye window for uplink 20: XXX___________________________________XX
Data delay found: 20
13:34:10:setup_element:INFO: Eye window for uplink 21: XX__________________________________XXXX
Data delay found: 18
13:34:10:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
13:34:10:setup_element:INFO: Eye window for uplink 23: XXXXXX_____________________________XXXXX
Data delay found: 20
13:34:10:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
13:34:10:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
13:34:10:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
13:34:10:setup_element:INFO: Eye window for uplink 27: ______________XXXXX_____________________
Data delay found: 36
13:34:10:setup_element:INFO: Eye window for uplink 28: _____________XXXXXX_____________________
Data delay found: 35
13:34:10:setup_element:INFO: Eye window for uplink 29: _______________XXXXXXX__________________
Data delay found: 38
13:34:10:setup_element:INFO: Eye window for uplink 30: __________________XXXXXX________________
Data delay found: 0
13:34:10:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXX_______________
Data delay found: 1
13:34:10:setup_element:INFO: Setting the data phase to 20 for uplink 16
13:34:10:setup_element:INFO: Setting the data phase to 18 for uplink 17
13:34:10:setup_element:INFO: Setting the data phase to 17 for uplink 18
13:34:10:setup_element:INFO: Setting the data phase to 15 for uplink 19
13:34:10:setup_element:INFO: Setting the data phase to 20 for uplink 20
13:34:10:setup_element:INFO: Setting the data phase to 18 for uplink 21
13:34:10:setup_element:INFO: Setting the data phase to 19 for uplink 22
13:34:10:setup_element:INFO: Setting the data phase to 20 for uplink 23
13:34:10:setup_element:INFO: Setting the data phase to 29 for uplink 24
13:34:10:setup_element:INFO: Setting the data phase to 31 for uplink 25
13:34:10:setup_element:INFO: Setting the data phase to 32 for uplink 26
13:34:10:setup_element:INFO: Setting the data phase to 36 for uplink 27
13:34:10:setup_element:INFO: Setting the data phase to 35 for uplink 28
13:34:10:setup_element:INFO: Setting the data phase to 38 for uplink 29
13:34:10:setup_element:INFO: Setting the data phase to 0 for uplink 30
13:34:10:setup_element:INFO: Setting the data phase to 1 for uplink 31
13:34:10:setup_element:INFO: Beginning SMX ASICs map scan
13:34:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:34:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:34:10:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:34:11:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:34:11:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:34:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:34:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:34:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:34:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:34:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:34:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:34:11:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:34:11:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:34:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:34:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:34:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:34:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:34:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:34:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:34:13:setup_element:INFO: Performing Elink synchronization
13:34:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:34:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:34:13:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:34:13:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:34:14:febtest:INFO: Init all SMX (CSA): 30
13:34:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:34:28:febtest:INFO: 23-00 | XA-000-08-002-000-008-160-06 | 53.6 | 1100.2
13:34:29:febtest:INFO: 30-01 | XA-000-08-002-000-008-181-01 | 34.6 | 1165.6
13:34:29:febtest:INFO: 21-02 | XA-000-08-002-000-008-156-15 | 60.0 | 1082.3
13:34:29:febtest:INFO: 28-03 | XA-000-08-002-000-008-105-09 | 21.9 | 1206.9
13:34:29:febtest:INFO: 19-04 | XA-000-08-002-000-008-203-13 | 44.1 | 1130.0
13:34:30:febtest:INFO: 26-05 | XA-000-08-002-000-008-167-06 | 50.4 | 1112.1
13:34:30:febtest:INFO: 17-06 | XA-000-08-002-000-008-118-14 | 50.4 | 1112.1
13:34:30:febtest:INFO: 24-07 | XA-000-08-002-000-008-217-10 | 50.4 | 1118.1
13:34:31:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:34:33:ST3_smx:INFO: chip: 23-0 53.612520 C 1112.140140 mV
13:34:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:33:ST3_smx:INFO: Electrons
13:34:33:ST3_smx:INFO: # loops 0
13:34:35:ST3_smx:INFO: # loops 1
13:34:37:ST3_smx:INFO: # loops 2
13:34:40:ST3_smx:INFO: Total # of broken channels: 0
13:34:40:ST3_smx:INFO: List of broken channels: []
13:34:40:ST3_smx:INFO: Total # of broken channels: 0
13:34:40:ST3_smx:INFO: List of broken channels: []
13:34:42:ST3_smx:INFO: chip: 30-1 34.556970 C 1177.390875 mV
13:34:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:42:ST3_smx:INFO: Electrons
13:34:42:ST3_smx:INFO: # loops 0
13:34:44:ST3_smx:INFO: # loops 1
13:34:46:ST3_smx:INFO: # loops 2
13:34:47:ST3_smx:INFO: Total # of broken channels: 0
13:34:47:ST3_smx:INFO: List of broken channels: []
13:34:47:ST3_smx:INFO: Total # of broken channels: 0
13:34:47:ST3_smx:INFO: List of broken channels: []
13:34:49:ST3_smx:INFO: chip: 21-2 59.984250 C 1100.211760 mV
13:34:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:49:ST3_smx:INFO: Electrons
13:34:49:ST3_smx:INFO: # loops 0
13:34:51:ST3_smx:INFO: # loops 1
13:34:53:ST3_smx:INFO: # loops 2
13:34:54:ST3_smx:INFO: Total # of broken channels: 0
13:34:54:ST3_smx:INFO: List of broken channels: []
13:34:54:ST3_smx:INFO: Total # of broken channels: 9
13:34:54:ST3_smx:INFO: List of broken channels: [6, 8, 10, 12, 14, 16, 18, 20, 22]
13:34:56:ST3_smx:INFO: chip: 28-3 21.902970 C 1218.600960 mV
13:34:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:56:ST3_smx:INFO: Electrons
13:34:56:ST3_smx:INFO: # loops 0
13:34:58:ST3_smx:INFO: # loops 1
13:35:00:ST3_smx:INFO: # loops 2
13:35:02:ST3_smx:INFO: Total # of broken channels: 0
13:35:02:ST3_smx:INFO: List of broken channels: []
13:35:02:ST3_smx:INFO: Total # of broken channels: 0
13:35:02:ST3_smx:INFO: List of broken channels: []
13:35:04:ST3_smx:INFO: chip: 19-4 47.250730 C 1141.874115 mV
13:35:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:04:ST3_smx:INFO: Electrons
13:35:04:ST3_smx:INFO: # loops 0
13:35:06:ST3_smx:INFO: # loops 1
13:35:08:ST3_smx:INFO: # loops 2
13:35:09:ST3_smx:INFO: Total # of broken channels: 0
13:35:09:ST3_smx:INFO: List of broken channels: []
13:35:09:ST3_smx:INFO: Total # of broken channels: 1
13:35:09:ST3_smx:INFO: List of broken channels: [69]
13:35:11:ST3_smx:INFO: chip: 26-5 50.430383 C 1124.048640 mV
13:35:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:11:ST3_smx:INFO: Electrons
13:35:11:ST3_smx:INFO: # loops 0
13:35:13:ST3_smx:INFO: # loops 1
13:35:15:ST3_smx:INFO: # loops 2
13:35:17:ST3_smx:INFO: Total # of broken channels: 0
13:35:17:ST3_smx:INFO: List of broken channels: []
13:35:17:ST3_smx:INFO: Total # of broken channels: 0
13:35:17:ST3_smx:INFO: List of broken channels: []
13:35:19:ST3_smx:INFO: chip: 17-6 53.612520 C 1124.048640 mV
13:35:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:19:ST3_smx:INFO: Electrons
13:35:19:ST3_smx:INFO: # loops 0
13:35:20:ST3_smx:INFO: # loops 1
13:35:22:ST3_smx:INFO: # loops 2
13:35:24:ST3_smx:INFO: Total # of broken channels: 0
13:35:24:ST3_smx:INFO: List of broken channels: []
13:35:24:ST3_smx:INFO: Total # of broken channels: 0
13:35:24:ST3_smx:INFO: List of broken channels: []
13:35:26:ST3_smx:INFO: chip: 24-7 50.430383 C 1124.048640 mV
13:35:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:26:ST3_smx:INFO: Electrons
13:35:26:ST3_smx:INFO: # loops 0
13:35:27:ST3_smx:INFO: # loops 1
13:35:29:ST3_smx:INFO: # loops 2
13:35:31:ST3_smx:INFO: Total # of broken channels: 0
13:35:31:ST3_smx:INFO: List of broken channels: []
13:35:31:ST3_smx:INFO: Total # of broken channels: 0
13:35:31:ST3_smx:INFO: List of broken channels: []
13:35:31:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:35:31:febtest:INFO: 23-00 | XA-000-08-002-000-008-160-06 | 53.6 | 1130.0
13:35:31:febtest:INFO: 30-01 | XA-000-08-002-000-008-181-01 | 34.6 | 1195.1
13:35:32:febtest:INFO: 21-02 | XA-000-08-002-000-008-156-15 | 60.0 | 1118.1
13:35:32:febtest:INFO: 28-03 | XA-000-08-002-000-008-105-09 | 21.9 | 1242.0
13:35:32:febtest:INFO: 19-04 | XA-000-08-002-000-008-203-13 | 47.3 | 1159.7
13:35:32:febtest:INFO: 26-05 | XA-000-08-002-000-008-167-06 | 50.4 | 1141.9
13:35:32:febtest:INFO: 17-06 | XA-000-08-002-000-008-118-14 | 53.6 | 1141.9
13:35:33:febtest:INFO: 24-07 | XA-000-08-002-000-008-217-10 | 53.6 | 1147.8
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_07-13_34_02
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2187| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4850', '1.852', '2.2930']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0160', '1.850', '2.5940']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0040', '1.850', '0.5309']