13:31:02:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:31:02:ST3_Shared:INFO:	                       FEB-Microcable                       
13:31:02:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:31:02:febtest:INFO:	Testing FEB with SN 2190
13:31:04:smx_tester:INFO:	Scanning setup
13:31:04:elinks:INFO:	Disabling clock on downlink 0
13:31:04:elinks:INFO:	Disabling clock on downlink 1
13:31:04:elinks:INFO:	Disabling clock on downlink 2
13:31:04:elinks:INFO:	Disabling clock on downlink 3
13:31:04:elinks:INFO:	Disabling clock on downlink 4
13:31:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:31:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:04:elinks:INFO:	Disabling clock on downlink 0
13:31:04:elinks:INFO:	Disabling clock on downlink 1
13:31:04:elinks:INFO:	Disabling clock on downlink 2
13:31:04:elinks:INFO:	Disabling clock on downlink 3
13:31:04:elinks:INFO:	Disabling clock on downlink 4
13:31:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:31:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:04:elinks:INFO:	Disabling clock on downlink 0
13:31:04:elinks:INFO:	Disabling clock on downlink 1
13:31:04:elinks:INFO:	Disabling clock on downlink 2
13:31:04:elinks:INFO:	Disabling clock on downlink 3
13:31:04:elinks:INFO:	Disabling clock on downlink 4
13:31:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:31:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:31:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:31:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:31:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:31:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:31:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:31:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:31:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:04:elinks:INFO:	Disabling clock on downlink 0
13:31:04:elinks:INFO:	Disabling clock on downlink 1
13:31:04:elinks:INFO:	Disabling clock on downlink 2
13:31:04:elinks:INFO:	Disabling clock on downlink 3
13:31:04:elinks:INFO:	Disabling clock on downlink 4
13:31:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:31:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:04:elinks:INFO:	Disabling clock on downlink 0
13:31:04:elinks:INFO:	Disabling clock on downlink 1
13:31:04:elinks:INFO:	Disabling clock on downlink 2
13:31:04:elinks:INFO:	Disabling clock on downlink 3
13:31:04:elinks:INFO:	Disabling clock on downlink 4
13:31:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:31:05:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:05:setup_element:INFO:	Scanning clock phase
13:31:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:05:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:31:05:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:31:05:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:31:05:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:31:05:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:31:05:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:31:05:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:31:05:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:31:05:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:31:05:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 2
13:31:05:setup_element:INFO:	Scanning data phases
13:31:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:10:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:31:10:setup_element:INFO:	Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
13:31:10:setup_element:INFO:	Eye window for uplink 25: ___________XXXX_________________________
Data delay found: 32
13:31:10:setup_element:INFO:	Eye window for uplink 26: ________XXXXXX________________________XX
Data delay found: 25
13:31:10:setup_element:INFO:	Eye window for uplink 27: ____________XXXXXX____________________XX
Data delay found: 27
13:31:10:setup_element:INFO:	Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
13:31:10:setup_element:INFO:	Eye window for uplink 29: ________________XXXXXX__________________
Data delay found: 38
13:31:10:setup_element:INFO:	Eye window for uplink 30: _________________XXXXX__________________
Data delay found: 39
13:31:10:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
13:31:10:setup_element:INFO:	Setting the data phase to 30 for uplink 24
13:31:10:setup_element:INFO:	Setting the data phase to 32 for uplink 25
13:31:10:setup_element:INFO:	Setting the data phase to 25 for uplink 26
13:31:10:setup_element:INFO:	Setting the data phase to 27 for uplink 27
13:31:10:setup_element:INFO:	Setting the data phase to 36 for uplink 28
13:31:10:setup_element:INFO:	Setting the data phase to 38 for uplink 29
13:31:10:setup_element:INFO:	Setting the data phase to 39 for uplink 30
13:31:10:setup_element:INFO:	Setting the data phase to 39 for uplink 31
13:31:10:setup_element:INFO:	Beginning SMX ASICs map scan
13:31:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:10:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:31:10:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:31:10:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:31:11:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:31:11:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:31:11:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:31:11:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:31:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:31:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:31:12:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:31:12:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:31:13:setup_element:INFO:	Performing Elink synchronization
13:31:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:13:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:31:13:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:31:13:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:31:13:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
13:31:14:febtest:INFO:	Init all SMX (CSA): 30
13:31:21:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:31:21:febtest:INFO:	30-01 | XA-000-08-002-002-007-220-07 |  28.2 | 1171.5
13:31:21:febtest:INFO:	28-03 | XA-000-08-002-002-007-215-07 |  18.7 | 1212.7
13:31:21:febtest:INFO:	26-05 | XA-000-08-002-002-007-197-00 |  37.7 | 1141.9
13:31:22:febtest:INFO:	24-07 | XA-000-08-002-002-007-198-00 |  31.4 | 1165.6
13:31:23:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:31:25:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1183.292940 mV
13:31:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:25:ST3_smx:INFO:		Electrons
13:31:25:ST3_smx:INFO:	# loops 0
13:31:27:ST3_smx:INFO:	# loops 1
13:31:28:ST3_smx:INFO:	# loops 2
13:31:30:ST3_smx:INFO:	Total # of broken channels: 0
13:31:30:ST3_smx:INFO:	List of broken channels: []
13:31:30:ST3_smx:INFO:	Total # of broken channels: 0
13:31:30:ST3_smx:INFO:	List of broken channels: []
13:31:32:ST3_smx:INFO:	chip: 28-3 	 18.745682 C 	 1224.468235 mV
13:31:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:32:ST3_smx:INFO:		Electrons
13:31:32:ST3_smx:INFO:	# loops 0
13:31:33:ST3_smx:INFO:	# loops 1
13:31:35:ST3_smx:INFO:	# loops 2
13:31:36:ST3_smx:INFO:	Total # of broken channels: 0
13:31:36:ST3_smx:INFO:	List of broken channels: []
13:31:36:ST3_smx:INFO:	Total # of broken channels: 0
13:31:36:ST3_smx:INFO:	List of broken channels: []
13:31:38:ST3_smx:INFO:	chip: 26-5 	 37.726682 C 	 1147.806000 mV
13:31:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:38:ST3_smx:INFO:		Electrons
13:31:38:ST3_smx:INFO:	# loops 0
13:31:41:ST3_smx:INFO:	# loops 1
13:31:43:ST3_smx:INFO:	# loops 2
13:31:44:ST3_smx:INFO:	Total # of broken channels: 0
13:31:44:ST3_smx:INFO:	List of broken channels: []
13:31:44:ST3_smx:INFO:	Total # of broken channels: 0
13:31:44:ST3_smx:INFO:	List of broken channels: []
13:31:46:ST3_smx:INFO:	chip: 24-7 	 34.556970 C 	 1177.390875 mV
13:31:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:31:46:ST3_smx:INFO:		Electrons
13:31:46:ST3_smx:INFO:	# loops 0
13:31:48:ST3_smx:INFO:	# loops 1
13:31:49:ST3_smx:INFO:	# loops 2
13:31:51:ST3_smx:INFO:	Total # of broken channels: 0
13:31:51:ST3_smx:INFO:	List of broken channels: []
13:31:51:ST3_smx:INFO:	Total # of broken channels: 0
13:31:51:ST3_smx:INFO:	List of broken channels: []
13:31:51:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:31:51:febtest:INFO:	30-01 | XA-000-08-002-002-007-220-07 |  28.2 | 1201.0
13:31:51:febtest:INFO:	28-03 | XA-000-08-002-002-007-215-07 |  18.7 | 1247.9
13:31:52:febtest:INFO:	26-05 | XA-000-08-002-002-007-197-00 |  40.9 | 1171.5
13:31:52:febtest:INFO:	24-07 | XA-000-08-002-002-007-198-00 |  34.6 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_20-13_31_02
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2190| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9364', '1.853', '1.0480']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9947', '1.850', '1.2690']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9744', '1.850', '0.2597']