FEB_2193    06.08.24 08:08:38

TextEdit.txt
            08:08:38:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:08:38:ST3_Shared:INFO:	                         FEB-Sensor                         
08:08:38:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:09:20:ST3_ModuleSelector:INFO:	M7DL5B4001234B2
08:09:20:ST3_ModuleSelector:INFO:	18094
08:09:20:febtest:INFO:	Testing FEB with SN 2193
08:09:21:smx_tester:INFO:	Scanning setup
08:09:21:elinks:INFO:	Disabling clock on downlink 0
08:09:21:elinks:INFO:	Disabling clock on downlink 1
08:09:21:elinks:INFO:	Disabling clock on downlink 2
08:09:21:elinks:INFO:	Disabling clock on downlink 3
08:09:21:elinks:INFO:	Disabling clock on downlink 4
08:09:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:09:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:09:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:09:22:elinks:INFO:	Disabling clock on downlink 0
08:09:22:elinks:INFO:	Disabling clock on downlink 1
08:09:22:elinks:INFO:	Disabling clock on downlink 2
08:09:22:elinks:INFO:	Disabling clock on downlink 3
08:09:22:elinks:INFO:	Disabling clock on downlink 4
08:09:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:09:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:09:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:09:22:elinks:INFO:	Disabling clock on downlink 0
08:09:22:elinks:INFO:	Disabling clock on downlink 1
08:09:22:elinks:INFO:	Disabling clock on downlink 2
08:09:22:elinks:INFO:	Disabling clock on downlink 3
08:09:22:elinks:INFO:	Disabling clock on downlink 4
08:09:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:09:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
08:09:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
08:09:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:09:22:elinks:INFO:	Disabling clock on downlink 0
08:09:22:elinks:INFO:	Disabling clock on downlink 1
08:09:22:elinks:INFO:	Disabling clock on downlink 2
08:09:22:elinks:INFO:	Disabling clock on downlink 3
08:09:22:elinks:INFO:	Disabling clock on downlink 4
08:09:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:09:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:09:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:09:22:elinks:INFO:	Disabling clock on downlink 0
08:09:22:elinks:INFO:	Disabling clock on downlink 1
08:09:22:elinks:INFO:	Disabling clock on downlink 2
08:09:22:elinks:INFO:	Disabling clock on downlink 3
08:09:22:elinks:INFO:	Disabling clock on downlink 4
08:09:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:09:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:09:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:09:22:setup_element:INFO:	Scanning clock phase
08:09:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:09:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:09:23:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
08:09:23:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:09:23:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:09:23:setup_element:INFO:	Eye window for uplink 18: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:09:23:setup_element:INFO:	Eye window for uplink 19: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:09:23:setup_element:INFO:	Eye window for uplink 20: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:09:23:setup_element:INFO:	Eye window for uplink 21: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:09:23:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
08:09:23:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
08:09:23:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:09:23:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:09:23:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:09:23:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:09:23:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:09:23:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:09:23:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:09:23:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:09:23:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
08:09:23:setup_element:INFO:	Scanning data phases
08:09:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:09:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:09:28:setup_element:INFO:	Data phase scan results for group 0, downlink 2
08:09:28:setup_element:INFO:	Eye window for uplink 16: X__________________________________XXXXX
Data delay found: 17
08:09:28:setup_element:INFO:	Eye window for uplink 17: _________________________________XXXXX__
Data delay found: 15
08:09:28:setup_element:INFO:	Eye window for uplink 18: __________________________________XXXXX_
Data delay found: 16
08:09:28:setup_element:INFO:	Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
08:09:28:setup_element:INFO:	Eye window for uplink 20: ________________________________XXXXX___
Data delay found: 14
08:09:28:setup_element:INFO:	Eye window for uplink 21: ______________________________XXXXXX____
Data delay found: 12
08:09:28:setup_element:INFO:	Eye window for uplink 22: _________________________________XXXXX__
Data delay found: 15
08:09:28:setup_element:INFO:	Eye window for uplink 23: XXXX____________________________XXXXXXXX
Data delay found: 17
08:09:28:setup_element:INFO:	Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
08:09:28:setup_element:INFO:	Eye window for uplink 25: ______XXXXX_____________________________
Data delay found: 28
08:09:28:setup_element:INFO:	Eye window for uplink 26: ______XXXXXX____________________________
Data delay found: 28
08:09:28:setup_element:INFO:	Eye window for uplink 27: __________XXXXX_________________________
Data delay found: 32
08:09:28:setup_element:INFO:	Eye window for uplink 28: ______________XXXXXX____________________
Data delay found: 36
08:09:28:setup_element:INFO:	Eye window for uplink 29: ________________XXXXXX__________________
Data delay found: 38
08:09:28:setup_element:INFO:	Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
08:09:28:setup_element:INFO:	Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
08:09:28:setup_element:INFO:	Setting the data phase to 17 for uplink 16
08:09:28:setup_element:INFO:	Setting the data phase to 15 for uplink 17
08:09:28:setup_element:INFO:	Setting the data phase to 16 for uplink 18
08:09:28:setup_element:INFO:	Setting the data phase to 14 for uplink 19
08:09:28:setup_element:INFO:	Setting the data phase to 14 for uplink 20
08:09:28:setup_element:INFO:	Setting the data phase to 12 for uplink 21
08:09:28:setup_element:INFO:	Setting the data phase to 15 for uplink 22
08:09:28:setup_element:INFO:	Setting the data phase to 17 for uplink 23
08:09:28:setup_element:INFO:	Setting the data phase to 26 for uplink 24
08:09:28:setup_element:INFO:	Setting the data phase to 28 for uplink 25
08:09:28:setup_element:INFO:	Setting the data phase to 28 for uplink 26
08:09:28:setup_element:INFO:	Setting the data phase to 32 for uplink 27
08:09:28:setup_element:INFO:	Setting the data phase to 36 for uplink 28
08:09:28:setup_element:INFO:	Setting the data phase to 38 for uplink 29
08:09:28:setup_element:INFO:	Setting the data phase to 37 for uplink 30
08:09:28:setup_element:INFO:	Setting the data phase to 37 for uplink 31
08:09:28:setup_element:INFO:	Beginning SMX ASICs map scan
08:09:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:09:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:09:28:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:09:28:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:09:28:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:09:29:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:09:29:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:09:29:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:09:29:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:09:29:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:09:29:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:09:29:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:09:29:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:09:29:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:09:29:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:09:29:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:09:29:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:09:30:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:09:30:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:09:30:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:09:30:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:09:31:setup_element:INFO:	Performing Elink synchronization
08:09:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:09:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:09:31:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:09:31:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:09:31:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
08:09:31:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:09:32:ST3_emu_feb:DEBUG:	Chip address:  	0x0
08:09:32:ST3_emu_feb:DEBUG:	Chip address:  	0x1
08:09:32:ST3_emu_feb:DEBUG:	Chip address:  	0x2
08:09:32:ST3_emu_feb:DEBUG:	Chip address:  	0x3
08:09:32:ST3_emu_feb:DEBUG:	Chip address:  	0x4
08:09:32:ST3_emu_feb:DEBUG:	Chip address:  	0x5
08:09:32:ST3_emu_feb:DEBUG:	Chip address:  	0x6
08:09:32:ST3_emu_feb:DEBUG:	Chip address:  	0x7
08:09:32:febtest:INFO:	Init all SMX (CSA): 30
08:09:46:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:09:47:febtest:INFO:	23-00 | XA-000-08-002-003-006-124-06 |  25.1 | 1171.5
08:09:47:febtest:INFO:	30-01 | XA-000-08-002-003-006-129-00 |  28.2 | 1165.6
08:09:47:febtest:INFO:	21-02 | XA-000-08-002-003-006-123-06 |  40.9 | 1118.1
08:09:47:febtest:INFO:	28-03 | XA-000-08-002-003-006-130-00 |  40.9 | 1130.0
08:09:47:febtest:INFO:	19-04 | XA-000-08-002-003-006-122-06 |  34.6 | 1147.8
08:09:48:febtest:INFO:	26-05 | XA-000-08-002-003-006-131-00 |  37.7 | 1147.8
08:09:48:febtest:INFO:	17-06 | XA-000-08-002-003-006-121-06 |  37.7 | 1147.8
08:09:48:febtest:INFO:	24-07 | XA-000-08-002-003-006-120-06 |  34.6 | 1147.8
08:09:49:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:09:51:ST3_smx:INFO:	chip: 23-0 	 25.062742 C 	 1177.390875 mV
08:09:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:09:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:09:51:ST3_smx:INFO:		Electrons
08:09:51:ST3_smx:INFO:	# loops 0
08:09:53:ST3_smx:INFO:	# loops 1
08:09:54:ST3_smx:INFO:	# loops 2
08:09:56:ST3_smx:INFO:	# loops 3
08:09:58:ST3_smx:INFO:	# loops 4
08:09:59:ST3_smx:INFO:	Total # of broken channels: 0
08:09:59:ST3_smx:INFO:	List of broken channels: []
08:09:59:ST3_smx:INFO:	Total # of broken channels: 0
08:09:59:ST3_smx:INFO:	List of broken channels: []
08:10:01:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1183.292940 mV
08:10:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:01:ST3_smx:INFO:		Electrons
08:10:01:ST3_smx:INFO:	# loops 0
08:10:03:ST3_smx:INFO:	# loops 1
08:10:04:ST3_smx:INFO:	# loops 2
08:10:06:ST3_smx:INFO:	# loops 3
08:10:08:ST3_smx:INFO:	# loops 4
08:10:09:ST3_smx:INFO:	Total # of broken channels: 0
08:10:09:ST3_smx:INFO:	List of broken channels: []
08:10:09:ST3_smx:INFO:	Total # of broken channels: 0
08:10:09:ST3_smx:INFO:	List of broken channels: []
08:10:11:ST3_smx:INFO:	chip: 21-2 	 44.073563 C 	 1129.995435 mV
08:10:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:11:ST3_smx:INFO:		Electrons
08:10:11:ST3_smx:INFO:	# loops 0
08:10:13:ST3_smx:INFO:	# loops 1
08:10:14:ST3_smx:INFO:	# loops 2
08:10:16:ST3_smx:INFO:	# loops 3
08:10:17:ST3_smx:INFO:	# loops 4
08:10:19:ST3_smx:INFO:	Total # of broken channels: 0
08:10:19:ST3_smx:INFO:	List of broken channels: []
08:10:19:ST3_smx:INFO:	Total # of broken channels: 0
08:10:19:ST3_smx:INFO:	List of broken channels: []
08:10:21:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1141.874115 mV
08:10:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:21:ST3_smx:INFO:		Electrons
08:10:21:ST3_smx:INFO:	# loops 0
08:10:22:ST3_smx:INFO:	# loops 1
08:10:24:ST3_smx:INFO:	# loops 2
08:10:26:ST3_smx:INFO:	# loops 3
08:10:27:ST3_smx:INFO:	# loops 4
08:10:29:ST3_smx:INFO:	Total # of broken channels: 0
08:10:29:ST3_smx:INFO:	List of broken channels: []
08:10:29:ST3_smx:INFO:	Total # of broken channels: 0
08:10:29:ST3_smx:INFO:	List of broken channels: []
08:10:31:ST3_smx:INFO:	chip: 19-4 	 34.556970 C 	 1159.654860 mV
08:10:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:31:ST3_smx:INFO:		Electrons
08:10:31:ST3_smx:INFO:	# loops 0
08:10:32:ST3_smx:INFO:	# loops 1
08:10:34:ST3_smx:INFO:	# loops 2
08:10:36:ST3_smx:INFO:	# loops 3
08:10:37:ST3_smx:INFO:	# loops 4
08:10:39:ST3_smx:INFO:	Total # of broken channels: 0
08:10:39:ST3_smx:INFO:	List of broken channels: []
08:10:39:ST3_smx:INFO:	Total # of broken channels: 1
08:10:39:ST3_smx:INFO:	List of broken channels: [122]
08:10:41:ST3_smx:INFO:	chip: 26-5 	 40.898880 C 	 1159.654860 mV
08:10:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:41:ST3_smx:INFO:		Electrons
08:10:41:ST3_smx:INFO:	# loops 0
08:10:42:ST3_smx:INFO:	# loops 1
08:10:44:ST3_smx:INFO:	# loops 2
08:10:45:ST3_smx:INFO:	# loops 3
08:10:47:ST3_smx:INFO:	# loops 4
08:10:49:ST3_smx:INFO:	Total # of broken channels: 0
08:10:49:ST3_smx:INFO:	List of broken channels: []
08:10:49:ST3_smx:INFO:	Total # of broken channels: 0
08:10:49:ST3_smx:INFO:	List of broken channels: []
08:10:50:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1153.732915 mV
08:10:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:10:50:ST3_smx:INFO:		Electrons
08:10:50:ST3_smx:INFO:	# loops 0
08:10:52:ST3_smx:INFO:	# loops 1
08:10:54:ST3_smx:INFO:	# loops 2
08:10:55:ST3_smx:INFO:	# loops 3
08:10:57:ST3_smx:INFO:	# loops 4
08:10:58:ST3_smx:INFO:	Total # of broken channels: 0
08:10:58:ST3_smx:INFO:	List of broken channels: []
08:10:58:ST3_smx:INFO:	Total # of broken channels: 0
08:10:58:ST3_smx:INFO:	List of broken channels: []
08:11:00:ST3_smx:INFO:	chip: 24-7 	 34.556970 C 	 1159.654860 mV
08:11:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:11:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:11:00:ST3_smx:INFO:		Electrons
08:11:00:ST3_smx:INFO:	# loops 0
08:11:02:ST3_smx:INFO:	# loops 1
08:11:03:ST3_smx:INFO:	# loops 2
08:11:05:ST3_smx:INFO:	# loops 3
08:11:07:ST3_smx:INFO:	# loops 4
08:11:08:ST3_smx:INFO:	Total # of broken channels: 0
08:11:08:ST3_smx:INFO:	List of broken channels: []
08:11:08:ST3_smx:INFO:	Total # of broken channels: 0
08:11:08:ST3_smx:INFO:	List of broken channels: []
08:11:09:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:11:09:febtest:INFO:	23-00 | XA-000-08-002-003-006-124-06 |  28.2 | 1201.0
08:11:09:febtest:INFO:	30-01 | XA-000-08-002-003-006-129-00 |  28.2 | 1201.0
08:11:09:febtest:INFO:	21-02 | XA-000-08-002-003-006-123-06 |  47.3 | 1147.8
08:11:09:febtest:INFO:	28-03 | XA-000-08-002-003-006-130-00 |  44.1 | 1159.7
08:11:10:febtest:INFO:	19-04 | XA-000-08-002-003-006-122-06 |  37.7 | 1183.3
08:11:10:febtest:INFO:	26-05 | XA-000-08-002-003-006-131-00 |  40.9 | 1177.4
08:11:10:febtest:INFO:	17-06 | XA-000-08-002-003-006-121-06 |  40.9 | 1171.5
08:11:10:febtest:INFO:	24-07 | XA-000-08-002-003-006-120-06 |  37.7 | 1177.4
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_08_06-08_08_38
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2193| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 18094 | SIZE: 62x124 | GRADE: D
MODULE_NAME: M7DL5B4001234B2
LADDER_NAME: L7DL500123
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4960', '1.848', '2.3260']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0520', '1.850', '2.5280']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9830', '1.850', '0.5239']