
FEB_2196 26.06.24 13:12:28
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13:12:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:12:28:ST3_Shared:INFO: FEB-Microcable 13:12:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:12:28:febtest:INFO: Testing FEB with SN 2196 13:12:29:smx_tester:INFO: Scanning setup 13:12:29:elinks:INFO: Disabling clock on downlink 0 13:12:29:elinks:INFO: Disabling clock on downlink 1 13:12:29:elinks:INFO: Disabling clock on downlink 2 13:12:29:elinks:INFO: Disabling clock on downlink 3 13:12:29:elinks:INFO: Disabling clock on downlink 4 13:12:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:12:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:12:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:12:30:elinks:INFO: Disabling clock on downlink 0 13:12:30:elinks:INFO: Disabling clock on downlink 1 13:12:30:elinks:INFO: Disabling clock on downlink 2 13:12:30:elinks:INFO: Disabling clock on downlink 3 13:12:30:elinks:INFO: Disabling clock on downlink 4 13:12:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:12:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:12:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:12:30:elinks:INFO: Disabling clock on downlink 0 13:12:30:elinks:INFO: Disabling clock on downlink 1 13:12:30:elinks:INFO: Disabling clock on downlink 2 13:12:30:elinks:INFO: Disabling clock on downlink 3 13:12:30:elinks:INFO: Disabling clock on downlink 4 13:12:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:12:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:12:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:12:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:12:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 13:12:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 13:12:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:12:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:12:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:12:30:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:12:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:12:30:elinks:INFO: Disabling clock on downlink 0 13:12:30:elinks:INFO: Disabling clock on downlink 1 13:12:30:elinks:INFO: Disabling clock on downlink 2 13:12:30:elinks:INFO: Disabling clock on downlink 3 13:12:30:elinks:INFO: Disabling clock on downlink 4 13:12:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:12:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:12:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:12:30:elinks:INFO: Disabling clock on downlink 0 13:12:30:elinks:INFO: Disabling clock on downlink 1 13:12:30:elinks:INFO: Disabling clock on downlink 2 13:12:30:elinks:INFO: Disabling clock on downlink 3 13:12:30:elinks:INFO: Disabling clock on downlink 4 13:12:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:12:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:12:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:12:30:setup_element:INFO: Scanning clock phase 13:12:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:12:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:12:30:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:12:30:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 13:12:30:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 13:12:30:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 13:12:30:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 13:12:30:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 13:12:30:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 13:12:30:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXX_____ Clock Delay: 31 13:12:30:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXX_____ Clock Delay: 31 13:12:30:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2 13:12:30:setup_element:INFO: Scanning data phases 13:12:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:12:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:12:36:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:12:36:setup_element:INFO: Eye window for uplink 24: _________XXXXXX_________________________ Data delay found: 31 13:12:36:setup_element:INFO: Eye window for uplink 25: ___________XXXXXX_______________________ Data delay found: 33 13:12:36:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________ Data delay found: 30 13:12:36:setup_element:INFO: Eye window for uplink 27: ____________XXXXX_______________________ Data delay found: 34 13:12:36:setup_element:INFO: Eye window for uplink 28: ___________XXXXXXX______________________ Data delay found: 34 13:12:36:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXX___________________ Data delay found: 37 13:12:36:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________ Data delay found: 39 13:12:36:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXX________________ Data delay found: 0 13:12:36:setup_element:INFO: Setting the data phase to 31 for uplink 24 13:12:36:setup_element:INFO: Setting the data phase to 33 for uplink 25 13:12:36:setup_element:INFO: Setting the data phase to 30 for uplink 26 13:12:36:setup_element:INFO: Setting the data phase to 34 for uplink 27 13:12:36:setup_element:INFO: Setting the data phase to 34 for uplink 28 13:12:36:setup_element:INFO: Setting the data phase to 37 for uplink 29 13:12:36:setup_element:INFO: Setting the data phase to 39 for uplink 30 13:12:36:setup_element:INFO: Setting the data phase to 0 for uplink 31 13:12:36:setup_element:INFO: Beginning SMX ASICs map scan 13:12:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:12:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:12:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:12:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:12:36:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 13:12:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:12:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:12:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:12:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:12:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 13:12:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 13:12:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:12:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:12:38:setup_element:INFO: Performing Elink synchronization 13:12:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:12:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:12:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:12:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:12:38:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:12:38:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 13:12:39:febtest:INFO: Init all SMX (CSA): 30 13:12:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:12:47:febtest:INFO: 30-01 | XA-000-08-002-000-006-160-15 | 34.6 | 1159.7 13:12:47:febtest:INFO: 28-03 | XA-000-08-002-000-006-161-15 | 34.6 | 1165.6 13:12:47:febtest:INFO: 26-05 | XA-000-08-002-000-006-162-15 | 50.4 | 1106.2 13:12:47:febtest:INFO: 24-07 | XA-000-08-002-000-006-165-15 | 40.9 | 1141.9 13:12:48:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 13:12:50:ST3_smx:INFO: chip: 30-1 34.556970 C 1171.483840 mV 13:12:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:12:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:12:50:ST3_smx:INFO: Electrons 13:12:50:ST3_smx:INFO: # loops 0 13:12:52:ST3_smx:INFO: # loops 1 13:12:54:ST3_smx:INFO: # loops 2 13:12:55:ST3_smx:INFO: Total # of broken channels: 0 13:12:55:ST3_smx:INFO: List of broken channels: [] 13:12:55:ST3_smx:INFO: Total # of broken channels: 0 13:12:55:ST3_smx:INFO: List of broken channels: [] 13:12:57:ST3_smx:INFO: chip: 28-3 31.389742 C 1177.390875 mV 13:12:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:12:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:12:57:ST3_smx:INFO: Electrons 13:12:57:ST3_smx:INFO: # loops 0 13:12:59:ST3_smx:INFO: # loops 1 13:13:01:ST3_smx:INFO: # loops 2 13:13:02:ST3_smx:INFO: Total # of broken channels: 0 13:13:02:ST3_smx:INFO: List of broken channels: [] 13:13:02:ST3_smx:INFO: Total # of broken channels: 0 13:13:02:ST3_smx:INFO: List of broken channels: [] 13:13:04:ST3_smx:INFO: chip: 26-5 47.250730 C 1118.096875 mV 13:13:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:13:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:13:04:ST3_smx:INFO: Electrons 13:13:04:ST3_smx:INFO: # loops 0 13:13:05:ST3_smx:INFO: # loops 1 13:13:07:ST3_smx:INFO: # loops 2 13:13:09:ST3_smx:INFO: Total # of broken channels: 0 13:13:09:ST3_smx:INFO: List of broken channels: [] 13:13:09:ST3_smx:INFO: Total # of broken channels: 0 13:13:09:ST3_smx:INFO: List of broken channels: [] 13:13:10:ST3_smx:INFO: chip: 24-7 40.898880 C 1147.806000 mV 13:13:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:13:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:13:10:ST3_smx:INFO: Electrons 13:13:10:ST3_smx:INFO: # loops 0 13:13:12:ST3_smx:INFO: # loops 1 13:13:14:ST3_smx:INFO: # loops 2 13:13:15:ST3_smx:INFO: Total # of broken channels: 0 13:13:15:ST3_smx:INFO: List of broken channels: [] 13:13:15:ST3_smx:INFO: Total # of broken channels: 0 13:13:15:ST3_smx:INFO: List of broken channels: [] 13:13:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:13:16:febtest:INFO: 30-01 | XA-000-08-002-000-006-160-15 | 34.6 | 1195.1 13:13:16:febtest:INFO: 28-03 | XA-000-08-002-000-006-161-15 | 34.6 | 1201.0 13:13:16:febtest:INFO: 26-05 | XA-000-08-002-000-006-162-15 | 50.4 | 1135.9 13:13:17:febtest:INFO: 24-07 | XA-000-08-002-000-006-165-15 | 40.9 | 1171.5 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_06_26-13_12_28 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2196| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8333', '1.852', '1.3590'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0240', '1.850', '1.2990'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9975', '1.850', '0.2724']