FEB_2198 24.06.24 14:04:37
Info
14:04:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:04:37:ST3_Shared:INFO: FEB-Microcable
14:04:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:04:37:febtest:INFO: Testing FEB with SN 2198
14:04:39:smx_tester:INFO: Scanning setup
14:04:39:elinks:INFO: Disabling clock on downlink 0
14:04:39:elinks:INFO: Disabling clock on downlink 1
14:04:39:elinks:INFO: Disabling clock on downlink 2
14:04:39:elinks:INFO: Disabling clock on downlink 3
14:04:39:elinks:INFO: Disabling clock on downlink 4
14:04:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:04:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:04:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:04:39:elinks:INFO: Disabling clock on downlink 0
14:04:39:elinks:INFO: Disabling clock on downlink 1
14:04:39:elinks:INFO: Disabling clock on downlink 2
14:04:39:elinks:INFO: Disabling clock on downlink 3
14:04:39:elinks:INFO: Disabling clock on downlink 4
14:04:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:04:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:04:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:04:39:elinks:INFO: Disabling clock on downlink 0
14:04:39:elinks:INFO: Disabling clock on downlink 1
14:04:39:elinks:INFO: Disabling clock on downlink 2
14:04:39:elinks:INFO: Disabling clock on downlink 3
14:04:39:elinks:INFO: Disabling clock on downlink 4
14:04:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:04:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:04:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:04:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:04:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:04:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:04:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:04:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:04:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:04:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:04:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:04:39:elinks:INFO: Disabling clock on downlink 0
14:04:39:elinks:INFO: Disabling clock on downlink 1
14:04:39:elinks:INFO: Disabling clock on downlink 2
14:04:39:elinks:INFO: Disabling clock on downlink 3
14:04:39:elinks:INFO: Disabling clock on downlink 4
14:04:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:04:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:04:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:04:39:elinks:INFO: Disabling clock on downlink 0
14:04:39:elinks:INFO: Disabling clock on downlink 1
14:04:39:elinks:INFO: Disabling clock on downlink 2
14:04:39:elinks:INFO: Disabling clock on downlink 3
14:04:39:elinks:INFO: Disabling clock on downlink 4
14:04:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:04:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:04:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:04:40:setup_element:INFO: Scanning clock phase
14:04:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:04:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:04:40:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:04:40:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
14:04:40:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
14:04:40:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:04:40:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:04:40:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
14:04:40:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
14:04:40:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
14:04:40:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
14:04:40:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
14:04:40:setup_element:INFO: Scanning data phases
14:04:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:04:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:04:45:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:04:45:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
14:04:45:setup_element:INFO: Eye window for uplink 25: __________XXXX__________________________
Data delay found: 31
14:04:45:setup_element:INFO: Eye window for uplink 26: ___________XXXXX________________________
Data delay found: 33
14:04:45:setup_element:INFO: Eye window for uplink 27: _______________XXXXXX___________________
Data delay found: 37
14:04:45:setup_element:INFO: Eye window for uplink 28: _____________XXXXXX_____________________
Data delay found: 35
14:04:45:setup_element:INFO: Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
14:04:45:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
14:04:45:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
14:04:45:setup_element:INFO: Setting the data phase to 30 for uplink 24
14:04:45:setup_element:INFO: Setting the data phase to 31 for uplink 25
14:04:45:setup_element:INFO: Setting the data phase to 33 for uplink 26
14:04:45:setup_element:INFO: Setting the data phase to 37 for uplink 27
14:04:45:setup_element:INFO: Setting the data phase to 35 for uplink 28
14:04:45:setup_element:INFO: Setting the data phase to 38 for uplink 29
14:04:45:setup_element:INFO: Setting the data phase to 38 for uplink 30
14:04:45:setup_element:INFO: Setting the data phase to 39 for uplink 31
14:04:45:setup_element:INFO: Beginning SMX ASICs map scan
14:04:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:04:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:04:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:04:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:04:45:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:04:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:04:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:04:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:04:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:04:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:04:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:04:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:04:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:04:48:setup_element:INFO: Performing Elink synchronization
14:04:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:04:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:04:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:04:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:04:48:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:04:48:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:04:48:febtest:INFO: Init all SMX (CSA): 30
14:04:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:04:56:febtest:INFO: 30-01 | XA-000-08-002-000-007-042-08 | 15.6 | 1183.3
14:04:56:febtest:INFO: 28-03 | XA-000-08-002-002-008-062-02 | 9.3 | 1212.7
14:04:57:febtest:INFO: 26-05 | XA-000-08-002-000-007-039-08 | 21.9 | 1171.5
14:04:57:febtest:INFO: 24-07 | XA-000-08-002-002-007-193-00 | 12.4 | 1206.9
14:04:58:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:05:00:ST3_smx:INFO: chip: 30-1 15.590880 C 1195.082160 mV
14:05:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:05:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:05:00:ST3_smx:INFO: Electrons
14:05:00:ST3_smx:INFO: # loops 0
14:05:02:ST3_smx:INFO: # loops 1
14:05:03:ST3_smx:INFO: # loops 2
14:05:05:ST3_smx:INFO: Total # of broken channels: 0
14:05:05:ST3_smx:INFO: List of broken channels: []
14:05:05:ST3_smx:INFO: Total # of broken channels: 0
14:05:05:ST3_smx:INFO: List of broken channels: []
14:05:07:ST3_smx:INFO: chip: 28-3 9.288730 C 1218.600960 mV
14:05:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:05:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:05:07:ST3_smx:INFO: Electrons
14:05:07:ST3_smx:INFO: # loops 0
14:05:08:ST3_smx:INFO: # loops 1
14:05:10:ST3_smx:INFO: # loops 2
14:05:12:ST3_smx:INFO: Total # of broken channels: 0
14:05:12:ST3_smx:INFO: List of broken channels: []
14:05:12:ST3_smx:INFO: Total # of broken channels: 0
14:05:12:ST3_smx:INFO: List of broken channels: []
14:05:13:ST3_smx:INFO: chip: 26-5 21.902970 C 1183.292940 mV
14:05:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:05:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:05:13:ST3_smx:INFO: Electrons
14:05:13:ST3_smx:INFO: # loops 0
14:05:15:ST3_smx:INFO: # loops 1
14:05:17:ST3_smx:INFO: # loops 2
14:05:18:ST3_smx:INFO: Total # of broken channels: 0
14:05:18:ST3_smx:INFO: List of broken channels: []
14:05:18:ST3_smx:INFO: Total # of broken channels: 0
14:05:18:ST3_smx:INFO: List of broken channels: []
14:05:20:ST3_smx:INFO: chip: 24-7 15.590880 C 1212.728715 mV
14:05:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:05:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:05:20:ST3_smx:INFO: Electrons
14:05:20:ST3_smx:INFO: # loops 0
14:05:22:ST3_smx:INFO: # loops 1
14:05:24:ST3_smx:INFO: # loops 2
14:05:25:ST3_smx:INFO: Total # of broken channels: 0
14:05:25:ST3_smx:INFO: List of broken channels: []
14:05:25:ST3_smx:INFO: Total # of broken channels: 0
14:05:25:ST3_smx:INFO: List of broken channels: []
14:05:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:05:26:febtest:INFO: 30-01 | XA-000-08-002-000-007-042-08 | 15.6 | 1212.7
14:05:26:febtest:INFO: 28-03 | XA-000-08-002-002-008-062-02 | 9.3 | 1242.0
14:05:26:febtest:INFO: 26-05 | XA-000-08-002-000-007-039-08 | 21.9 | 1206.9
14:05:26:febtest:INFO: 24-07 | XA-000-08-002-002-007-193-00 | 15.6 | 1230.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_24-14_04_37
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2198| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0040', '1.852', '1.1530']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.1960', '1.850', '1.3130']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.1640', '1.850', '0.2641']