
FEB_2199 28.06.24 12:42:22
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12:42:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:42:22:ST3_Shared:INFO: FEB-Microcable 12:42:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:42:22:febtest:INFO: Testing FEB with SN 2199 12:42:23:smx_tester:INFO: Scanning setup 12:42:23:elinks:INFO: Disabling clock on downlink 0 12:42:23:elinks:INFO: Disabling clock on downlink 1 12:42:23:elinks:INFO: Disabling clock on downlink 2 12:42:23:elinks:INFO: Disabling clock on downlink 3 12:42:23:elinks:INFO: Disabling clock on downlink 4 12:42:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:42:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:42:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:42:23:elinks:INFO: Disabling clock on downlink 0 12:42:23:elinks:INFO: Disabling clock on downlink 1 12:42:23:elinks:INFO: Disabling clock on downlink 2 12:42:23:elinks:INFO: Disabling clock on downlink 3 12:42:23:elinks:INFO: Disabling clock on downlink 4 12:42:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:42:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:42:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:42:24:elinks:INFO: Disabling clock on downlink 0 12:42:24:elinks:INFO: Disabling clock on downlink 1 12:42:24:elinks:INFO: Disabling clock on downlink 2 12:42:24:elinks:INFO: Disabling clock on downlink 3 12:42:24:elinks:INFO: Disabling clock on downlink 4 12:42:24:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:42:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:42:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 12:42:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 12:42:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 12:42:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 12:42:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 12:42:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 12:42:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 12:42:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 12:42:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:42:24:elinks:INFO: Disabling clock on downlink 0 12:42:24:elinks:INFO: Disabling clock on downlink 1 12:42:24:elinks:INFO: Disabling clock on downlink 2 12:42:24:elinks:INFO: Disabling clock on downlink 3 12:42:24:elinks:INFO: Disabling clock on downlink 4 12:42:24:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:42:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:42:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:42:24:elinks:INFO: Disabling clock on downlink 0 12:42:24:elinks:INFO: Disabling clock on downlink 1 12:42:24:elinks:INFO: Disabling clock on downlink 2 12:42:24:elinks:INFO: Disabling clock on downlink 3 12:42:24:elinks:INFO: Disabling clock on downlink 4 12:42:24:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:42:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:42:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:42:24:setup_element:INFO: Scanning clock phase 12:42:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:42:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:42:24:setup_element:INFO: Clock phase scan results for group 0, downlink 2 12:42:24:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 12:42:24:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 12:42:24:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 12:42:24:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 12:42:24:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 12:42:24:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 12:42:24:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXXX_______ Clock Delay: 29 12:42:24:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXXX_______ Clock Delay: 29 12:42:24:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2 12:42:24:setup_element:INFO: Scanning data phases 12:42:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:42:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:42:29:setup_element:INFO: Data phase scan results for group 0, downlink 2 12:42:29:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________ Data delay found: 30 12:42:29:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________ Data delay found: 32 12:42:30:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________ Data delay found: 30 12:42:30:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________ Data delay found: 33 12:42:30:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________ Data delay found: 34 12:42:30:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________ Data delay found: 36 12:42:30:setup_element:INFO: Eye window for uplink 30: ______________XXXXX_____________________ Data delay found: 36 12:42:30:setup_element:INFO: Eye window for uplink 31: ______________XXXX______________________ Data delay found: 35 12:42:30:setup_element:INFO: Setting the data phase to 30 for uplink 24 12:42:30:setup_element:INFO: Setting the data phase to 32 for uplink 25 12:42:30:setup_element:INFO: Setting the data phase to 30 for uplink 26 12:42:30:setup_element:INFO: Setting the data phase to 33 for uplink 27 12:42:30:setup_element:INFO: Setting the data phase to 34 for uplink 28 12:42:30:setup_element:INFO: Setting the data phase to 36 for uplink 29 12:42:30:setup_element:INFO: Setting the data phase to 36 for uplink 30 12:42:30:setup_element:INFO: Setting the data phase to 35 for uplink 31 12:42:30:setup_element:INFO: Beginning SMX ASICs map scan 12:42:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:42:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:42:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:42:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:42:30:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 12:42:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 12:42:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 12:42:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 12:42:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 12:42:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 12:42:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 12:42:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 12:42:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 12:42:32:setup_element:INFO: Performing Elink synchronization 12:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:42:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:42:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:42:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:42:32:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 12:42:32:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 12:42:33:febtest:INFO: Init all SMX (CSA): 30 12:42:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:42:40:febtest:INFO: 30-01 | XA-000-08-002-002-007-161-11 | 21.9 | 1171.5 12:42:41:febtest:INFO: 28-03 | XA-000-08-002-002-008-232-10 | 40.9 | 1118.1 12:42:41:febtest:INFO: 26-05 | XA-000-08-002-002-007-163-11 | 28.2 | 1147.8 12:42:41:febtest:INFO: 24-07 | XA-000-08-002-002-007-166-11 | 28.2 | 1153.7 12:42:42:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 12:42:44:ST3_smx:INFO: chip: 30-1 21.902970 C 1177.390875 mV 12:42:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:42:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:42:44:ST3_smx:INFO: Electrons 12:42:44:ST3_smx:INFO: # loops 0 12:42:46:ST3_smx:INFO: # loops 1 12:42:47:ST3_smx:INFO: # loops 2 12:42:49:ST3_smx:INFO: Total # of broken channels: 0 12:42:49:ST3_smx:INFO: List of broken channels: [] 12:42:49:ST3_smx:INFO: Total # of broken channels: 0 12:42:49:ST3_smx:INFO: List of broken channels: [] 12:42:51:ST3_smx:INFO: chip: 28-3 40.898880 C 1129.995435 mV 12:42:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:42:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:42:51:ST3_smx:INFO: Electrons 12:42:51:ST3_smx:INFO: # loops 0 12:42:52:ST3_smx:INFO: # loops 1 12:42:54:ST3_smx:INFO: # loops 2 12:42:56:ST3_smx:INFO: Total # of broken channels: 0 12:42:56:ST3_smx:INFO: List of broken channels: [] 12:42:56:ST3_smx:INFO: Total # of broken channels: 0 12:42:56:ST3_smx:INFO: List of broken channels: [] 12:42:57:ST3_smx:INFO: chip: 26-5 28.225000 C 1153.732915 mV 12:42:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:42:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:42:58:ST3_smx:INFO: Electrons 12:42:58:ST3_smx:INFO: # loops 0 12:42:59:ST3_smx:INFO: # loops 1 12:43:01:ST3_smx:INFO: # loops 2 12:43:02:ST3_smx:INFO: Total # of broken channels: 0 12:43:02:ST3_smx:INFO: List of broken channels: [] 12:43:02:ST3_smx:INFO: Total # of broken channels: 0 12:43:02:ST3_smx:INFO: List of broken channels: [] 12:43:04:ST3_smx:INFO: chip: 24-7 28.225000 C 1159.654860 mV 12:43:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:43:04:ST3_smx:INFO: Electrons 12:43:04:ST3_smx:INFO: # loops 0 12:43:06:ST3_smx:INFO: # loops 1 12:43:07:ST3_smx:INFO: # loops 2 12:43:09:ST3_smx:INFO: Total # of broken channels: 0 12:43:09:ST3_smx:INFO: List of broken channels: [] 12:43:09:ST3_smx:INFO: Total # of broken channels: 1 12:43:09:ST3_smx:INFO: List of broken channels: [109] 12:43:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:43:09:febtest:INFO: 30-01 | XA-000-08-002-002-007-161-11 | 25.1 | 1201.0 12:43:10:febtest:INFO: 28-03 | XA-000-08-002-002-008-232-10 | 40.9 | 1147.8 12:43:10:febtest:INFO: 26-05 | XA-000-08-002-002-007-163-11 | 28.2 | 1177.4 12:43:10:febtest:INFO: 24-07 | XA-000-08-002-002-007-166-11 | 28.2 | 1183.3 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_06_28-12_42_22 OPERATOR : Robert V.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2199| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7999', '1.852', '1.4450'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0240', '1.850', '1.2300'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9969', '1.850', '0.2685']