
FEB_2199 28.06.24 14:44:51
TextEdit.txt
14:44:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:44:51:ST3_Shared:INFO: FEB-Microcable 14:44:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:44:51:febtest:INFO: Testing FEB with SN 2199 14:44:52:smx_tester:INFO: Scanning setup 14:44:52:elinks:INFO: Disabling clock on downlink 0 14:44:52:elinks:INFO: Disabling clock on downlink 1 14:44:52:elinks:INFO: Disabling clock on downlink 2 14:44:52:elinks:INFO: Disabling clock on downlink 3 14:44:52:elinks:INFO: Disabling clock on downlink 4 14:44:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:44:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:44:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:44:52:elinks:INFO: Disabling clock on downlink 0 14:44:52:elinks:INFO: Disabling clock on downlink 1 14:44:52:elinks:INFO: Disabling clock on downlink 2 14:44:52:elinks:INFO: Disabling clock on downlink 3 14:44:52:elinks:INFO: Disabling clock on downlink 4 14:44:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:44:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:44:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:44:53:elinks:INFO: Disabling clock on downlink 0 14:44:53:elinks:INFO: Disabling clock on downlink 1 14:44:53:elinks:INFO: Disabling clock on downlink 2 14:44:53:elinks:INFO: Disabling clock on downlink 3 14:44:53:elinks:INFO: Disabling clock on downlink 4 14:44:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:44:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:44:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:44:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:44:53:elinks:INFO: Disabling clock on downlink 0 14:44:53:elinks:INFO: Disabling clock on downlink 1 14:44:53:elinks:INFO: Disabling clock on downlink 2 14:44:53:elinks:INFO: Disabling clock on downlink 3 14:44:53:elinks:INFO: Disabling clock on downlink 4 14:44:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:44:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:44:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:44:53:elinks:INFO: Disabling clock on downlink 0 14:44:53:elinks:INFO: Disabling clock on downlink 1 14:44:53:elinks:INFO: Disabling clock on downlink 2 14:44:53:elinks:INFO: Disabling clock on downlink 3 14:44:53:elinks:INFO: Disabling clock on downlink 4 14:44:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:44:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:44:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:44:53:setup_element:INFO: Scanning clock phase 14:44:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:44:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:44:53:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:44:53:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________ Clock Delay: 40 14:44:53:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________ Clock Delay: 40 14:44:53:setup_element:INFO: Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Eye window for uplink 20: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Eye window for uplink 21: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Eye window for uplink 22: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 14:44:53:setup_element:INFO: Eye window for uplink 23: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 14:44:53:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:44:53:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2 14:44:53:setup_element:INFO: Scanning data phases 14:44:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:44:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:44:59:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:44:59:setup_element:INFO: Eye window for uplink 16: XX_________________________________XXXXX Data delay found: 18 14:44:59:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_ Data delay found: 16 14:44:59:setup_element:INFO: Eye window for uplink 18: X_____________________XXXXXXXXXXXXXXXXXX Data delay found: 11 14:44:59:setup_element:INFO: Eye window for uplink 19: ______________________XXXXXXXXXXXXXXXXXX Data delay found: 10 14:44:59:setup_element:INFO: Eye window for uplink 20: __________________________________XXXX__ Data delay found: 15 14:44:59:setup_element:INFO: Eye window for uplink 21: ________________________________XXXXXX__ Data delay found: 14 14:44:59:setup_element:INFO: Eye window for uplink 22: X_________________________________XXXXX_ Data delay found: 17 14:44:59:setup_element:INFO: Eye window for uplink 23: XXX_____________________________XXXXXXXX Data delay found: 17 14:44:59:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________ Data delay found: 28 14:44:59:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________ Data delay found: 30 14:44:59:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________ Data delay found: 29 14:44:59:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________ Data delay found: 32 14:44:59:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________ Data delay found: 34 14:44:59:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________ Data delay found: 36 14:44:59:setup_element:INFO: Eye window for uplink 30: _____________XXXXXX_____________________ Data delay found: 35 14:44:59:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________ Data delay found: 36 14:44:59:setup_element:INFO: Setting the data phase to 18 for uplink 16 14:44:59:setup_element:INFO: Setting the data phase to 16 for uplink 17 14:44:59:setup_element:INFO: Setting the data phase to 11 for uplink 18 14:44:59:setup_element:INFO: Setting the data phase to 10 for uplink 19 14:44:59:setup_element:INFO: Setting the data phase to 15 for uplink 20 14:44:59:setup_element:INFO: Setting the data phase to 14 for uplink 21 14:44:59:setup_element:INFO: Setting the data phase to 17 for uplink 22 14:44:59:setup_element:INFO: Setting the data phase to 17 for uplink 23 14:44:59:setup_element:INFO: Setting the data phase to 28 for uplink 24 14:44:59:setup_element:INFO: Setting the data phase to 30 for uplink 25 14:44:59:setup_element:INFO: Setting the data phase to 29 for uplink 26 14:44:59:setup_element:INFO: Setting the data phase to 32 for uplink 27 14:44:59:setup_element:INFO: Setting the data phase to 34 for uplink 28 14:44:59:setup_element:INFO: Setting the data phase to 36 for uplink 29 14:44:59:setup_element:INFO: Setting the data phase to 35 for uplink 30 14:44:59:setup_element:INFO: Setting the data phase to 36 for uplink 31 14:44:59:setup_element:INFO: Beginning SMX ASICs map scan 14:44:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:44:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:44:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:44:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:44:59:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 14:44:59:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 14:44:59:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 14:44:59:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:44:59:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:45:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 14:45:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 14:45:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:45:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:45:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 14:45:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 14:45:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:45:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:45:00:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 14:45:00:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 14:45:00:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:45:00:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:45:02:setup_element:INFO: Performing Elink synchronization 14:45:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:45:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:45:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:45:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:45:02:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:45:02:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 14:45:03:febtest:INFO: Init all SMX (CSA): 30 14:45:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:45:17:febtest:INFO: 23-00 | XA-000-08-002-002-007-169-11 | 37.7 | 1159.7 14:45:17:febtest:INFO: 30-01 | XA-000-08-002-002-007-161-11 | 37.7 | 1159.7 14:45:18:febtest:INFO: 21-02 | XA-000-08-002-002-007-170-11 | 37.7 | 1165.6 14:45:18:febtest:INFO: 28-03 | XA-000-08-002-002-008-232-10 | 56.8 | 1112.1 14:45:18:febtest:INFO: 19-04 | XA-000-08-002-002-007-172-11 | 50.4 | 1118.1 14:45:18:febtest:INFO: 26-05 | XA-000-08-002-002-007-163-11 | 40.9 | 1141.9 14:45:19:febtest:INFO: 17-06 | XA-000-08-002-002-007-173-11 | 28.2 | 1201.0 14:45:19:febtest:INFO: 24-07 | XA-000-08-002-002-007-166-11 | 40.9 | 1147.8 14:45:20:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 14:45:22:ST3_smx:INFO: chip: 23-0 37.726682 C 1171.483840 mV 14:45:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:22:ST3_smx:INFO: Electrons 14:45:22:ST3_smx:INFO: # loops 0 14:45:23:ST3_smx:INFO: # loops 1 14:45:25:ST3_smx:INFO: # loops 2 14:45:27:ST3_smx:INFO: Total # of broken channels: 0 14:45:27:ST3_smx:INFO: List of broken channels: [] 14:45:27:ST3_smx:INFO: Total # of broken channels: 0 14:45:27:ST3_smx:INFO: List of broken channels: [] 14:45:28:ST3_smx:INFO: chip: 30-1 37.726682 C 1177.390875 mV 14:45:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:28:ST3_smx:INFO: Electrons 14:45:28:ST3_smx:INFO: # loops 0 14:45:30:ST3_smx:INFO: # loops 1 14:45:32:ST3_smx:INFO: # loops 2 14:45:33:ST3_smx:INFO: Total # of broken channels: 0 14:45:33:ST3_smx:INFO: List of broken channels: [] 14:45:33:ST3_smx:INFO: Total # of broken channels: 0 14:45:33:ST3_smx:INFO: List of broken channels: [] 14:45:35:ST3_smx:INFO: chip: 21-2 37.726682 C 1177.390875 mV 14:45:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:35:ST3_smx:INFO: Electrons 14:45:35:ST3_smx:INFO: # loops 0 14:45:37:ST3_smx:INFO: # loops 1 14:45:39:ST3_smx:INFO: # loops 2 14:45:40:ST3_smx:INFO: Total # of broken channels: 0 14:45:40:ST3_smx:INFO: List of broken channels: [] 14:45:40:ST3_smx:INFO: Total # of broken channels: 0 14:45:40:ST3_smx:INFO: List of broken channels: [] 14:45:42:ST3_smx:INFO: chip: 28-3 56.797143 C 1124.048640 mV 14:45:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:42:ST3_smx:INFO: Electrons 14:45:42:ST3_smx:INFO: # loops 0 14:45:43:ST3_smx:INFO: # loops 1 14:45:45:ST3_smx:INFO: # loops 2 14:45:47:ST3_smx:INFO: Total # of broken channels: 4 14:45:47:ST3_smx:INFO: List of broken channels: [117, 119, 121, 123] 14:45:47:ST3_smx:INFO: Total # of broken channels: 3 14:45:47:ST3_smx:INFO: List of broken channels: [117, 121, 123] 14:45:48:ST3_smx:INFO: chip: 19-4 50.430383 C 1129.995435 mV 14:45:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:48:ST3_smx:INFO: Electrons 14:45:48:ST3_smx:INFO: # loops 0 14:45:50:ST3_smx:INFO: # loops 1 14:45:52:ST3_smx:INFO: # loops 2 14:45:53:ST3_smx:INFO: Total # of broken channels: 0 14:45:53:ST3_smx:INFO: List of broken channels: [] 14:45:53:ST3_smx:INFO: Total # of broken channels: 0 14:45:53:ST3_smx:INFO: List of broken channels: [] 14:45:55:ST3_smx:INFO: chip: 26-5 40.898880 C 1153.732915 mV 14:45:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:45:55:ST3_smx:INFO: Electrons 14:45:55:ST3_smx:INFO: # loops 0 14:45:57:ST3_smx:INFO: # loops 1 14:45:58:ST3_smx:INFO: # loops 2 14:46:00:ST3_smx:INFO: Total # of broken channels: 3 14:46:00:ST3_smx:INFO: List of broken channels: [0, 126, 127] 14:46:00:ST3_smx:INFO: Total # of broken channels: 4 14:46:00:ST3_smx:INFO: List of broken channels: [0, 124, 126, 127] 14:46:02:ST3_smx:INFO: chip: 17-6 28.225000 C 1206.851500 mV 14:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:46:02:ST3_smx:INFO: Electrons 14:46:02:ST3_smx:INFO: # loops 0 14:46:03:ST3_smx:INFO: # loops 1 14:46:05:ST3_smx:INFO: # loops 2 14:46:07:ST3_smx:INFO: Total # of broken channels: 0 14:46:07:ST3_smx:INFO: List of broken channels: [] 14:46:07:ST3_smx:INFO: Total # of broken channels: 0 14:46:07:ST3_smx:INFO: List of broken channels: [] 14:46:08:ST3_smx:INFO: chip: 24-7 40.898880 C 1159.654860 mV 14:46:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:46:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:46:08:ST3_smx:INFO: Electrons 14:46:08:ST3_smx:INFO: # loops 0 14:46:10:ST3_smx:INFO: # loops 1 14:46:11:ST3_smx:INFO: # loops 2 14:46:13:ST3_smx:INFO: Total # of broken channels: 0 14:46:13:ST3_smx:INFO: List of broken channels: [] 14:46:13:ST3_smx:INFO: Total # of broken channels: 0 14:46:13:ST3_smx:INFO: List of broken channels: [] 14:46:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:46:14:febtest:INFO: 23-00 | XA-000-08-002-002-007-169-11 | 40.9 | 1195.1 14:46:14:febtest:INFO: 30-01 | XA-000-08-002-002-007-161-11 | 40.9 | 1195.1 14:46:14:febtest:INFO: 21-02 | XA-000-08-002-002-007-170-11 | 40.9 | 1195.1 14:46:14:febtest:INFO: 28-03 | XA-000-08-002-002-008-232-10 | 56.8 | 1147.8 14:46:14:febtest:INFO: 19-04 | XA-000-08-002-002-007-172-11 | 53.6 | 1147.8 14:46:15:febtest:INFO: 26-05 | XA-000-08-002-002-007-163-11 | 44.1 | 1171.5 14:46:15:febtest:INFO: 17-06 | XA-000-08-002-002-007-173-11 | 31.4 | 1230.3 14:46:15:febtest:INFO: 24-07 | XA-000-08-002-002-007-166-11 | 44.1 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_06_28-14_44_51 OPERATOR : Robert V.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2199| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9520', '1.852', '2.8610'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0260', '1.849', '2.6020'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '0.5319']